公开(公告)号：US09013037B2

公开(公告)日：2015-04-21

申请号：US13232780

申请日：2011-09-14

Applicant: Yonggang Jin

Inventor： Yonggang Jin

IPC: H01L23/34 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L24/11 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0384 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11622 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/2784 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/05552 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/00

Abstract: A flip chip structure formed on a semiconductor substrate includes a first plurality of copper pillars positioned directly over, and in electrical contact with respective ones of a plurality of contact pads on the front face of the semiconductor substrate. A layer of molding compound is positioned on the front face of the substrate, surrounding and enclosing each of the first plurality of pillars and having a front face that is coplanar with front faces of each of the copper pillars. Each of a second plurality of copper pillars is positioned on the front face of one of the first plurality of copper pillars, and a solder bump is positioned on a front face of each of the second plurality of pillars.

Abstract translation: 形成在半导体衬底上的倒装芯片结构包括位于半导体衬底的前表面上的多个接触焊盘的直接与电接触的第一多个铜柱。 一层模塑料定位在基材的正面上，围绕并包围第一多个柱中的每一个并且具有与每个铜柱的前表面共面的前表面。 第二多个铜柱中的每一个位于第一多个铜柱之一的前表面上，并且焊料凸块位于每个第二多个柱的正面上。

公开(公告)号：US09003644B2

公开(公告)日：2015-04-14

申请号：US13651562

申请日：2012-10-15

Applicant: STMicroelectronics Asia Pacific Pte Ltd (Singapore)

Inventor： Hk Looi ,  Cheng-hai Cheh ,  HaiKin Toh

IPC: H05K3/30 ,  B25J15/06 ,  H05K13/04

CPC classification number: B25J15/0616 ,  H05K13/0404 ,  H05K13/0408 ,  H05K13/0409 ,  Y10S901/40 ,  Y10T29/53178 ,  Y10T29/53191

Abstract: A PNP apparatus may include a robotic arm, and a PNP tool head carried by the robotic arm. The PNP tool head may include a body configured to apply bonding pressure to a first area of an electronic device, and a pick-up tip movable between an extended position and a retracted position relative to the body as the pick-up tip rests against a second area of the electronic device. The pick-up tip may define a vacuum passageway therethrough to couple a vacuum source to the second area of the electronic device.

Abstract translation: PNP装置可以包括机器人臂和由机器人手臂承载的PNP工具头。 PNP工具头可以包括构造成将粘合压力施加到电子设备的第一区域的主体，以及拾取尖端，当拾取尖端抵靠在主体上时，拾取尖端可相对于主体在延伸位置和缩回位置之间移动 电子设备的第二区域。 拾取尖端可以限定穿过其中的真空通道以将真空源耦合到电子设备的第二区域。

公开(公告)号：US09000542B2

公开(公告)日：2015-04-07

申请号：US13907708

申请日：2013-05-31

Applicant: STMicroelectronics Pte Ltd.

Inventor： Tien Choy Loh ,  Olivier Le Neel

IPC: H01L27/14 ,  H01L29/84 ,  H01L31/058 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81C1/00158 ,  B81B3/0021 ,  B81B2203/0127

Abstract: The present disclosure is directed to a device that includes a substrate and a sensor formed on the substrate. The sensor includes a chamber formed from a plurality of integrated cavities, a membrane above the substrate, the membrane having a plurality of openings, each opening positioned above one of the cavities, and a plurality of diamond shaped anchors positioned between the membrane and the substrate, the anchors positioned between each of the cavities. A center of each opening is also a center of one of the cavities.

Abstract translation: 本公开涉及一种包括基板和形成在基板上的传感器的装置。 所述传感器包括由多个集成腔体形成的室，在所述衬底上方的膜，所述膜具有多个开口，每个开口位于所述空腔中的一个上方，以及多个位于所述膜和所述衬底之间的菱形锚定件 ，定位在每个空腔之间的锚固件。 每个开口的中心也是其中一个空腔的中心。

公开(公告)号：US20150084171A1

公开(公告)日：2015-03-26

申请号：US14034121

申请日：2013-09-23

Applicant: STMicroelectronics Pte. Ltd.

Inventor： Yiyi Ma ,  Kim-Yong Goh ,  Xueren Zhang

IPC: H01L23/495

CPC classification number: H01L21/4832 ,  H01L21/486 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/24101 ,  H01L2224/24247 ,  H01L2224/25171 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82106 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A non-lead (QFN) semiconductor package is disclosed. The package includes a die attach pad and a semiconductor die supported by the die attached pad. The semiconductor die includes a plurality of pads on an active surface thereof. The package further includes a plurality of terminal leads, an encapsulant that encapsulates the semiconductor die, and a redistribution layer including a plurality of interconnections electrically connecting the pads to the terminal leads. A method of making the package is also disclosed.

Abstract translation: 公开了一种非引线（QFN）半导体封装。 封装包括管芯附接焊盘和由管芯附接焊盘支撑的半导体管芯。 半导体管芯包括在其有效表面上的多个焊盘。 该封装还包括多个端子引线，封装半导体管芯的密封剂，以及包括将焊盘电连接到端子引线的多个互连的再分配层。 还公开了制造包装的方法。

公开(公告)号：US20150035133A1

公开(公告)日：2015-02-05

申请号：US13958146

申请日：2013-08-02

Applicant: STMicroelectronics Pte Ltd.

Inventor： Wing Shenq Wong

IPC: H01L23/04 ,  H01L23/00 ,  H01L21/82

CPC classification number: H01L23/04 ,  H01L21/10 ,  H01L21/82 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/96 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14625 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83855 ,  H01L2224/85005 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/16788 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A method is described for making electronic modules includes molding onto a substrate panel a matrix panel defining a plurality of cavities, attaching semiconductor die to the substrate panel in respective cavities of the molded matrix panel, electrically connecting the semiconductor die to the substrate panel, affixing a cover to the molded matrix panel to form an electronic module assembly, mounting the electronic module assembly on a carrier tape, and separating the electronic module assembly into individual electronic modules. An electronic module is described which includes a substrate, a wall member molded onto the substrate, the molded wall member defining a cavity, at least one semiconductor die attached to the substrate in the cavity and electrically connected to the substrate, and a cover affixed to the molded wall member over the cavity.

Abstract translation: 描述了一种用于制造电子模块的方法，包括将限定多个空腔的矩阵面板模制到基板上，将半导体管芯附着到模制矩阵面板的相应空腔中的基板面板，将半导体管芯电连接到基板面板， 模制矩阵面板的盖子以形成电子模块组件，将电子模块组件安装在载带上，以及将电子模块组件分离成各个电子模块。 描述了一种电子模块，其包括衬底，模制在衬底上的壁构件，限定空腔的模制壁构件，至少一个连接到空腔中的衬底并电连接到衬底的半导体管芯，以及固定到 模制的壁构件在空腔上。

公开(公告)号：US08860228B2

公开(公告)日：2014-10-14

申请号：US13727206

申请日：2012-12-26

Applicant: STMicroelectronics Pte. Ltd

Inventor： Yonggang Jin ,  Yun Liu ,  Yaohuang Huang

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L24/19 ,  H01L23/3128 ,  H01L25/105 ,  H01L2224/12105 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/18162 ,  H01L2924/00

Abstract: An electronic device may include a bottom interconnect layer having a first electrically conductive via therein. The electronic device may also include an integrated circuit (IC) carried by said bottom interconnect layer, and an encapsulation material on the bottom interconnect layer and surrounding the IC. The encapsulation layer may have a second electrically conductive via therein aligned with the first electrically conductive via. The second electrically conductive via may have a cross-sectional area larger than a cross-sectional area of the first electrically conductive via.

Abstract translation: 电子器件可以包括其中具有第一导电通孔的底部互连层。 电子设备还可以包括由所述底部互连层承载的集成电路（IC）和在底部互连层上并围绕IC的封装材料。 封装层可以具有与第一导电通孔对准的第二导电通孔。 第二导电通孔的横截面积可以大于第一导电通孔的横截面面积。

公开(公告)号：US20140293120A1

公开(公告)日：2014-10-02

申请号：US13853598

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Hk Looi ,  Wee Chin Judy Lim ,  Cheng-Hai Cheh ,  Bs Aw ,  David Gani ,  Tin-Tun Maung ,  Choon Lee Lai

IPC: H04N5/225 ,  G03B3/10 ,  G02B7/09

CPC classification number: G03B3/10 ,  G02B7/08 ,  G02B7/09 ,  H02K41/031 ,  Y10T29/4913

Abstract: Described herein are various embodiments of contacts that include different portions angled with respect to one another and methods of manufacturing devices that include such contacts. In some embodiments, a module may include a first portion of a contact that is disposed within a housing and a second portion that is disposed outside of the housing, with the second portion angled with respect to the first portion. Manufacturing such devices may include depositing a conductive material to electrically connect the contact to a contact pad of a substrate. In some embodiments, a deposition process for depositing the conductive material may have a minimum dimension, which defines a minimum dimension of a conductive material once deposited. In some such embodiments, a distance between a terminal end of the contact pin and the contact pad may be greater than the minimum dimension of the deposition process.

Abstract translation: 这里描述的触点的各种实施例包括相对于彼此成角度的不同部分和制造包括这种触点的装置的方法。 在一些实施例中，模块可以包括设置在壳体内的接触件的第一部分和设置在壳体外部的第二部分，其中第二部分相对于第一部分成角度。 制造这样的器件可以包括沉积导电材料以将触点电连接到衬底的接触焊盘。 在一些实施例中，用于沉积导电材料的沉积工艺可以具有最小尺寸，其限定一旦沉积的导电材料的最小尺寸。 在一些这样的实施例中，接触针的末端与接触垫之间的距离可以大于沉积过程的最小尺寸。

公开(公告)号：US20140291829A1

公开(公告)日：2014-10-02

申请号：US13853886

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Olivier Le Neel ,  Shian-Yeu Kam ,  Tien-Choy Loh ,  Ditto Adnan ,  Tze Wei Dennis Chew

IPC: H01L25/16 ,  H01L21/56

CPC classification number: H01L25/16 ,  B81C1/0023 ,  G01N27/223 ,  H01L21/56 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/00 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/854 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A micro-sensor device that includes a passivation-protected ASIC module and a micro-sensor module bonded to a patterned cap provides protection for signal conditioning circuitry while allowing one or more sensing elements in the micro-sensor module to be exposed to an ambient environment. According to a method of fabricating the micro-sensor device, the patterned cap can be bonded to the micro-sensor module using a planarizing adhesive that is chemically compatible with the sensing elements. In one embodiment, the adhesive material is the same material used for the dielectric active elements, for example, a photo-sensitive polyimide film.

Abstract translation: 包括钝化保护ASIC模块和结合到图案化盖的微传感器模块的微传感器装置为信号调节电路提供保护，同时允许微传感器模块中的一个或多个感测元件暴露于周围环境 。 根据制造微传感器装置的方法，图案化盖可以使用与感测元件化学相容的平面化粘合剂结合到微传感器模块。 在一个实施例中，粘合剂材料是用于介电活性元件的材料，例如光敏聚酰亚胺膜。

公开(公告)号：US20140291677A1

公开(公告)日：2014-10-02

申请号：US13853732

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Olivier Le Neel ,  Ravi Shankar ,  Suman Cherian ,  Calvin Leung ,  Tien-Choy Loh ,  Shian-Yeu Kam

IPC: G01K7/16 ,  G01N27/22 ,  G01L9/12 ,  H01L25/065 ,  H01L25/00

CPC classification number: G01N27/223 ,  G01D21/02 ,  G01K7/01 ,  G01K7/16 ,  G01K7/186 ,  G01K7/20 ,  G01L9/12 ,  G01L19/0092 ,  H01L25/0652 ,  H01L25/50 ,  H01L27/0248 ,  H01L29/7804 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor-based multi-sensor module integrates miniature temperature, pressure, and humidity sensors onto a single substrate. Pressure and humidity sensors can be implemented as capacitive thin film sensors, while the temperature sensor is implemented as a precision miniature Wheatstone bridge. Such multi-sensor modules can be used as building blocks in application-specific integrated circuits (ASICs). Furthermore, the multi-sensor module can be built on top of existing circuitry that can be used to process signals from the sensors. An integrated multi-sensor module that uses differential sensors can measure a variety of localized ambient environmental conditions substantially simultaneously, and with a high level of precision. The multi-sensor module also features an integrated heater that can be used to calibrate or to adjust the sensors, either automatically or as needed. Such a miniature integrated multi-sensor module that features low power consumption can be used in medical monitoring and mobile computing, including smart phone applications.

Abstract translation: 基于半导体的多传感器模块将微型温度，压力和湿度传感器集成在单个基板上。 压力和湿度传感器可以实现为电容薄膜传感器，而温度传感器实现为精密微型惠斯通电桥。 这种多传感器模块可以用作专用集成电路（ASIC）中的构建块。 此外，多传感器模块可以构建在可用于处理来自传感器的信号的现有电路之上。 使用差分传感器的集成多传感器模块可以大量同时测量各种局部环境条件，并以高精度测量。 多传感器模块还具有集成加热器，可用于自动或根据需要校准或调整传感器。 这种具有低功耗的微型集成多传感器模块可用于医疗监控和移动计算，包括智能手机应用。

公开(公告)号：US08847382B2

公开(公告)日：2014-09-30

申请号：US12961311

申请日：2010-12-06

Applicant: Ravi Shankar ,  Olivier Le Neel

Inventor： Ravi Shankar ,  Olivier Le Neel

IPC: H01L23/10 ,  H01L21/00 ,  H01L21/40 ,  H01L27/16 ,  H01L23/38 ,  H01L27/08

CPC classification number: H01L23/38 ,  H01L27/0814 ,  H01L27/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor thermoelectric cooler includes P-type and N-type thermoelectric cooling elements. The P-type and N-type thermoelectric elements have a first portion having a first cross-sectional area and a second portion having a second cross-sectional area larger than the first cross-sectional area. The P-type and N-type thermoelectric cooling elements may, for example, be T-shaped or L-shaped. In another example, the thermoelectric cooling elements have a first surface having a first shape configured to couple to a first electrical conductor and a second surface opposite the first surface and having a second shape, different from the first shape, and configured to couple to a second electrical conductor. For example, the first surface may have a rectilinear shape of a first area and the second surface may have a rectilinear shape of a second area different from the first area. The semiconductor thermoelectric cooler may be manufactured using thin film technology.

Abstract translation: 半导体热电冷却器包括P型和N型热电冷却元件。 P型和N型热电元件具有具有第一横截面积的第一部分和具有大于第一横截面积的第二横截面积的第二部分。 P型和N型热电冷却元件例如可以是T形或L形。 在另一个示例中，热电冷却元件具有第一表面，该第一表面具有被配置为耦合到第一电导体和与第一表面相对的第二表面并且具有与第一形状不同的第二形状的第一形状，并且被配置为耦合到 第二电导体。 例如，第一表面可以具有第一区域的直线形状，并且第二表面可以具有与第一区域不同的第二区域的直线形状。 半导体热电冷却器可以使用薄膜技术制造。