公开(公告)号：US12068259B2

公开(公告)日：2024-08-20

申请号：US18121568

申请日：2023-03-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wei Da Lin ,  Meng-Jen Wang ,  Hung Chen Kuo ,  Wen Jin Huang

IPC: H01L23/552 ,  H01L21/3213 ,  H01L21/56 ,  H01L23/04 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/32131 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/04 ,  H01L23/3114

Abstract: A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.

公开(公告)号：US20240250030A1

公开(公告)日：2024-07-25

申请号：US18100570

申请日：2023-01-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien Lin CHANG CHIEN ,  Yuan-Chun TAI ,  Chiu-Wen LEE ,  Yu-Hsun CHANG ,  Tai-Yuan HUANG

IPC: H01L23/532 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/5329 ,  H01L23/31 ,  H01L23/49816 ,  H01L28/10

Abstract: An electronic device is provided. The electronic device includes an inductor and a dielectric layer. The inductor includes a first magnetic layer, a conductive trace over the first magnetic layer, and a second magnetic layer over the conductive trace. The dielectric layer includes a first portion between the second magnetic layer and an inclined surface of the first magnetic layer. A substantially constant distance between the second magnetic layer and the inclined surface of the first magnetic layer is defined by the dielectric layer.

公开(公告)号：US20240250006A1

公开(公告)日：2024-07-25

申请号：US18098827

申请日：2023-01-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： I-Jen CHEN

IPC: H01L23/495

CPC classification number: H01L23/49541 ,  H01L23/49503

Abstract: The present disclosure provides a package structure. The package structure includes a die bonding region and a first lead region. The first lead region extends along a first direction. The first direction is along a first edge of the die bonding region. The first lead region includes a first high density lead region and a first low density lead region. The first high density lead region overlaps the first low density lead region in the first direction.

公开(公告)号：US20240249988A1

公开(公告)日：2024-07-25

申请号：US18099056

申请日：2023-01-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Chang CHEN ,  Wei-Tung CHANG ,  Jen-Chieh KAO

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L23/315 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5381 ,  H01L23/5385 ,  H01L23/5389

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a substrate, an electronic component, an intermediate structure and a protective layer. The electronic component is disposed over the substrate. The intermediate structure is disposed over the substrate and comprises an interposer and a conductive element on the interposer. The protective layer is disposed over the substrate and has an upper surface covering the electronic component and being substantially level with an upper surface of the conductive element.

公开(公告)号：US12046523B2

公开(公告)日：2024-07-23

申请号：US16681539

申请日：2019-11-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/16 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L25/16 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L23/16 ,  H01L21/4846 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/66 ,  H01L25/16 ,  H01L25/50 ,  H01L21/6835 ,  H01L24/16 ,  H01L2223/6616 ,  H01L2224/16225 ,  H01L2924/3511

Abstract: A semiconductor device package includes a substrate; an electronic component disposed on the substrate; multiple supporting structures disposed on the substrate; and a reinforced structure disposed on the supporting structures and extending in parallel with the substrate.

公开(公告)号：US20240243039A1

公开(公告)日：2024-07-18

申请号：US18098560

申请日：2023-01-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Chung CHEN

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/49 ,  H01L25/065

CPC classification number: H01L23/4952 ,  H01L21/4885 ,  H01L21/56 ,  H01L23/3185 ,  H01L23/49 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/43 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05568 ,  H01L2224/29023 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48177 ,  H01L2224/48179 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2924/182

Abstract: At least some embodiments of the present disclosure relate to an electronic structure. The package structure includes a lead frame, an electronic component, and a conductive wire physically and electrically connecting the electronic component to the lead frame. An elevation of a first end of the conductive wire is substantially equal to an elevation of a second end of the conductive wire.

公开(公告)号：US12040321B2

公开(公告)日：2024-07-16

申请号：US17949139

申请日：2022-09-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsiang-Cheng Tsai ,  Ying-Chung Chen

IPC: H01L25/16 ,  G01J1/04

CPC classification number: H01L25/167 ,  G01J1/0403

Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.

公开(公告)号：US12033934B2

公开(公告)日：2024-07-09

申请号：US17710647

申请日：2022-03-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Ying Lee

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/49 ,  H01L25/16

CPC classification number: H01L23/49838 ,  H01L21/56 ,  H01L23/3157 ,  H01L23/49 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/32 ,  H01L24/81 ,  H01L25/167 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/02379 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14177 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/014

Abstract: A package structure includes a first die, a second die, an encapsulant and at least one electrical contact. The first die has an active surface. The second die is disposed on the first die, and has an active surface and a backside surface opposite to the active surface. The active surface of the second die is closer to the active surface of the first die than the backside surface of the second die is. The encapsulant encapsulates the first die and the second die, and has a top surface far away from the active surface of the first die. The electrical contact is exposed from the top surface of the encapsulant and is configured for connecting at least one conductive wire.

公开(公告)号：US12027469B2

公开(公告)日：2024-07-02

申请号：US17500920

申请日：2021-10-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： En Hao Hsu ,  Kuo Hwa Tzeng ,  Chia-Pin Chen ,  Chi Long Tsai

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/16

CPC classification number: H01L23/562 ,  H01L23/16 ,  H01L23/3107 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/022 ,  H01L2224/02377 ,  H01L2224/13018

Abstract: An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.

公开(公告)号：US20240213233A1

公开(公告)日：2024-06-27

申请号：US18434703

申请日：2024-02-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Han CHEN

IPC: H01L25/16 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538

CPC classification number: H01L25/167 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L2221/68372 ,  H01L2224/214

Abstract: An optoelectronic device package includes a first redistribution layer (RDL), a first electronic die disposed over the first RDL, wherein an active surface of the first electronic die faces the first RDL. The optoelectronic device package further includes a second electronic die disposed over the first RDL, and a photonic die disposed over and electrically connected to the second electronic die. An active surface of the second electronic die is opposite to the first RDL.