公开(公告)号：US20110175240A1

公开(公告)日：2011-07-21

申请号：US13076947

申请日：2011-03-31

Applicant: Jian-Cheng CHEN

Inventor： Jian-Cheng CHEN

IPC: H01L23/48

CPC classification number: H01L23/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure.

Abstract translation: 提供了芯片模块及其制造方法。 首先，提供基板。 接下来，将芯片组装在基板上并与基板电连接。 之后，以围绕芯片的方式将多个无源单元组装在基板上。 然后，在被动单元之间填充第一胶结构，使得由第一胶结构和被动单元限定环绕的区域。 然后，在包围的区域填充第二胶结构，使得芯片被第二胶结构覆盖。

公开(公告)号：US20100007009A1

公开(公告)日：2010-01-14

申请号：US12501285

申请日：2009-07-10

Applicant: Hsiao Chuan CHANG ,  Tsung Yueh TSAI ,  Yi Shao LAI ,  Ho Ming TONG ,  Jian Cheng CHEN ,  Wei Chi YIH ,  Chang Ying HUNG ,  Cheng Tsung HSU ,  Chih Cheng HUNG

Inventor： Hsiao Chuan CHANG ,  Tsung Yueh TSAI ,  Yi Shao LAI ,  Ho Ming TONG ,  Jian Cheng CHEN ,  Wei Chi YIH ,  Chang Ying HUNG ,  Cheng Tsung HSU ,  Chih Cheng HUNG

IPC: H01L23/498 ,  H01L21/60

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85047 ,  H01L2224/85201 ,  H01L2224/85365 ,  H01L2224/85947 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2924/00012

Abstract: A copper bonding wire includes a line portion and a non-spherical block portion. The non-spherical block portion is physically connected to the line portion, and the cross-sectional area of the non-spherical block portion is bigger than that of the line portion.

Abstract translation: 铜接合线包括线部分和非球形块部分。 非球形块部分物理连接到线路部分，非球形块部分的横截面面积大于线路部分的横截面面积。

公开(公告)号：US20100007004A1

公开(公告)日：2010-01-14

申请号：US12501246

申请日：2009-07-10

Applicant: Hsiao Chuan CHANG ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung ,  Cheng Wei Huang ,  Chih Hsing Chen ,  Tai Yuan Huang ,  Chieh Ting Chen ,  Yi Tsai Lu

Inventor： Hsiao Chuan CHANG ,  Tsung Yueh Tsai ,  Yi Shao Lai ,  Ho Ming Tong ,  Jian cheng Chen ,  Wei Chi Yih ,  Chang Ying Hung ,  Cheng Wei Huang ,  Chih Hsing Chen ,  Tai Yuan Huang ,  Chieh Ting Chen ,  Yi Tsai Lu

IPC: H01L23/482 ,  H01L23/485

CPC classification number: H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05169 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05649 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05672 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48465 ,  H01L2224/48507 ,  H01L2224/48609 ,  H01L2224/48611 ,  H01L2224/48618 ,  H01L2224/48623 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48649 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48672 ,  H01L2224/48809 ,  H01L2224/48818 ,  H01L2224/48823 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48849 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/48866 ,  H01L2224/48872 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85043 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85375 ,  H01L2224/8581 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/00 ,  H01L2224/48811 ,  H01L2224/48869 ,  H01L2924/00012

Abstract: A wafer defines a plurality of chips arranged in array manner. Each chip includes at least one aluminum pad and a middle material. The middle material covers the aluminum pad and is mounted on the aluminum pad.

Abstract translation: 晶片限定以阵列方式布置的多个芯片。 每个芯片包括至少一个铝焊盘和中间材料。 中间材料覆盖铝垫，并安装在铝垫上。

公开(公告)号：US20100001389A1

公开(公告)日：2010-01-07

申请号：US12478434

申请日：2009-06-04

Applicant: Jian-Cheng CHEN

Inventor： Jian-Cheng CHEN

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L23/5383 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18301 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package structure for radio frequency module and a manufacturing method thereof are provided. The package structure includes a multi-layer substrate, a first chip, a second chip, a number of solder bumps, a first molding compound and a second molding compound. The substrate includes a metallic middle layer and has a first and a second surfaces. The first and the second chips respectively disposed on the first and the second surfaces are electrically connected to the substrate. The first molding compound is disposed on the first surface and covers the first chip. The solder bumps disposed on the second surface are respectively electrically connected to the first and the second chips via the substrate. The second molding compound disposed on the second surface covers the second chip and encircles the sidewalls of the solder bumps, and the connection surfaces of solder bumps are exposed outside the second molding compound.

Abstract translation: 提供射频模块的封装结构及其制造方法。 封装结构包括多层基板，第一芯片，第二芯片，多个焊料凸块，第一模塑料和第二模塑料。 基板包括金属中间层并且具有第一表面和第二表面。 分别设置在第一和第二表面上的第一和第二芯片电连接到基板。 第一模塑料置于第一表面上并覆盖第一芯片。 设置在第二表面上的焊料凸块经由衬底分别电连接到第一和第二芯片。 设置在第二表面上的第二模塑料覆盖第二芯片并且环绕焊料凸块的侧壁，并且焊料凸块的连接表面暴露在第二模塑料外部。

公开(公告)号：US20090310076A1

公开(公告)日：2009-12-17

申请号：US12482589

申请日：2009-06-11

Applicant: Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

Inventor： Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

IPC: G02F1/1343 ,  H01L29/04 ,  H01L21/00

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F2001/133354 ,  G02F2001/134345

Abstract: In one embodiment of an invention concerning liquid crystal display devices, a first pixel electrode of a thin film transistor (TFT) array substrate may overlap a slit of a second pixel electrode of the TFT array substrate but not overlap another slit of the second pixel electrode. This may help induce a multi-domain electric field without having to precisely position a common electrode of a color filter substrate and the TFT array substrate. This may prevent position errors, enhance display quality, produce a wider viewing angle, and lower color shift sometimes associated with conventional liquid crystal display devices and methods.

Abstract translation: 在关于液晶显示装置的发明的一个实施例中，薄膜晶体管（TFT）阵列基板的第一像素电极可以与TFT阵列基板的第二像素电极的狭缝重叠，但不与第二像素电极的另一个狭缝重叠 。 这可能有助于诱导多畴电场，而不必精确地定位滤色器基板和TFT阵列基板的公共电极。 这可以防止位置误差，增强显示质量，产生更宽的视角，并且有时与常规液晶显示装置和方法相关联地降低颜色偏移。

公开(公告)号：US20090260872A1

公开(公告)日：2009-10-22

申请号：US12422477

申请日：2009-04-13

Applicant: Jian Cheng CHEN

Inventor： Jian Cheng CHEN

IPC: H05K5/00 ,  H01S4/00

CPC classification number: H05K9/0026 ,  H01L23/552 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2924/16152 ,  H01L2924/19105 ,  H05K9/0084 ,  Y10T29/49002

Abstract: A module for packaging electronic components includes a carrier, at least one electronic component and a cap. The carrier has a first region and a second region. The electronic component is disposed on the first region of the carrier. The cap is mounted on the second region, and includes an inner layer and an outer layer, wherein the inner layer is made of a non-conductive material, the outer layer is made of a conductive material, and the inner layer made of the non-conductive material covers the electronic components and the whole first region.

Abstract translation: 用于包装电子部件的模块包括载体，至少一个电子部件和盖。 载体具有第一区域和第二区域。 电子部件设置在载体的第一区域上。 所述盖安装在所述第二区域上，并且包括内层和外层，其中所述内层由非导电材料制成，所述外层由导电材料制成，所述内层由非导电材料制成， 导电材料覆盖电子部件和整个第一区域。

公开(公告)号：US20080303106A1

公开(公告)日：2008-12-11

申请号：US12038914

申请日：2008-02-28

Applicant: Jian Cheng CHEN

Inventor： Jian Cheng CHEN

IPC: H01L31/0203 ,  H01L31/18

CPC classification number: H01L27/14618 ,  G02B7/02 ,  H01L27/14625 ,  H01L2224/45144 ,  H01L2224/48091 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An image sensor package includes a substrate, a sensor chip, a frame, a lens element and at least a pair of guide pins. The sensor chip is mounted on the substrate, and has two opposite sides and a sensing region, which has a sensing region central axis. The frame is mounted on the substrate, and has an aperture and an inner space with the sensor chip disposed therein. The lens element is disposed inside the aperture and has a lens central axis. The guide pins locate oppositely inside the inner space of the frame with an interval between the tips of the guide pins substantially identical to the distance between the opposite sides of the sensor chip, wherein the central line of the interval between the tips of the guide pins defines a positioning line, which substantially coincides with the lens central axis; wherein the tip of each guide pin is aligned with one of the opposite sides of the sensor chip such that the positioning line is substantially coincided with the sensing region central axis.

Abstract translation: 图像传感器封装包括基板，传感器芯片，框架，透镜元件和至少一对引导销。 传感器芯片安装在基板上，并且具有两个相对的侧面和一个具有感测区域中心轴的感测区域。 框架安装在基板上，并且具有孔和内部空间，传感器芯片设置在其中。 透镜元件设置在孔内并具有透镜中心轴线。 引导销相对地位于框架的内部空间内，引导销的顶端之间的间隔基本上与传感器芯片的相对侧之间的距离相同，其中导向销的尖端之间的间隔的中心线 限定了基本上与透镜中心轴线重合的定位线; 其中每个引导销的尖端与传感器芯片的相对侧中的一个对准，使得定位线基本上与感测区域中心轴线重合。

公开(公告)号：US06700178B2

公开(公告)日：2004-03-02

申请号：US09838752

申请日：2001-04-19

Applicant: Jian-Cheng Chen ,  Wei-Min Hsiao

Inventor： Jian-Cheng Chen ,  Wei-Min Hsiao

IPC: H01L2348

CPC classification number: H01L23/49513 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L29/0657 ,  H01L2224/05599 ,  H01L2224/26145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/078 ,  H01L2924/10157 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A chip with beveled edges suitable for adhering onto a surface of a die pad by an adhesive material. The chip has an active surface and a corresponding back surface, wherein the active surface has beveled edges. The back surface of the chip is adhered onto the surface of the die pad by the adhesive material.

Abstract translation: 具有倾斜边缘的芯片，其适于通过粘合材料粘附到模具垫的表面上。 芯片具有活性表面和相应的后表面，其中活性表面具有斜边。 芯片的后表面通过粘合剂材料粘附到模片垫的表面上。

公开(公告)号：US08373285B2

公开(公告)日：2013-02-12

申请号：US13076947

申请日：2011-03-31

Applicant: Jian-Cheng Chen

Inventor： Jian-Cheng Chen

IPC: H01L23/31

CPC classification number: H01L23/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/078 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure.

Abstract translation: 提供了芯片模块及其制造方法。 首先，提供基板。 接下来，将芯片组装在基板上并与基板电连接。 之后，以围绕芯片的方式将多个无源单元组装在基板上。 然后，在被动单元之间填充第一胶结构，使得由第一胶结构和被动单元限定环绕的区域。 然后，在包围的区域填充第二胶结构，使得芯片被第二胶结构覆盖。

公开(公告)号：US08358393B2

公开(公告)日：2013-01-22

申请号：US12482589

申请日：2009-06-11

Applicant: Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

Inventor： Chih-Yung Hsieh ,  Chien-Hong Chen ,  Jian-Cheng Chen

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F2001/133354 ,  G02F2001/134345

Abstract: In one embodiment of an invention concerning liquid crystal display devices, a first pixel electrode of a thin film transistor (TFT) array substrate may overlap a slit of a second pixel electrode of the TFT array substrate but not overlap another slit of the second pixel electrode. This may help induce a multi-domain electric field without having to precisely position a common electrode of a color filter substrate and the TFT array substrate. This may prevent position errors, enhance display quality, produce a wider viewing angle, and lower color shift sometimes associated with conventional liquid crystal display devices and methods.

Abstract translation: 在关于液晶显示装置的发明的一个实施例中，薄膜晶体管（TFT）阵列基板的第一像素电极可以与TFT阵列基板的第二像素电极的狭缝重叠，但不与第二像素电极的另一个狭缝重叠 。 这可能有助于诱导多畴电场，而不必精确地定位滤色器基板和TFT阵列基板的公共电极。 这可以防止位置误差，增强显示质量，产生更宽的视角，并且有时与常规液晶显示装置和方法相关联地降低颜色偏移。