Abstract:
Methods for depositing a contact metal layer in contact structures of a semiconductor device are provided. In one embodiment, a method for depositing a contact metal layer for forming a contact structure in a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a contact metal layer on a substrate and annealing the contact metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the contact metal layer on the substrate, exposing the portion of the contact metal layer to a plasma treatment process, and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the contact metal layer to a plasma treatment process until a predetermined thickness of the contact metal layer is achieved.
Abstract:
Methods for forming 3D-NAND devices comprising recessing a poly-Si layer to a depth below a spaced oxide layer. A liner is formed on the spaced oxide layer and not on the recessed poly-Si layer. A metal layer is deposited in the gaps on the liner to form wordlines.
Abstract:
Methods for depositing a metal film without the use of a barrier layer are disclosed. Some embodiments comprise forming an amorphous nucleation layer comprising one or more of silicon or boron and forming a metal layer on the nucleation layer.
Abstract:
Processing methods comprising depositing a film on a substrate surface and in a surface feature with chemical planarization to remove the film from the substrate surface, leaving the film in the feature. A pillar is grown from the film so that the pillar grows orthogonally to the substrate surface.
Abstract:
Target assemblies and PVD chambers including target assemblies are disclosed. The target assembly includes a target that has a concave shaped target. When used in a PVD chamber, the concave target provides more radially uniform deposition on a substrate disposed in the sputtering chamber.
Abstract:
Provided are atomic layer deposition methods to deposit a tungsten film or tungsten-containing film using a tungsten-containing reactive gas comprising one or more of tungsten pentachloride, a compound with the empirical formula WCl5 or WCl6.
Abstract:
Methods for depositing a metal layer in a feature definition of a semiconductor device are provided. In one implementation, a method for depositing a metal layer for forming a semiconductor device is provided. The method comprises performing a cyclic metal deposition process to deposit a metal layer on a substrate and annealing the metal layer disposed on the substrate. The cyclic metal deposition process comprises exposing the substrate to a deposition precursor gas mixture to deposit a portion of the metal layer on the substrate, exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process and repeating the exposing the substrate to a deposition precursor gas mixture and exposing the portion of the metal layer to either a plasma treatment process or hydrogen annealing process until a predetermined thickness of the metal layer is achieved.
Abstract:
Embodiments described herein generally relate to doping of three dimensional (3D) structures on a substrate. In one embodiment, a conformal dopant containing film may be deposited over the 3D structures. Suitable dopants that may be incorporated in the film may include boron, phosphorous, and other suitable dopants. The film may be subsequently annealed to diffuse the dopants into the 3D structures.
Abstract:
Provided are atomic layer deposition methods to deposit a tungsten film or tungsten-containing film using a tungsten-containing reactive gas comprising one or more of tungsten pentachloride, a compound with the empirical formula WCl5 or WCl6.
Abstract:
Embodiments of an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices are provided herein. In some embodiments, an integrated platform for fabricating n-type metal oxide semiconductor (NMOS) devices may include a first deposition chamber configured to deposit a first layer atop the substrate, the first layer comprising titanium oxide (TiO2) or selenium (Se); a second deposition chamber configured to deposit a second layer atop the first layer, the second layer comprising titanium; a third deposition chamber configured to deposit a third layer atop the second layer, the third layer comprising one of titanium nitride (TiN) or tungsten nitride (WN).