公开(公告)号：US20210272878A1

公开(公告)日：2021-09-02

申请号：US16805392

申请日：2020-02-28

Applicant: Intel Corporation

Inventor： Yiqun Bai ,  Vipul Mehta ,  John Decker ,  Ziyin Lin

IPC: H01L23/433 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56

Abstract: An integrated circuit assembly may be formed comprising an electronic substrate, at least one integrated circuit device electrically attached to the electronic substrate, a mold material layer abutting electronic substrate and substantially surrounding the at least one integrated circuit, and at least one structure within the mold material layer, wherein the at least one structure comprises a material having a modulus of greater than about 20 gigapascals and a thermal conductivity of greater than about 10 watts per meter-Kelvin.

公开(公告)号：US20240222345A1

公开(公告)日：2024-07-04

申请号：US18090707

申请日：2022-12-29

Applicant: Intel Corporation

Inventor： Bohan Shan ,  Haobo Chen ,  Bai Nie ,  Srinivas Pietambaram ,  Gang Duan ,  Kyle Arrington ,  Ziyin Lin ,  Hongxia Feng ,  Yiqun Bai ,  Xiaoying Guo ,  Dingying Xu ,  Kristof Darmawikarta

IPC: H01L25/18 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/15 ,  H01L23/31 ,  H01L23/538 ,  H01L25/00

CPC classification number: H01L25/18 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/5383 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/05647 ,  H01L2224/08225 ,  H01L2224/80447 ,  H01L2224/80895

Abstract: An apparatus is provided which comprises: a plurality of interconnect layers within a substrate, a layer of organic dielectric material over the plurality of interconnect layers, copper pads within the layer of organic dielectric material, a first integrated circuit device copper-to-copper bonded with the copper pads, inorganic dielectric material over the layer of organic dielectric material, the inorganic dielectric material embedding the first integrated circuit device, and the inorganic dielectric material extending across a width of the substrate, and a second integrated circuit device coupled with a substrate surface above the inorganic dielectric material. Other embodiments are also disclosed and claimed.

公开(公告)号：US20240222301A1

公开(公告)日：2024-07-04

申请号：US18147497

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Bohan Shan ,  Hongxia Feng ,  Haobo Chen ,  Srinivas Pietambaram ,  Bai Nie ,  Gang Duan ,  Kyle Arrington ,  Ziyin Lin ,  Yiqun Bai ,  Xiaoying Guo ,  Dingying Xu ,  Sairam Agraharam ,  Ashay Dani ,  Eric J. M. Moret ,  Tarek Ibrahim

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L2224/10122 ,  H01L2224/11011 ,  H01L2924/143 ,  H01L2924/186

Abstract: Methods and apparatus for optical thermal treatment in semiconductor packages are disclosed. A disclosed example integrated circuit (IC) package includes a dielectric substrate, an interconnect associated with the dielectric substrate, and light absorption material proximate or surrounding the interconnect, the light absorption material to increase in temperature in response to being exposed to a pulsed light for thermal treatment corresponding to the IC package.

公开(公告)号：US20240222259A1

公开(公告)日：2024-07-04

申请号：US18147535

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Haobo Chen ,  Bohan Shan ,  Xiyu Hu ,  Rhonda Jack ,  Catherine Mau ,  Hongxia Feng ,  Xiao Liu ,  Wei Wei ,  Srinivas Pietambaram ,  Gang Duan ,  Xiaoying Guo ,  Dingying Xu ,  Kyle Arrington ,  Ziyin Lin ,  Hiroki Tanaka ,  Leonel Arana

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L23/49894 ,  H01L21/481 ,  H01L23/291 ,  H01L23/3192 ,  H01L24/16

Abstract: Methods, systems, apparatus, and articles of manufacture to produce integrated circuit (IC) packages having silicon nitride adhesion promoters are disclosed. An example IC package disclosed herein includes a metal layer on a substrate, a layer on the metal layer, the layer including silicon and nitrogen, and solder resist on the layer.

公开(公告)号：US20240222136A1

公开(公告)日：2024-07-04

申请号：US18091188

申请日：2022-12-29

Applicant: Intel Corporation

Inventor： Bohan Shan ,  Haobo Chen ,  Srinivas Venkata Ramanuja Pietambaram ,  Hongxia Feng ,  Gang Duan ,  Xiaoying Guo ,  Ashay A. Dani ,  Yiqun Bai ,  Dingying Xu ,  Bai Nie ,  Kyle Jordan Arrington ,  Wei Wei ,  Ziyin Lin

IPC: H01L21/321 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/3212 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/76814 ,  H01L21/7684

Abstract: Mechanical or chemical processes can form roughened surfaces which can be used for coupling layers of electrical systems such as when forming dies, substrates, computer chips or the like that, when subjected to high stress, are robust enough to remain coupled together.

公开(公告)号：US20240219659A1

公开(公告)日：2024-07-04

申请号：US18089871

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： Ziyin Lin ,  Yiqun Bai ,  Bohan Shan ,  Kyle Jordan Arrington ,  Haobo Chen ,  Dingying Xu ,  Robert Alan May ,  Gang Duan ,  Bai Nie ,  Srinivas Venkata Ramanuja Pietambaram

IPC: G02B6/42 ,  G02B5/10

CPC classification number: G02B6/4246 ,  G02B5/10 ,  G02B6/4239 ,  H01Q1/2283

Abstract: A semiconductor device and associated methods are disclosed. In one example, the electronic device includes a photonic die and a glass substrate. In selected examples, the semiconductor device includes one or more turning mirrors to direct an optical signal between the photonic die and the glass substrate. Configurations of turning mirrors are provided to improve signal integrity and manufacturability.

公开(公告)号：US12002727B2

公开(公告)日：2024-06-04

申请号：US16788186

申请日：2020-02-11

Applicant: INTEL CORPORATION

Inventor： Ziyin Lin ,  Vipul Mehta ,  Wei Li ,  Edvin Cetegen ,  Xavier Brun ,  Yang Guo ,  Soud Choudhury ,  Shan Zhong ,  Christopher Rumer ,  Nai-Yuan Liu ,  Ifeanyi Okafor ,  Hsin-Wei Wang

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/367

CPC classification number: H01L23/3185 ,  H01L23/3675 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2924/18161 ,  H01L2924/35121

Abstract: An integrated circuit assembly may be formed comprising an electronic substrate, a first and second integrated circuit device each having a first surface, a second surface, at least one side extending between the first and second surface, and an edge defined at an intersection of the second surface and the at least one side of each respective integrated circuit device, wherein the first surface of each integrated circuit device is electrically attached to the electronic substrate, an underfill material between the first surface of each integrated circuit device and the electronic substrate, and between the sides of the first and second integrated circuit devices, and at least one barrier structure adjacent at least one of the edge of first integrated circuit device and the edge of the second integrated circuit device, wherein the underfill material abuts the at least one barrier structure.

公开(公告)号：US11776821B2

公开(公告)日：2023-10-03

申请号：US17669288

申请日：2022-02-10

Applicant: Intel Corporation

Inventor： Ziyin Lin ,  Vipul Mehta ,  Edvin Cetegen ,  Yuying Wei ,  Sushrutha Gujjula ,  Nisha Ananthakrishnan ,  Shan Zhong

IPC: H01L21/56 ,  H01L21/67 ,  H01L23/00 ,  H01L23/31 ,  H01L23/13

CPC classification number: H01L21/563 ,  H01L21/67126 ,  H01L23/13 ,  H01L23/3157 ,  H01L23/564 ,  H05K2201/09045

Abstract: A substrate protrusion is described. The substrate protrusion includes a top portion that extends in a first direction toward a gap between the first die and the second die and in a second direction parallel to the gap between the first die and the second die. The substrate protrusion also includes a base portion that is coupled to a substrate that extends underneath the first die and the second die. An encapsulant is over the protrusion of the substrate, the encapsulant extending beneath the first die, and the encapsulant extending beneath the second die.

公开(公告)号：US11282717B2

公开(公告)日：2022-03-22

申请号：US15942109

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Ziyin Lin ,  Vipul Mehta ,  Edvin Cetegen ,  Yuying Wei ,  Sushrutha Gujjula ,  Nisha Ananthakrishnan ,  Shan Zhong

IPC: H01L21/56 ,  H01L21/67 ,  H01L23/13 ,  H01L23/31 ,  H01L23/00

Abstract: A substrate protrusion is described. The substrate protrusion includes a top portion that extends in a first direction toward a gap between the first die and the second die and in a second direction parallel to the gap between the first die and the second die. The substrate protrusion also includes a base portion that is coupled to a substrate that extends underneath the first die and the second die. The substrate protrusion can enable void-free underfill.