公开(公告)号：US20070194996A1

公开(公告)日：2007-08-23

申请号：US11564033

申请日：2006-11-28

申请人： Chuan-Lin Hu ,  Yu-Wei Chen ,  Chang-Lun Liao ,  Shun-Tian Lin ,  Chang-Fa Yang ,  Yen-Ming Chen ,  Chao-Wei Wang

发明人： Chuan-Lin Hu ,  Yu-Wei Chen ,  Chang-Lun Liao ,  Shun-Tian Lin ,  Chang-Fa Yang ,  Yen-Ming Chen ,  Chao-Wei Wang

IPC分类号： H01Q1/24

CPC分类号： H01Q1/243 ,  H01Q1/125

摘要： A connection apparatus for a chip antenna includes a connection base and at least one chip slot. The connection base is disposed on a circuit board and connects to the electronic components of the circuit board via a connection wire. The chip slot is disposed on the connection base for inserting the chip antenna. Thus, the chip antenna is connected to the electronic components of the circuit board via the connection wire.

摘要翻译： 用于芯片天线的连接装置包括连接基座和至少一个芯片槽。 连接基座设置在电路板上，经由连接线与电路基板的电子部件连接。 芯片槽设置在连接基座上，用于插入芯片天线。 因此，芯片天线通过连接线连接到电路板的电子部件。

公开(公告)号：US20070028445A1

公开(公告)日：2007-02-08

申请号：US11581122

申请日：2006-10-13

申请人： Chao-Yuan Su ,  Chia-Fu Lin ,  Hsin-Hui Lee ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen ,  Wen-Chang Kuo ,  Yue-Ying Jian

发明人： Chao-Yuan Su ,  Chia-Fu Lin ,  Hsin-Hui Lee ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen ,  Wen-Chang Kuo ,  Yue-Ying Jian

IPC分类号： B23K31/02

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01016 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49179 ,  H01L2924/00014 ,  H01L2924/00

摘要： A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF4 and SF6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.

摘要翻译： 一种方法，包括提供包括接合焊盘的半导体器件和覆盖在焊盘上的凸块下金属。 在凸块下冶金上形成焊料结构，其中焊料结构包括包含氧化锡的外层。 从CF 4和SF 6 6中的至少一个生成等离子体，并将焊料结构暴露于等离子体。 加热焊料结构并对其进行冷却以在半导体器件上提供焊料凸块。

公开(公告)号：US07160811B2

公开(公告)日：2007-01-09

申请号：US10278968

申请日：2002-10-22

申请人： Yen-Ming Chen ,  Huan-Chi Tseng ,  Yu-Hua Lee ,  Dian-Hau Chen ,  Chia-Hung Lai ,  Kang-Min Kuo

发明人： Yen-Ming Chen ,  Huan-Chi Tseng ,  Yu-Hua Lee ,  Dian-Hau Chen ,  Chia-Hung Lai ,  Kang-Min Kuo

IPC分类号： H01L21/302

CPC分类号： H01L21/31111 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/76801 ,  H01L21/823814 ,  H01L21/823835

摘要： A method for fabricating a microelectronic fabrication employs an undoped silicate glass layer as an etch stop layer when etching a doped silicate glass layer with an anhydrous hydrofluoric acid etchant. The method is particularly useful for forming a patterned salicide blocking dielectric layer when fabricating a complementary metal oxide semiconductor device.

摘要翻译： 当用无水氢氟酸蚀刻剂蚀刻掺杂的硅酸盐玻璃层时，用于制造微电子制造的方法使用未掺杂的硅酸盐玻璃层作为蚀刻停止层。 该方法在制造互补金属氧化物半导体器件时特别有用于形成图案化的自对准硅化物阻挡介电层。

公开(公告)号：US06956292B2

公开(公告)日：2005-10-18

申请号：US10613694

申请日：2003-07-03

申请人： Yang-Tung Fan ,  Cheng-Yu Chu ,  Fu-Jier Fan ,  Shih-Jane Lin ,  Chiou-Shian Peng ,  Yen-Ming Chen ,  Kuo-Wei Lin

发明人： Yang-Tung Fan ,  Cheng-Yu Chu ,  Fu-Jier Fan ,  Shih-Jane Lin ,  Chiou-Shian Peng ,  Yen-Ming Chen ,  Kuo-Wei Lin

IPC分类号： H01L21/60 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05171 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/1191 ,  H01L2224/13099 ,  H01L2224/45144 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00014 ,  H01L2924/013

摘要： A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, following a conventional processing sequence, a layer of polyimide is deposited. The solder flow is performed using the thickness of the deposited layer of polyimide to control the height of the column underneath the reflown solder.

摘要翻译： 提供了一种新的工艺，其是用于产生焊料凸块的当前处理的延伸和改进。 在图形化和蚀刻形式下形成了凹凸金属层和焊料金属层之后，按照传统的处理顺序，沉积了一层聚酰亚胺。 使用聚酰亚胺沉积层的厚度来进行焊料流动，以控制在重熔焊料下面的柱的高度。

公开(公告)号：US06923683B2

公开(公告)日：2005-08-02

申请号：US09921612

申请日：2001-08-03

申请人： Harjinder Dulai ,  Yen-Ming Chen ,  Colin Szeto ,  Edward J. Laurin ,  Steven D. Daniels ,  Jean Francois Drolet

发明人： Harjinder Dulai ,  Yen-Ming Chen ,  Colin Szeto ,  Edward J. Laurin ,  Steven D. Daniels ,  Jean Francois Drolet

IPC分类号： H01R13/46 ,  H01R27/02 ,  H01R25/00

CPC分类号： H01R27/02 ,  H01R13/465 ,  H01R24/58 ,  H01R2105/00 ,  H01R2201/06

摘要： A high density interconnection device includes a high density connector block having a plurality of jacks disposed on the outer surface for common interconnected to a high density connector. A recessed portion formed on the first side surface defines a first multi-faceted surface having a plurality of angularly disposed first surface elements. A projecting portion formed on the second side surface defines a second multi-faceted surface having a plurality of angularly disposed second surface elements. In another embodiment, one group of jacks are defined in a first plane, and another group of jacks are defined in a second plane. The first and second planes are substantially parallel such that the first and second groups of jacks are offset.

摘要翻译： 高密度互连装置包括高密度连接器块，其具有设置在外表面上的多个插孔，用于与高密度连接器互连。 形成在第一侧表面上的凹部限定具有多个角度设置的第一表面元件的第一多面面。 形成在第二侧表面上的突出部分限定具有多个角度设置的第二表面元件的第二多面表面。 在另一个实施例中，一组插孔被限定在第一平面中，另一组插孔被限定在第二平面中。 第一和第二平面基本平行，使得第一和第二组插孔被偏移。

公开(公告)号：US06802250B2

公开(公告)日：2004-10-12

申请号：US10151377

申请日：2002-05-20

申请人： Chao-Yuan Su ,  Chia-Fu Lin ,  Hsin-Hui Lee ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen

发明人： Chao-Yuan Su ,  Chia-Fu Lin ,  Hsin-Hui Lee ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen

IPC分类号： B41N124

CPC分类号： B41N1/24 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K3/1225 ,  H01L2924/00 ,  H01L2224/48

摘要： A stencil design for solder paste printing, or other metal stencil printing, is disclosed. A stencil for stencil printing of solder onto a semiconductor wafer for semiconductor wafer bumping includes a substrate. The substrate has a hole defined therein substantially shaped to correspond to and receptive to the semiconductor wafer. An interior edge of the substrate surrounds the hole, and has an upper lip under which the semiconductor wafer is positioned. The upper lip of the interior edge of the substrate surrounding the hole substantially prevents the solder from flowing onto sides and a bottom of the semiconductor wafer during stencil printing of the solder. The cross-profile shape of the upper lip may in one embodiment be rectangular, whereas in another embodiment be triangular.

摘要翻译： 公开了用于焊膏印刷或其它金属模版印刷的模板设计。 用于将半导体晶片凸起的半导体晶片上的焊料模版印刷的模板包括基板。 衬底具有限定在其中的孔，其基本成形为对应于并接受半导体晶片。 基板的内部边缘围绕孔，并且具有上半边缘，半导体晶片定位在该上边缘上。 围绕孔的衬底的内部边缘的上唇基本上防止焊料在模版印刷焊料期间流到半导体晶片的侧面和底部。 在一个实施例中，上唇的横截面形状可以是矩形，而在另一个实施例中是三角形。

公开(公告)号：US06797075B2

公开(公告)日：2004-09-28

申请号：US10143053

申请日：2002-05-09

申请人： Kai-Ming Ching ,  Chia-Fu Lin ,  Wen-Hsiang Tseng ,  Ta-Min Lin ,  Yen-Ming Chen ,  Hsin-Hui Lee

发明人： Kai-Ming Ching ,  Chia-Fu Lin ,  Wen-Hsiang Tseng ,  Ta-Min Lin ,  Yen-Ming Chen ,  Hsin-Hui Lee

IPC分类号： B08B104

CPC分类号： H01L21/67313 ,  B08B3/10 ,  H01L21/67057

摘要： A Ferris wheel-like stripping or cleaning mechanism that can be used in semiconductor fabrication, such as in photoresist or other stripping, or wafer or other cleaning, is disclosed. A stripping mechanism can include a container to hold a chemical, such as a photoresist stripping chemical, a wafer cleaning chemical, or another type of chemical. The mechanism can also include a component to move semiconductor wafers through the chemical in the container in a Ferris wheel-like motion. The component may include wafer holders for the wafers that are swivably mounted about an axis of rotation. As the one or more wafer holders rotate about the axis of rotation through the chemical in the container, the wafer holders remain in a substantially constant vertical and horizontal orientation.

摘要翻译： 公开了可用于半导体制造中的摩擦轮式剥离或清洁机构，例如在光致抗蚀剂或其它剥离，或晶片或其它清洁中。 剥离机构可以包括容纳化学物质的容器，例如光刻胶剥离化学品，晶片清洁化学品或其它类型的化学品。 该机构还可以包括以摩天轮状运动将半导体晶片移动通过容器中的化学物质的部件。 组件可以包括围绕旋转轴线可旋转地安装的用于晶片的晶片保持器。 当一个或多个晶片保持器围绕容器中的化学物质的旋转轴旋转时，晶片保持器保持基本恒定的垂直和水平取向。

公开(公告)号：US06743660B2

公开(公告)日：2004-06-01

申请号：US10045783

申请日：2002-01-12

申请人： Hsin-Hui Lee ,  Chia-Fu Lin ,  Chao-Yuan Su ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen

发明人： Hsin-Hui Lee ,  Chia-Fu Lin ,  Chao-Yuan Su ,  Yen-Ming Chen ,  Kai-Ming Ching ,  Li-Chih Chen

IPC分类号： H01L2148

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/49147 ,  Y10T29/49151 ,  Y10T29/49204 ,  Y10T29/49222 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the act of providing a semiconductor device having a contact pad and having an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. An electrically conductive redistribution trace is deposited over the under bump metallurgy. A photoresist layer is deposited, patterned and developed to provide portions selectively protecting the electrically conductive redistribution trace and the under bump metallurgy. Excess portions of the electrically conductive redistribution trace and under bump metallurgy not protected by the photoresist are removed.

摘要翻译： 在半导体晶片或倒装芯片等基板上形成凸点的方法。 该方法包括提供具有接触焊盘并具有上钝化层的半导体器件的动作，并且在上钝化层中形成的开口暴露接触焊盘的一部分。 在上钝化层和接触焊盘上沉积凸块下冶金。 导电再分布迹线沉积在凸块下金属之上。 沉积，图案化和显影光致抗蚀剂层以提供选择性地保护导电再分布迹线和凸块下冶金的部分。 移除不被光致抗蚀剂保护的导电再分布迹线和凸块下冶金的多余部分。

公开(公告)号：US4654140A

公开(公告)日：1987-03-31

申请号：US798938

申请日：1985-11-18

申请人： Yen-Ming Chen

发明人： Yen-Ming Chen

IPC分类号： B01D35/143 ,  B01D35/14

CPC分类号： B01D35/143 ,  Y10S116/42

摘要： A differential pressure indicator is provided for detecting and indicating a clogging condition of a filter element and subsequently an opening condition of a by-pass valve. The indicator also indicates when no filter element is installed in a fluid system. A thermal lockout effective even at high internal fluid differential pressure prevents false actuation of the indicating means at low temperatures due to increased viscosity of the system fluid. A positive locking feature prevents resetting of the indicating means after actuation. Servicing of the filter element is required in order to reset the indicator.

摘要翻译： 提供了一种差压指示器，用于检测和指示过滤元件的堵塞状况以及随后的旁通阀的打开状态。 该指示器还指示在流体系统中没有安装过滤元件的情况。 即使在较高的内部液体压差下，热锁定也能有效地防止由于系统流体的粘度增加而使指示装置在低温下发生误动作。 正锁定功能可以防止启动后指示装置的复位。 为了复位指示器，需要维修过滤元件。

公开(公告)号：US08643069B2

公开(公告)日：2014-02-04

申请号：US13180556

申请日：2011-07-12

申请人： Chun-Wei Hsu ,  Po-Cheng Huang ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Chih-Hsun Lin ,  Yen-Ming Chen ,  Chia-Hsi Chen ,  Chang-Hung Kung

发明人： Chun-Wei Hsu ,  Po-Cheng Huang ,  Teng-Chun Tsai ,  Chia-Lin Hsu ,  Chih-Hsun Lin ,  Yen-Ming Chen ,  Chia-Hsi Chen ,  Chang-Hung Kung

IPC分类号： H01L29/76 ,  H01L21/02

CPC分类号： H01L21/28008 ,  H01L21/28123 ,  H01L21/31053 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848

摘要： A semiconductor device having a metal gate includes a substrate having a plurality of shallow trench isolations (STIs) formed therein, at least a metal gate positioned on the substrate, and at least a pair of auxiliary dummy structures respectively positioned at two sides of the metal gate and on the substrate.

摘要翻译： 具有金属栅极的半导体器件包括具有形成在其中的至少一个金属栅极的多个浅沟槽隔离物（STI）的基板，以及分别位于金属的两侧的至少一对辅助虚设结构 门和衬底上。