公开(公告)号：US20120153501A1

公开(公告)日：2012-06-21

申请号：US13392714

申请日：2010-08-27

申请人： Hideya Murai ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masahiro Komuro ,  Masaya Kawano

发明人： Hideya Murai ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masahiro Komuro ,  Masaya Kawano

IPC分类号： H01L23/538 ,  H01L21/56

CPC分类号： H01L23/5389 ,  H01L23/14 ,  H01L23/49816 ,  H01L23/544 ,  H01L24/02 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2223/54486 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/18162 ,  H05K1/185 ,  H05K3/4644 ,  H05K2201/10674 ,  H01L2224/24227

摘要： In a semiconductor device in which the semiconductor chip including the external terminal(s) is embedded in an insulating layer and interconnect conductor(s) is (are) formed on the insulating layer, base hole(s) is (are) formed at position(s) of the insulating layer corresponding to the external terminal(s) in a state where the semiconductor chip has shrunk after having been embedded in the insulating layer. The interconnect conductor(s) is (are) electrically connected to the external terminal(s) through the base hole(s).

摘要翻译： 在绝缘层上形成包括外部端子的半导体芯片嵌入绝缘层和互连导体的半导体装置中，在位置上形成有基底孔， 在半导体芯片已经被嵌入绝缘层之后已经收缩的状态下与外部端子对应的绝缘层的一个或多个。 互连导体通过基座孔电连接到外部端子。

公开(公告)号：US08035217B2

公开(公告)日：2011-10-11

申请号：US12135355

申请日：2008-06-09

申请人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

发明人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

IPC分类号： H01L23/12

CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  Y10S438/977 ,  H01L2924/00

摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。

公开(公告)号：US08304915B2

公开(公告)日：2012-11-06

申请号：US13055372

申请日：2009-07-23

申请人： Kentaro Mori ,  Hideya Murai ,  Shintaro Yamamichi ,  Masaya Kawano ,  Koji Soejima

发明人： Kentaro Mori ,  Hideya Murai ,  Shintaro Yamamichi ,  Masaya Kawano ,  Koji Soejima

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/3511 ,  H05K1/115 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/10674 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/063 ,  H05K2203/1469 ,  H01L2924/00

摘要： A semiconductor device includes a plural number of interconnects and a plural number of vias are stacked. A semiconductor element is enclosed in an insulation layer. At least one of the vias provided in insulation layers and/or at least one of interconnects provided in the interconnect layers are of cross-sectional shapes different from those of the vias formed in another one of the insulation layers and/or interconnects provided in another one of the interconnect layers.

摘要翻译： 半导体器件包括多个互连件，并且堆叠多个通孔。 半导体元件封装在绝缘层中。 提供在绝缘层中的至少一个通孔和/或设置在互连层中的至少一个互连件的横截面形状与在另一个绝缘层中提供的另一个绝缘层和/或互连中形成的通孔的截面形状不同 互连层之一。

公开(公告)号：US20080303136A1

公开(公告)日：2008-12-11

申请号：US12135355

申请日：2008-06-09

申请人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

发明人： Kentaro Mori ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Masaya Kawano ,  Takehiko Maeda ,  Kouji Soejima

IPC分类号： H01L23/15 ,  H01L21/58

CPC分类号： H01L21/6835 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/15174 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  Y10S438/977 ,  H01L2924/00

摘要： A transparent board is positioned on a support board provided with a positioning mark, and a release material is provided. A semiconductor element is then positioned so that the electrode element faces upward, and the support board is then removed. An insulating resin is then formed on the release material so as to cover the semiconductor element; and a via, a wiring layer, an insulation layer, an external terminal, and a solder resist are then formed. The transparent board is then peeled from the semiconductor device through the use of the release material. A chip can thereby be mounted with high precision, there is no need to provide a positioning mark during mounting of the chip on the substrate in the manufacturing process, and the substrate can easily be removed. As a result, a semiconductor device having high density and a thin profile can be manufactured at low cost.

摘要翻译： 透明板位于设置有定位标记的支撑板上，并且设置有释放材料。 然后将半导体元件定位成使得电极元件面向上，然后移除支撑板。 然后在剥离材料上形成绝缘树脂以覆盖半导体元件; 然后形成通孔，布线层，绝缘层，外部端子和阻焊剂。 然后透明板通过使用释放材料从半导体器件剥离。 因此，可以高精度地安装芯片，在制造过程中不需要在将芯片安装在基板上时提供定位标记，并且可以容易地去除基板。 结果，可以以低成本制造具有高密度和薄型的半导体器件。

公开(公告)号：US07838779B2

公开(公告)日：2010-11-23

申请号：US11452933

申请日：2006-06-15

申请人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

发明人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

IPC分类号： H01R12/04 ,  H05K1/11

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/0055 ,  H05K3/20 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09563 ,  H05K2201/09863 ,  H05K2203/0796 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

摘要翻译： 在由板状绝缘膜的一面形成的凹部形成有由布线体和蚀刻阻挡层构成的下层布线的布线基板，在基板绝缘膜的另一面形成有上层布线， 绝缘膜，上层布线和下层布线的布线体通过形成在基板绝缘膜上的通孔相互连接。 通孔为桶形，钟形或波纹管状。

公开(公告)号：US20090001604A1

公开(公告)日：2009-01-01

申请号：US11817669

申请日：2006-03-01

申请人： Daisuke Tanaka ,  Shintaro Yamamichi ,  Hideya Murai ,  Tadanori Shimoto ,  Kaichirou Nakano ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoichiro Kurita ,  Kouji Soejima

发明人： Daisuke Tanaka ,  Shintaro Yamamichi ,  Hideya Murai ,  Tadanori Shimoto ,  Kaichirou Nakano ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoichiro Kurita ,  Kouji Soejima

IPC分类号： H01L23/485 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/3121 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/00

摘要： An oxide layer and a metal layer composed of a gold- or platinum-group metal are formed in the stated order on a substrate. A wiring body having a wiring layer, insulating layer, via, and electrode is formed on the metal layer. A semiconductor element is then connected as a flip chip via solder balls on the wiring body electrode, and underfill is introduced between the semiconductor element and the wiring body. Subsequently, a sealing resin layer is formed so as to cover the semiconductor element and the surface of the wiring body on which the semiconductor element is mounted, thus producing a semiconductor package. A high-density, detailed, thin semiconductor package can thereby be realized.

摘要翻译： 在基板上按规定的顺序形成由金或铂族金属构成的氧化物层和金属层。 具有布线层，绝缘层，通孔和电极的布线体形成在金属层上。 然后，半导体元件作为倒装芯片通过布线体电极上的焊球连接，底部填充物被引入到半导体元件与布线体之间。 随后，形成密封树脂层，以覆盖半导体元件和安装有半导体元件的布线体的表面，从而制造半导体封装。 由此可以实现高密度，详细，薄的半导体封装。

公开(公告)号：US20060283625A1

公开(公告)日：2006-12-21

申请号：US11452933

申请日：2006-06-15

申请人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

发明人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Hideya Murai ,  Takuo Funaya ,  Takehiko Maeda ,  Kenta Ogawa ,  Jun Tsukano ,  Hirokazu Honda

IPC分类号： H05K1/11 ,  H05K1/03

CPC分类号： H01L23/49827 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/0055 ,  H05K3/20 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/09563 ,  H05K2201/09863 ,  H05K2203/0796 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

摘要翻译： 在由板状绝缘膜的一面形成的凹部形成有由布线体和蚀刻阻挡层构成的下层布线的布线基板，在基板绝缘膜的另一面形成有上层布线， 绝缘膜，上层布线和下层布线的布线体通过形成在基板绝缘膜上的通孔相互连接。 通孔为桶形，钟形或波纹管状。

公开(公告)号：US20100314778A1

公开(公告)日：2010-12-16

申请号：US12867721

申请日：2009-02-06

申请人： Hideya Murai ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima

发明人： Hideya Murai ,  Kentaro Mori ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L24/82 ,  H01L21/4857 ,  H01L21/6835 ,  H01L21/7688 ,  H01L23/5389 ,  H01L24/24 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/24226 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0106 ,  H01L2924/01078 ,  H01L2924/351 ,  H01L2924/00

摘要： In forming a semiconductor device, an insulation layer is formed on top of a semiconductor chip having a plurality of external terminals. A plurality of interconnections is formed on the insulating layer. External terminals are electrically connected to coordinated interconnections through a plurality of vias formed in the insulation layer. The interconnections are each formed integral with a via conduction part which covers the entire surfaces of the bottom and the sidewall sections of the via. The interconnection is formed so as to be narrower in its region overlying the via than the upper via diameter.

摘要翻译： 在形成半导体器件时，在具有多个外部端子的半导体芯片的顶部上形成绝缘层。 在绝缘层上形成多个互连。 外部端子通过形成在绝缘层中的多个通孔电连接到协调互连。 互连件与通孔导电部分形成一体，通孔导电部分覆盖通孔的底部和侧壁部分的整个表面。 互连形成为在其通孔上方的区域比上通孔直径更窄。

公开(公告)号：US20110155433A1

公开(公告)日：2011-06-30

申请号：US13060990

申请日：2009-08-25

申请人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

发明人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

IPC分类号： H05K1/00 ,  H01K3/10

CPC分类号： H05K1/115 ,  H01L23/145 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/3511 ,  H05K1/0366 ,  H05K1/185 ,  H05K3/4069 ,  H05K3/421 ,  H05K3/424 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09563 ,  H05K2201/09854 ,  H05K2201/2072 ,  Y10T29/49165 ,  H01L2924/00

摘要： A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.

摘要翻译： 布线板通过层叠一个或多个导体布线层和一个或多个绝缘树脂层而构成，并且包括被配置为穿透绝缘树脂层的一个或多个金属通孔，其中金属孔和绝缘树脂层之间的边界面具有 金属通孔和绝缘树脂层彼此接合的凹凸边界横截面结构。

公开(公告)号：US08692135B2

公开(公告)日：2014-04-08

申请号：US13060990

申请日：2009-08-25

申请人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

发明人： Takuo Funaya ,  Shintaro Yamamichi ,  Daisuke Ohshima ,  Yoshiki Nakashima

IPC分类号： H05K1/11 ,  H05K1/18

CPC分类号： H05K1/115 ,  H01L23/145 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/3511 ,  H05K1/0366 ,  H05K1/185 ,  H05K3/4069 ,  H05K3/421 ,  H05K3/424 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/09563 ,  H05K2201/09854 ,  H05K2201/2072 ,  Y10T29/49165 ,  H01L2924/00

摘要： A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.

摘要翻译： 布线板通过层叠一个或多个导体布线层和一个或多个绝缘树脂层而构成，并且包括被配置为穿透绝缘树脂层的一个或多个金属通孔，其中金属孔和绝缘树脂层之间的边界面具有 金属通孔和绝缘树脂层彼此接合的凹凸边界横截面结构。