公开(公告)号：US5463238A

公开(公告)日：1995-10-31

申请号：US22369

申请日：1993-02-25

申请人： Kunihiro Takahashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

发明人： Kunihiro Takahashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

IPC分类号： H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L27/02 ,  H01L21/225 ,  H01L29/06

CPC分类号： H01L29/78609 ,  H01L27/0688 ,  H01L27/0921 ,  H01L27/0928 ,  H01L27/1203 ,  H01L29/78654

摘要： A semiconductor device comprises a complementary MOS transistor integrated circuit formed in a semiconductor single crystal silicon disposed on an electrically insulating layer. A thickness of the single crystal silicon in a region in which an N-type MOS transistor is formed is made thicker than the thickness in a region in which a P-type MOS transistor is formed. By this structure, the bottoms of the source region and the drain region of the N-type transistor are separated from the electrically insulating layer by a predetermined distance. The separation of the source region and the drain region from the electrically insulating layer is effective to prevent a parasitic channel from forming, thereby reducing leakage current and making the semiconductor device more efficient.

摘要翻译： 半导体器件包括形成在设置在电绝缘层上的半导体单晶硅中的互补MOS晶体管集成电路。 形成N型MOS晶体管的区域中的单晶硅的厚度比形成有P型MOS晶体管的区域的厚度厚。 通过这种结构，N型晶体管的源极区域和漏极区域的底部与电绝缘层分离预定距离。 源极区域和漏极区域与电绝缘层的分离对于防止形成寄生沟道是有效的，从而减少漏电流并使半导体器件更有效率。

公开(公告)号：US5434433A

公开(公告)日：1995-07-18

申请号：US106418

申请日：1993-08-13

申请人： Hiroaki Takasu ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Tsuneo Yamazaki ,  Tadao Iwaki

发明人： Hiroaki Takasu ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Tsuneo Yamazaki ,  Tadao Iwaki

IPC分类号： G02F1/1335 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/36 ,  H01L21/77 ,  H01L27/12 ,  H01L29/786 ,  H01L33/00

CPC分类号： G02F1/13454 ,  H01L27/1203 ,  H01L27/1214 ,  G02F2001/136281 ,  G02F2202/105

摘要： A semiconductor substrate is utilized to integrally form a drive circuit and a pixel array to produce a transparent semiconductor device for a light valve. The semiconductor device for a light valve is constructed by a semiconductor substrate composed of a bulk single crystal silicon having an opaque thick portion and a thin transparent portion. A pixel array is formed in the transparent portion. A drive circuit is formed in a top face of the opaque portion. A transparent support substrate is laminated to the top face of the semiconductor substrate for reinforcement. A bulk portion of the semiconductor substrate is removed from a back face thereof by selective etching to provide the transparent portion.

摘要翻译： 利用半导体衬底整体地形成驱动电路和像素阵列以产生用于光阀的透明半导体器件。 用于光阀的半导体器件由具有不透明厚部分和薄透明部分的大块单晶硅构成的半导体衬底构成。 在透明部分中形成像素阵列。 驱动电路形成在不透明部分的顶面。 将透明支撑基板层叠到半导体基板的顶面以进行加强。 通过选择性蚀刻从其背面去除半导体衬底的主体部分以提供透明部分。

公开(公告)号：US5124272A

公开(公告)日：1992-06-23

申请号：US565960

申请日：1990-08-13

申请人： Naoto Saito ,  Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Masahiko Kinbara

发明人： Naoto Saito ,  Kenji Aoki ,  Tadao Akamine ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Masahiko Kinbara

IPC分类号： H01L21/225 ,  H01L21/336

CPC分类号： H01L29/66575 ,  H01L21/2254 ,  H01L29/66628 ,  H01L29/66636

摘要： An impurity adsorption layer is selectively formed from a gas containing an impurity on a semiconductor surface. Solid-phase diffusion of the impurity is effected from the impurity adsorption layer into the semiconductor surface to form a source region and a drain region having a sufficiently small resistivity and an ultrashallow PN junction depth, thereby producing a metal-insulator semiconductor field-effect-transistor featuring fast operating speed and reduced dimensions.

公开(公告)号：US4963855A

公开(公告)日：1990-10-16

申请号：US483258

申请日：1990-02-21

申请人： Yoshikazu Kojima

发明人： Yoshikazu Kojima

IPC分类号： G10K9/22

CPC分类号： G10K9/22

摘要： A warning sound generating device includes a sound source member and an enclosure for protecting the sound source member. A front wall of the enclosure and a sound emitting portion of the sound source member face each other. The front wall of the enclosure has at least one continuous projecting wall extending toward the sound source member. The sound source member has at least one continuous projecting wall extending toward the enclosure and surrounding the sound emitting portion. The enclosure has a plurality of sound exits formed outwardly from the outermost projectng wall of the enclosure. The projecting walls of the sound source member and the enclosure cooperate to define a sound passageway through which a sound generated from the sound emitting portion passes. Each of the projecting walls has a thickness decreasing from the base to the forward rim thereof, so that the passageway has a width between the projecting walls increasing from the sound emitting portion to the sound exits.

摘要翻译： 警告声产生装置包括声源构件和用于保护声源构件的外壳。 外壳的前壁和声源构件的发声部分彼此面对。 外壳的前壁具有朝向声源构件延伸的至少一个连续的突出壁。 声源构件具有至少一个连续的突出壁，其朝着外壳延伸并围绕发声部分。 外壳具有从外壳的最外侧的投影壁向外形成的多个声音出口。 声源构件和外壳的突出壁协作以形成声音通道，声音从声发射部分产生的声音通过该通道。 每个突出壁的厚度从基部向其前边缘减小，使得通道具有从发声部分到声音出口的突出壁之间的宽度。

公开(公告)号：US06498376B1

公开(公告)日：2002-12-24

申请号：US08459831

申请日：1995-06-02

申请人： Masanori Miyagi ,  Haruo Konishi ,  Kazuaki Kubo ,  Yoshikazu Kojima ,  Toru Shimizu ,  Yutaka Saitoh ,  Toru Machida ,  Tetsuya Kaneko

发明人： Masanori Miyagi ,  Haruo Konishi ,  Kazuaki Kubo ,  Yoshikazu Kojima ,  Toru Shimizu ,  Yutaka Saitoh ,  Toru Machida ,  Tetsuya Kaneko

IPC分类号： H01L2976

CPC分类号： H01L29/78696 ,  H01L21/3226 ,  H01L21/823462 ,  H01L27/0705 ,  H01L29/1041 ,  H01L29/1045 ,  H01L29/66757

摘要： A MISFET is provided with a segmented channel comprising regions in which the channel is inverted by a first gate voltage and regions in which the channel is inverted by a second gate voltage. The MISFET is formed in a semiconductor substrate having a first conductivity type and the first inversion region of the channel has a first impurity concentration determined by the surface concentration of the substrate. The second inversion region of the channel has a second impurity concentration determined by doping an impurity to the region selected by a photolithographic process. The first and second inversion regions may be divided into a plurality of plane shapes and the threshold voltage of the MISFET is set to a desired value in accordance with the plane area ratio of the first and second inversion regions.

摘要翻译： MISFET设置有分段通道，该分段通道包括其中通道被第一栅极电压反相的区域和通道以第二栅极电压反相的区域。 MISFET形成在具有第一导电类型的半导体衬底中，沟道的第一反相区域具有由衬底的表面浓度确定的第一杂质浓度。 通道的第二反转区域具有通过将杂质掺杂到通过光刻工艺选择的区域而确定的第二杂质浓度。 第一反转区域和第二反转区域可以被划分成多个平面形状，并且根据第一和第二反转区域的平面面积比将MISFET的阈值电压设置为期望值。

公开(公告)号：US06222235B1

公开(公告)日：2001-04-24

申请号：US08677541

申请日：1996-07-10

申请人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

发明人： Yoshikazu Kojima ,  Kazutoshi Ishii ,  Masaaki Kamiya ,  Yasuhiro Moya

IPC分类号： H01L2362

CPC分类号： H01L29/7834 ,  H01L27/0266 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/105 ,  H01L29/42364 ,  H01L29/42368 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.

摘要翻译： 在其输出部分中包括多个高电压驱动晶体管的半导体器件通过将静电保护晶体管与连接到输出焊盘的高电压驱动晶体管并联连接来提高静电耐受电压。 使静电保护晶体管的漏极耐受电压低于高电压驱动晶体管的漏极耐受电压。 此外，静电保护晶体管的沟道长度变短，以实现静电保护晶体管的高效双极性操作。

公开(公告)号：US06187605B1

公开(公告)日：2001-02-13

申请号：US08308564

申请日：1994-09-19

申请人： Hiroaki Takasu ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Tsuneo Yamazaki ,  Tadao Iwaki

发明人： Hiroaki Takasu ,  Yoshikazu Kojima ,  Kunihiro Takahashi ,  Tsuneo Yamazaki ,  Tadao Iwaki

IPC分类号： H01L2100

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  G02F2001/136281 ,  G02F2202/105 ,  H01L27/1203

摘要： A semiconductor substrate is utilized to integrally form a drive circuit and a pixel array to produce a transparent semiconductor device for a light valve. The semiconductor device for a light valve is constructed of a semiconductor substrate composed of a bulk single crystal silicon having an opaque thick portion and a thin transparent portion. A pixel array is formed in the transparent portion. A drive circuit is formed in a top face of the opaque portion. A transparent support substrate is laminated to the top face of the semiconductor substrate for reinforcement. A bulk portion of the semiconductor substrate is removed from a back face thereof by selective etching to provide the transparent portion.

摘要翻译： 利用半导体衬底整体地形成驱动电路和像素阵列以产生用于光阀的透明半导体器件。 用于光阀的半导体器件由具有不透明厚部分和薄透明部分的块状单晶硅构成的半导体衬底构成。 在透明部分中形成像素阵列。 驱动电路形成在不透明部分的顶面。 将透明支撑基板层叠到半导体基板的顶面以进行加强。 通过选择性蚀刻从其背面去除半导体衬底的主体部分以提供透明部分。

公开(公告)号：US6040200A

公开(公告)日：2000-03-21

申请号：US834168

申请日：1997-04-14

申请人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

发明人： Yutaka Hayashi ,  Masaaki Kamiya ,  Yoshikazu Kojima ,  Hiroaki Takasu

IPC分类号： G02F1/136 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L21/86 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/13454 ,  G02F1/136209 ,  G02F1/1368 ,  H01L21/84 ,  H01L21/86 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78654 ,  G02F1/133512 ,  G02F2001/13613 ,  G02F2202/105 ,  Y10S148/012 ,  Y10S148/15 ,  Y10S438/977

摘要： A method of fabricating a light valve device comprises forming a substrate having stacked layers including a light-shielding thin film layer, an insulating film, and a single crystalline semiconductor thin film stacked in this order on a transparent support substrate. A light-shielding layer pattern is formed by selectively etching the stacked layers. Thereafter, a switching element is formed comprised of a transistor having a channel region formed in the single crystalline semiconductor thin film and a main gate electrode covering the channel region. The channel region is provided over the light-shielding pattern layer to prevent light incident from the transparent support substrate from illuminating the channel region to suppress a photo-induced leakage current in the channel region. A transparent electrode is formed and is electrically connected to the switching element. An opposing substrate is then provided over the substrate at the side of the single crystalline semiconductor thin film, and an electro-optical material layer is interposed between the substrate and the opposing substrate.

摘要翻译： 一种制造光阀装置的方法包括在透明支撑基板上依次形成具有堆叠层的衬底，该层叠层包括遮光薄膜层，绝缘膜和单晶半导体薄膜。 通过选择性地蚀刻层叠层来形成遮光层图案。 此后，开关元件由具有在单晶半导体薄膜中形成的沟道区的晶体管和覆盖沟道区的主栅电极构成。 沟道区域设置在遮光图案层上，以防止从透明支撑衬底入射的光照射沟道区域，以抑制沟道区域中的光致感应漏电流。 形成透明电极并与开关元件电连接。 然后在单晶半导体薄膜侧面的衬底上设置相对的衬底，并且在衬底和相对衬底之间插入电光材料层。

公开(公告)号：US6022792A

公开(公告)日：2000-02-08

申请号：US815907

申请日：1997-03-12

申请人： Kazutoshi Ishii ,  Naoto Inoue ,  Koushi Maemura ,  Shoji Nakanishi ,  Yoshikazu Kojima ,  Kiyoaki Kadoi ,  Takao Akiba ,  Yasuhiro Moya ,  Kentaro Kuhara

发明人： Kazutoshi Ishii ,  Naoto Inoue ,  Koushi Maemura ,  Shoji Nakanishi ,  Yoshikazu Kojima ,  Kiyoaki Kadoi ,  Takao Akiba ,  Yasuhiro Moya ,  Kentaro Kuhara

IPC分类号： H01L21/301 ,  H01L21/78 ,  H01L23/485 ,  H01L23/532

CPC分类号： H01L24/05 ,  H01L21/78 ,  H01L23/53228 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05012 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/06051 ,  H01L2224/13017 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/75252 ,  H01L2224/85201 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025

摘要： To decrease the area of a chip, improve the manufacturing efficiency and decrease the cost in a semiconductor device such as a driver integrated circuit having a number of output pads, and an electronic circuit device such as electronic clock. There are disposed output pads superposed in two dimensions on driving transistors or logic circuits connected thereto, respectively. Further, not only aluminum interconnection but also bump electrodes or barrier metals are used for the interconnection of the semiconductor device. In a case where a semiconductor integrated circuit is electrically adhered on to a printed circuit board in a face down manner, a solder bump disposed on the semiconductor integrated circuit and the interconnection of the printed circuit board are directly connected to each other, thereby realizing the electrical connection. On this occasion, the bump electrode as the external connecting terminal of the semiconductor integrated circuit is laminated on the transistor.

摘要翻译： 为了减小芯片的面积，提高制造效率，降低诸如具有多个输出焊盘的驱动器集成电路等半导体装置以及诸如电子时钟之类的电子电路装置的成本。 在驱动晶体管或连接到其的逻辑电路上分别布置有两个重叠的输出焊盘。 此外，不仅铝互连而且凸起电极或阻挡金属用于半导体器件的互连。 在将半导体集成电路以面朝下的方式电粘接到印刷电路板的情况下，设置在半导体集成电路上的焊料凸块和印刷电路板的互连直接连接，从而实现 电气连接。 在这种情况下，作为半导体集成电路的外部连接端子的突起电极层叠在晶体管上。

公开(公告)号：US6013940A

公开(公告)日：2000-01-11

申请号：US516627

申请日：1995-08-18

申请人： Hirofumi Harada ,  Jun Osanai ,  Yoshikazu Kojima ,  Yutaka Saitoh

发明人： Hirofumi Harada ,  Jun Osanai ,  Yoshikazu Kojima ,  Yutaka Saitoh

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/08 ,  H01L29/00

CPC分类号： H01L28/20 ,  H01L27/0629 ,  H01L27/0802

摘要： A resistor ladder network may be formed with a reduced space on a semiconductor substrate by patterning a plurality of layers of resistive polycrystalline silicon films spaced by insulating layers. Such a device includes a first insulating film formed on a semiconductor substrate, one or more serial-connected first resistors formed in a first polycrystalline silicon film provided on the semiconductor substrate via the first insulating film, a second insulating film provided on the first polycrystalline silicon film, one or more series-connected second resistors formed in a second polycrystalline silicon film provided apart from the first polycrystalline silicon film via the second insulating film, the second polycrystalline silicon film being connected to the first polycrystalline silicon film. A third insulating film is provided over the second polycrystalline silicon film, and metal wires provided on a surface of the second polycrystalline silicon film via contact holes formed in the third insulating film. Preferably, the first polycrystalline silicon film is thicker than the second polycrystalline silicon film, the impurity concentration of the first polycrystalline silicon film is lower than the impurity concentration of the second polycrystalline silicon film, and the grain size of the first polycrystalline silicon film is smaller than that of the second polycrystalline silicon film.

摘要翻译： 可以通过对由绝缘层隔开的多层电阻多晶硅膜进行构图而在半导体衬底上形成具有减小的空间的电阻梯形网络。 这种器件包括形成在半导体衬底上的第一绝缘膜，经由第一绝缘膜形成在设置在半导体衬底上的第一多晶硅膜中的一个或多个串联连接的第一电阻器，设置在第一多晶硅上的第二绝缘膜 膜，一个或多个串联连接的第二电阻器，形成在通过第二绝缘膜与第一多晶硅膜分开设置的第二多晶硅膜中，第二多晶硅膜连接到第一多晶硅膜。 在第二多晶硅膜上设置第三绝缘膜，通过形成在第三绝缘膜中的接触孔，设置在第二多晶硅膜的表面上的金属线。 优选地，第一多晶硅膜比第二多晶硅膜厚，第一多晶硅膜的杂质浓度低于第二多晶硅膜的杂质浓度，第一多晶硅膜的晶粒尺寸较小 比第二多晶硅膜的厚度大。