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公开(公告)号:US12035061B2
公开(公告)日:2024-07-09
申请号:US17422580
申请日:2020-01-22
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei Yamazaki , Takayuki Ikeda
IPC: H04N25/75 , H01L27/146 , H04N25/79
CPC classification number: H04N25/75 , H01L27/14612 , H01L27/14636 , H04N25/79
Abstract: An imaging device having a memory function is provided. Alternatively, an imaging device suitable for taking images of a moving object is provided. The imaging device includes a first to third layers; the second layer is provided between the first and the third layer; the first layer includes a photoelectric conversion device; the second layer includes a first and a second circuit; the third layer includes a third and a fourth circuit; the first circuit and the photoelectric conversion device have a function of generating imaging data; the third circuit has a function of reading the imaging data; the second circuit has a function of storing the imaging data read by the third circuit; the fourth circuit has a function of reading the imaging data stored in the second circuit; and the first circuit and the second circuit include a transistor including a metal oxide in a channel formation region.
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公开(公告)号:US12033867B2
公开(公告)日:2024-07-09
申请号:US18142213
申请日:2023-05-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Junichi Koezuka
IPC: H01L29/49 , G02F1/1343 , G02F1/1368 , H01L21/385 , H01L27/12 , H01L29/417 , H01L29/51 , H01L29/66 , H01L29/786
CPC classification number: H01L21/385 , G02F1/134309 , G02F1/13439 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/4908 , H01L29/4958 , H01L29/4966 , H01L29/513 , H01L29/518 , H01L29/66969 , H01L29/7869 , H01L29/78696 , G02F2201/123
Abstract: In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.
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公开(公告)号:US12015012B2
公开(公告)日:2024-06-18
申请号:US17613605
申请日:2020-05-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Onuki , Takanori Matsuzaki , Yuki Okamoto , Shunpei Yamazaki
IPC: H01L27/108 , G11C5/06 , H01L25/065 , H01L29/786 , H10B12/00 , H01L23/00
CPC classification number: H01L25/0657 , G11C5/063 , H01L29/78693 , H10B12/315 , H10B12/50 , H01L24/16 , H01L25/0655 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/1431 , H01L2924/1436
Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a silicon substrate including a first circuit, a first element layer including a second circuit, and a second element layer including a third circuit. The first circuit includes a first transistor. The second circuit includes a second transistor. The third circuit includes a memory cell. The memory cell includes a third transistor and a capacitor. The first element layer and the second element layer constitute a stacked block stacked and provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate. A plurality of stacked blocks are stacked and provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. Each of the plurality of stacked blocks includes a first wiring provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. The plurality of stacked blocks are electrically connected to each other through the wiring.
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公开(公告)号:US20240196657A1
公开(公告)日:2024-06-13
申请号:US18287339
申请日:2022-04-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Daiki NAKAMURA , Ryo YAMAUCHI , Kenichi OKAZAKI , Shingo EGUCHI
IPC: H10K59/122 , H10K59/35 , H10K59/80
CPC classification number: H10K59/122 , H10K59/353 , H10K59/80515
Abstract: A display apparatus with a wide viewing angle is provided. The display apparatus includes a first light-emitting element and a second light-emitting element over a substrate. The first light-emitting element includes a first pixel electrode, a first organic layer, and a common electrode, and the second light-emitting element includes a second pixel electrode, a second organic layer, and the common electrode. In a top view of the substrate, the first light-emitting element includes a first side and a second side that is shorter than the first side. An absolute value of a difference between a chromaticity difference between a chromaticity in a front direction and a chromaticity in a first direction and a chromaticity difference between the chromaticity in the front direction and a chromaticity in a second direction is less than or equal to 0.05. A projection of the first direction onto the substrate is parallel to the first side, and a projection of the second direction onto the substrate is parallel to the second side. An angle formed by the first direction and a normal direction of a surface of the substrate is 70°, and an angle formed by the second direction and the normal direction of the surface of the substrate is 70°.
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公开(公告)号:US12009688B2
公开(公告)日:2024-06-11
申请号:US17283689
申请日:2019-10-15
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Munehiro Kozuma , Takayuki Ikeda , Takanori Matsuzaki , Kei Takahashi , Mayumi Mikami , Shunpei Yamazaki
IPC: H02J7/00 , G11C11/401 , H01L27/06 , H01M10/0525 , H01M10/42 , H01M10/48 , H01M10/613 , H01M10/615 , H01M10/625 , H01M10/633
CPC classification number: H02J7/007194 , G11C11/401 , H01M10/0525 , H01M10/425 , H01M10/4257 , H01M10/48 , H01M10/486 , H01M10/613 , H01M10/615 , H01M10/625 , H01M10/633 , H02J7/0029 , H02J7/0047 , H01L27/0629 , H01M2010/4271 , H01M2220/20
Abstract: The safety is ensured in such a manner that with an abnormality detection system of a secondary battery, abnormality of a secondary battery is detected, for example, a phenomenon that lowers the safety of the secondary battery is detected early, and a user is warned or the use of the secondary battery is stopped. The abnormality detection system of the secondary battery determines whether the temperature of the secondary battery is within a temperature range in which normal operation can be performed on the basis of temperature data obtained with a temperature sensor. In the case where the temperature of the secondary battery is high, a cooling device is driven by a control signal from the abnormality detection system of the secondary battery. The abnormality detection system of the secondary battery includes at least a memory means. The memory means has a function of holding an analog signal and includes a transistor using an oxide semiconductor for a semiconductor layer.
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公开(公告)号:US12009434B2
公开(公告)日:2024-06-11
申请号:US18098769
申请日:2023-01-19
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hidekazu Miyairi , Takeshi Osada , Shunpei Yamazaki
IPC: H01L29/786 , H01L21/02 , H01L21/4763 , H01L21/477 , H01L27/12 , H01L29/24 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/66
CPC classification number: H01L29/7869 , H01L21/02565 , H01L21/47635 , H01L21/477 , H01L27/1225 , H01L27/1251 , H01L27/1259 , H01L29/24 , H01L29/41733 , H01L29/42356 , H01L29/42384 , H01L29/45 , H01L29/66969 , H01L29/78621 , H01L29/78645 , H01L29/78648
Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
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公开(公告)号:US12004369B2
公开(公告)日:2024-06-04
申请号:US18196651
申请日:2023-05-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kaoru Hatano
IPC: H01L51/52 , H01L27/32 , H01L51/00 , H01L51/56 , H10K50/84 , H10K50/842 , H10K50/844 , H10K71/00 , H10K77/10 , H10K59/12 , H10K102/00
CPC classification number: H10K50/844 , H10K50/84 , H10K50/8426 , H10K71/00 , H10K77/111 , H10K59/12 , H10K71/851 , H10K2102/311 , Y02E10/549 , Y02P70/50 , Y10T29/49117
Abstract: An object of one embodiment of the present invention is to provide a more convenient highly reliable light-emitting device which can be used for a variety of applications. Another object of one embodiment of the present invention is to manufacture, without complicating the process, a highly reliable light-emitting device having a shape suitable for its intended purpose. In a manufacturing process of a light-emitting device, a light-emitting panel is manufactured which is at least partly curved by processing the shape to be molded after the manufacture of an electrode layer and/or an element layer, and a protective film covering a surface of the light-emitting panel which is at least partly curved is formed, so that a light-emitting device using the light-emitting panel has a more useful function and higher reliability.
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公开(公告)号:US11996132B2
公开(公告)日:2024-05-28
申请号:US17298964
申请日:2019-11-20
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Tatsuya Onuki , Kiyoshi Kato , Shunpei Yamazaki
IPC: G11C11/405 , G11C11/4096 , H01L27/12 , H01L29/786 , H10B12/00
CPC classification number: G11C11/405 , G11C11/4096 , H01L27/1207 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L29/78648 , H01L29/7869 , H10B12/00
Abstract: A semiconductor device includes a first transistor one of a source and a drain of which is electrically connected to a first wiring for reading data; a second transistor one of a source and a drain of which is electrically connected to a gate of the first transistor and the other of the source and the drain of which is electrically connected to a second wiring for writing the data; and a third transistor one of a source and a drain of which is electrically connected to the gate of the first transistor and the other of the source and the drain of which is electrically connected to a capacitor for retaining electric charge corresponding to the data, and the third transistor includes a metal oxide in a channel formation region.
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公开(公告)号:US11961918B2
公开(公告)日:2024-04-16
申请号:US17894197
申请日:2022-08-24
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Yasutaka Nakazawa , Yukinori Shima , Kenichi Okazaki , Junichi Koezuka , Shunpei Yamazaki
CPC classification number: H01L29/7869 , G09F9/30 , H01L21/02164 , H01L21/02172 , H01L21/02274 , H01L21/02323 , H01L21/02554 , H01L29/517 , H01L29/66742 , H05B33/10 , H05B33/14
Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided. The method for manufacturing a semiconductor device includes a first step of forming a first insulating layer containing silicon and nitrogen, a second step of adding oxygen in a vicinity of a surface of the first insulating layer, a third step of forming a semiconductor layer containing a metal oxide over and in contact with the first insulating layer, a fourth step of forming a second insulating layer containing oxygen over and in contact with the semiconductor layer, a fifth step of performing plasma treatment in an atmosphere containing oxygen at a first temperature, a sixth step of performing plasma treatment in an atmosphere containing oxygen at a second temperature lower than the first temperature, and a seventh step of forming a third insulating layer containing silicon and nitrogen over the second insulating layer.
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公开(公告)号:US11961917B2
公开(公告)日:2024-04-16
申请号:US17844767
申请日:2022-06-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazuya Hanaoka , Daisuke Matsubayashi , Yoshiyuki Kobayashi , Shunpei Yamazaki , Shinpei Matsuda
IPC: H01L29/786 , H01L29/417 , H01L29/78
CPC classification number: H01L29/7869 , H01L29/41733 , H01L29/78696 , H01L29/785 , H01L29/7854
Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
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