摘要:
Microelectronic imagers with prefabricated housings and methods of packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imager can include a microelectronic die, an image sensor, and an integrated circuit operatively coupled to the integrated circuit. The microelectronic imager also includes an optic unit having an optic member. The microelectronic imager further includes a prefabricated housing having a first mounting site and a second mounting site. The die is seated within the housing at the first mounting site and the optics unit is seated within the housing at the second mounting site in a fixed, preset position in which the optic member is situated at a desired location relative to the image sensor.
摘要:
Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要:
A method and apparatus for testing unpackaged semiconductor dice is provided. The method includes forming an interconnect-alignment fixture for use in a test apparatus adapted to hold and apply test signals to the die during burn-in and full functionality testing. The interconnect-alignment fixture includes an interconnect plate formed out of a material such as silicon. The interconnect plate includes raised contact members covered with a conductive layer and adapted to penetrate contact locations on the die to a limited penetration depth. The interconnect-alignment fixture also includes an alignment plate formed with etched alignment openings for aligning contact locations on the die with the contact members on the interconnect plate during the test procedure. In addition, the alignment plate includes access openings for establishing an electrical connection to the contact members on the interconnect plate using wire bonding or mechanical electrical connectors. The interconnect plate and alignment plate are fabricated at the wafer level and then singulated using semiconductor circuit fabrication techniques.
摘要:
Methods for supporting substrates during programmed material consolidation include securing a substrate in position over a support with a surface and, optionally, other features that receive the at least one substrate and prevent unconsolidated material from contacting undesired regions, such as the bottom surface, of the at least one substrate.
摘要:
Methods for cleaning consolidatable material from substrates or from features that have been fabricated with the material include application of pressure, force, or a cleaning agent to the substrate or feature. The pressure, force, or cleaning agent may be applied in a variety of ways. The unconsolidated material that has been removed from the substrate or feature may also be collected, optionally filtered, and reused in a subsequent programmed material consolidation process.
摘要:
Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.
摘要:
A socket contact formation process comprises forming a contact head from a conductive material, forming a contact body from a semiconductive material configured to be electrically conductive; and joining the contact head and the contact body.
摘要:
Methods of forming semiconductor packages include immersing a semiconductor device assembly in a liquid photopolymerizable resin including a plurality of discrete particles dispersed therethrough, and selectively at least partially curing portions of the resin adjacent at least one semiconductor die of the semiconductor device assembly. In some embodiments, the semiconductor device assembly may be immersed in a second liquid photopolymerizable resin having at least one physical property differing from the first liquid photopolymerizable resin, and the second liquid photopolymerizable resin may be selectively at least partially cured. Furthermore, the semiconductor die may have an active surface including an array of optically interactive semiconductor devices, and portions of the liquid photopolymerizable resin surrounding a periphery of the array may be selectively at least partially cured to form a substantially opaque support structure.
摘要:
Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In one embodiment, a method comprises providing a microelectronic substrate having a front side and a backside. The substrate has a microelectronic die including an integrated circuit and a terminal operatively coupled to the integrated circuit. The method also includes forming a passage at least partially through the substrate and having an opening at the front side and/or backside of the substrate. The method further includes sealing the opening with a conductive cap that closes one end of the passage while another end of the passage remains open. The method then includes filling the passage with a conductive material.
摘要:
Polymerized materials for forming the underfill and encapsulation structures for semiconductor package are disclosed. A filler constituent, such as boron nitride, silicates, elemental metals, or alloys, may be added to a liquid photopolymer resin to tailor the physical properties thereof upon curing. The filler constituents may be employed to alter the coefficient of thermal expansion, thermal conductivity, or electrical conductivity of the polymerized material. A number of different embodiments are disclosed that employ the above materials in selected regions of the underfill and encapsulation structures of the semiconductor package. The polymerized materials may also be used to form support structures and covers for optically interactive semiconductor devices. Methods for forming the above structures using stereolithography are also disclosed.