公开(公告)号：US20080150004A1

公开(公告)日：2008-06-26

申请号：US11688087

申请日：2007-03-19

申请人： Jian Chen ,  Xiangfeng Duan ,  Karen Cruden ,  Chao Liu ,  Madhuri L. Nallabolu ,  Srikanth Ranganathan ,  Francisco Leon ,  J. Wallace Parce

发明人： Jian Chen ,  Xiangfeng Duan ,  Karen Cruden ,  Chao Liu ,  Madhuri L. Nallabolu ,  Srikanth Ranganathan ,  Francisco Leon ,  J. Wallace Parce

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/42332 ,  H01L29/517 ,  H01L29/7881

摘要： Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide (Al2O3), hafnium oxide (HfO2), and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multistate (e.g., two, three or four bit) operation.

公开(公告)号：US07339184B2

公开(公告)日：2008-03-04

申请号：US11117707

申请日：2005-04-29

申请人： Linda T. Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert S. Dubrow ,  Stephen A. Empedocles ,  Jay L. Goldman ,  James M. Hamilton ,  David L. Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik C. Scher ,  David P. Stumbo ,  Jeffery A. Whiteford

发明人： Linda T. Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert S. Dubrow ,  Stephen A. Empedocles ,  Jay L. Goldman ,  James M. Hamilton ,  David L. Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik C. Scher ,  David P. Stumbo ,  Jeffery A. Whiteford

IPC分类号： H01L29/00

CPC分类号： C30B29/605 ,  B82Y10/00 ,  C30B11/12 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0048 ,  Y10S977/762 ,  Y10S977/938 ,  Y10T428/139 ,  Y10T428/2902 ,  Y10T428/2949

摘要： The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

摘要翻译： 本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。 本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。 本发明还提供了将纳米线整合到电子器件中的方法，包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆筒以将纳米线沉积到表面上。 还提供了使用喷墨打印机或孔径以纳米线排列纳米线的方法。 本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。 提供了收获和集成纳米线的其他方法。

公开(公告)号：US20080032134A1

公开(公告)日：2008-02-07

申请号：US11706730

申请日：2007-02-13

申请人： Jeffery Whiteford ,  Rhett Brewer ,  Mihai Buretea ,  Jian Chen ,  Karen Cruden ,  Xiangfeng Duan ,  William Freeman ,  David Heald ,  Francisco Leon ,  Chao Liu ,  Andreas Meisel ,  Kyu Min ,  J. Parce ,  Erik Scher

发明人： Jeffery Whiteford ,  Rhett Brewer ,  Mihai Buretea ,  Jian Chen ,  Karen Cruden ,  Xiangfeng Duan ,  William Freeman ,  David Heald ,  Francisco Leon ,  Chao Liu ,  Andreas Meisel ,  Kyu Min ,  J. Parce ,  Erik Scher

IPC分类号： B32B5/16 ,  B32B15/04 ,  B32B17/06

CPC分类号： C09C1/3081 ,  B82Y30/00 ,  C01P2004/16 ,  C01P2004/45 ,  C01P2004/54 ,  C01P2004/64 ,  C01P2006/10 ,  C01P2006/40 ,  C01P2006/60 ,  C09C3/006 ,  C09C3/063 ,  C09C3/12 ,  H01G4/14 ,  Y10S977/773 ,  Y10T428/2982 ,  Y10T428/2989 ,  Y10T428/2991 ,  Y10T428/2993 ,  Y10T428/2995 ,  Y10T428/2996 ,  Y10T428/2998

摘要： Ligand compositions for use in preparing discrete coated nanostructures are provided, as well as the coated nanostructures themselves and devices incorporating same. Methods for post-deposition shell formation on a nanostructure and for reversibly modifying nanostructures are also provided. The ligands and coated nanostructures of the present invention are particularly useful for close packed nanostructure compositions, which can have improved quantum confinement and/or reduced cross-talk between nanostructures.

摘要翻译： 提供了用于制备离散涂层纳米结构的配体组合物，以及涂覆的纳米结构本身和结合其的装置。 还提供了在纳米结构上沉积后壳形成和用于可逆修饰纳米结构的方法。 本发明的配体和包被的纳米结构对于紧密堆积的纳米结构组合物是特别有用的，其可以改进纳米结构的量子限制和/或减少的串扰。

公开(公告)号：US20070032091A1

公开(公告)日：2007-02-08

申请号：US11495188

申请日：2006-07-28

申请人： David Heald ,  Karen Cruden ,  Xiangfeng Duan ,  Chao Liu ,  J. Parce

发明人： David Heald ,  Karen Cruden ,  Xiangfeng Duan ,  Chao Liu ,  J. Parce

IPC分类号： H01L21/31

CPC分类号： H01L21/28008 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/28229 ,  H01L21/28273 ,  H01L21/3105 ,  Y10S977/774 ,  Y10S977/782 ,  Y10S977/845 ,  Y10S977/855 ,  Y10S977/89 ,  Y10S977/891

摘要： Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).

摘要翻译： 提供了形成或构图纳米结构阵列的方法。 所述方法包括在包含纳米结构缔合基团，自旋电介质中阵列形成，纳米结构沉积后的溶剂退火，使用抗蚀剂图案化和/或使用促进阵列形成的器件的涂层上形成阵列。 还提供了用于形成纳米结构阵列的相关器件，以及包括纳米结构阵列（例如，存储器件）的器件。

公开(公告)号：US20070012980A1

公开(公告)日：2007-01-18

申请号：US11490637

申请日：2006-07-21

申请人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

发明人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Parce ,  Jay Goldman

IPC分类号： H01L29/94 ,  H01L27/108 ,  H01L29/76 ,  H01L31/119

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

摘要： A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

公开(公告)号：US20050279274A1

公开(公告)日：2005-12-22

申请号：US11103642

申请日：2005-04-12

申请人： Chunming Niu ,  Jay Goldman ,  Xiangfeng Duan ,  Vijendra Sahi

发明人： Chunming Niu ,  Jay Goldman ,  Xiangfeng Duan ,  Vijendra Sahi

IPC分类号： C01B31/02 ,  H01L21/322

CPC分类号： B82Y40/00 ,  B82Y30/00 ,  C01B32/162 ,  C01B32/18 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention is directed to compositions of matter, systems, and methods to manufacture nanowires. In an embodiment, a buffer layer is placed on a nanowire growth substrate and catalytic nanoparticles are added to form a catalytic-coated nanowire growth substrate. Methods to develop and use this catalytic-coated nanowire growth substrate are disclosed. In a further aspect of the invention, in an embodiment a nanowire growth system using a foil roller to manufacture nanowires is provided.

摘要翻译： 本发明涉及制备纳米线的物质，体系和方法的组合物。 在一个实施方案中，将缓冲层放置在纳米线生长衬底上并加入催化纳米颗粒以形成催化涂覆的纳米线生长衬底。 公开了开发和使用该催化涂覆的纳米线生长衬底的方法。 在本发明的另一方面，在一个实施方案中，提供了使用箔辊制造纳米线的纳米线生长系统。

公开(公告)号：US08507390B2

公开(公告)日：2013-08-13

申请号：US12803568

申请日：2010-06-29

申请人： Jian Chen ,  Karen Chu Cruden ,  Xiangfeng Duan ,  Chao Liu ,  J. Wallace Parce

发明人： Jian Chen ,  Karen Chu Cruden ,  Xiangfeng Duan ,  Chao Liu ,  J. Wallace Parce

IPC分类号： H01L21/3105

CPC分类号： H01L21/28008 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/28229 ,  H01L21/28273 ,  H01L21/3105 ,  Y10S977/774 ,  Y10S977/782 ,  Y10S977/845 ,  Y10S977/855 ,  Y10S977/89 ,  Y10S977/891

摘要： Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).

摘要翻译： 提供了形成或构图纳米结构阵列的方法。 所述方法包括在包含纳米结构缔合基团，自旋电介质中阵列形成，纳米结构沉积后的溶剂退火，使用抗蚀剂图案化和/或使用促进阵列形成的器件的涂层上形成阵列。 还提供了用于形成纳米结构阵列的相关器件，以及包括纳米结构阵列（例如，存储器件）的器件。

公开(公告)号：US07932511B2

公开(公告)日：2011-04-26

申请号：US11681058

申请日：2007-03-01

申请人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

发明人： Xiangfeng Duan ,  Chunming Niu ,  Stephen Empedocles ,  Linda T. Romano ,  Jian Chen ,  Vijendra Sahi ,  Lawrence Bock ,  David Stumbo ,  J. Wallace Parce ,  Jay L. Goldman

IPC分类号： H01L29/06

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01F1/405 ,  H01L27/092 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78696 ,  H01L31/035281 ,  H01L33/18 ,  H01L33/20 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0504 ,  H01L51/0545 ,  H01L51/0595 ,  Y10S977/742 ,  Y10S977/762 ,  Y10S977/781 ,  Y10S977/789 ,  Y10S977/938

摘要： A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.

摘要翻译： 描述了具有多个半导体器件的电子基片的方法和装置。 在衬底上形成纳米线薄膜。 纳米线的薄膜形成为具有足够的纳米线密度以达到工作电流水平。 在纳米线的薄膜中限定多个半导体区域。 在半导体器件区域处形成触点，从而提供与多个半导体器件的电连接。 此外，用于制造纳米线的各种材料，包括p掺杂纳米线和n掺杂纳米线的薄膜，纳米线异质结构，发光纳米线异质结构，用于在衬底上定位纳米线的流动掩模，用于沉积纳米线的纳米线喷涂技术，用于减少或消除声子的技术 描述了纳米线中的电子散射，以及用于降低纳米线中的表面状态的技术。

公开(公告)号：US20090278125A1

公开(公告)日：2009-11-12

申请号：US12425391

申请日：2009-04-17

申请人： Xiangfeng Duan ,  Xidong Duan

发明人： Xiangfeng Duan ,  Xidong Duan

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02647 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/732 ,  H01L29/772 ,  H01L29/778 ,  H01L29/861

摘要： The present invention describes an approach to grow highly crystalline semiconductor films, multilayers of semiconductor thin films on foreign substrate such as glass, quartz. Specifically, The film were grown by first forming crystalline seeds, and transferring the seeds onto the substrate, and growing continuous semiconductor film through epitaxial growth on the seeds.

摘要翻译： 本发明描述了一种生长高结晶半导体膜的方法，在诸如玻璃，石英之类的异质衬底上的半导体薄膜的多层膜。 具体地，通过首先形成晶种并将种子转移到基底上，并通过种子上的外延生长生长连续半导体膜来生长膜。

公开(公告)号：US07595528B2

公开(公告)日：2009-09-29

申请号：US11018572

申请日：2004-12-21

申请人： Xiangfeng Duan ,  Calvin Y. H. Chow ,  David L. Heald ,  Chunming Niu ,  J. Wallace Parce ,  David P. Stumbo

发明人： Xiangfeng Duan ,  Calvin Y. H. Chow ,  David L. Heald ,  Chunming Niu ,  J. Wallace Parce ,  David P. Stumbo

IPC分类号： H01L29/788

CPC分类号： G11C11/56 ,  B82Y10/00 ,  G03G5/00 ,  G03G5/02 ,  G03G5/04 ,  G03G5/043 ,  G03G5/08 ,  G03G5/082 ,  G03G5/08214 ,  G11C13/02 ,  G11C13/025 ,  G11C2213/17 ,  G11C2213/18 ,  G11C2216/08 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/7887 ,  Y10S977/936 ,  Y10S977/943

摘要： Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device. In a multistate memory device which comprises one or more quantum dots or molecules having a plurality of discrete energy levels, a method is disclosed for charging and/or discharging the device which comprises filling each of the plurality of discrete energy levels of each dot or molecule with one or more electrons, and subsequently removing individual electrons at a time from each discrete energy level of the one or more dots or molecules.

摘要翻译： 描述了用于纳米存储器件和各向异性带电载体阵列的方法和装置。 在一方面，存储器件包括衬底，衬底的源极区域和衬底的漏极区域。 纳米元素的群体沉积在通道区域上方的衬底上，在一个实施方案中纳米的群体包括金属量子点。 隧道介电层形成在覆盖沟道区的衬底上，金属迁移势垒层沉积在电介质层上。 在纳米元件的薄膜上形成栅极接触。 纳米元件允许减少横向电荷转移。 存储器件可以是单个或多个存储器件。 在包括具有多个离散能级的一个或多个量子点或分子的多状态存储器件中，公开了一种用于对该器件进行充电和/或放电的方法，该方法包括填充每个点或分子的多个离散能级中的每一个 与一个或多个电子，并随后从一个或多个点或分子的每个离散能级一次去除单个电子。