公开(公告)号：US20050109533A1

公开(公告)日：2005-05-26

申请号：US11023012

申请日：2004-12-28

申请人： Mamoru Kurashina ,  Yoshikatsu Ishizuki ,  Nawalage Cooray ,  Masataka Mizukoshi

发明人： Mamoru Kurashina ,  Yoshikatsu Ishizuki ,  Nawalage Cooray ,  Masataka Mizukoshi

IPC分类号： H05K3/00 ,  H05K3/28 ,  H05K3/46 ,  H05K1/03 ,  H05K1/11

CPC分类号： H05K3/28 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/4647 ,  H05K2201/0367 ,  H05K2201/09881 ,  H05K2203/0508

摘要： A manufacturing method of a circuit board includes the steps of: forming projecting electrodes on a substrate; forming a photosensitive resin film on the substrate so as to cover the projecting electrodes; exposing a substantially entire surface of the photosensitive film; and melting the surface of the photosensitive film so as to expose the projecting electrodes.

摘要翻译： 电路板的制造方法包括以下步骤：在基板上形成突出电极; 在基板上形成感光树脂膜以覆盖突出电极; 曝光感光膜的大致整个表面; 并且使感光膜的表面熔融以使突出电极露出。

公开(公告)号：US20050094120A1

公开(公告)日：2005-05-05

申请号：US10974327

申请日：2004-10-27

申请人： Kazunari Sekigawa ,  Toshinori Koyama ,  Kazutaka Kobayashi ,  Masatoshi Akagawa

发明人： Kazunari Sekigawa ,  Toshinori Koyama ,  Kazutaka Kobayashi ,  Masatoshi Akagawa

IPC分类号： G03F7/20 ,  G03B27/54 ,  H01L21/027 ,  H05K3/00

CPC分类号： G03F7/70283 ,  G03F7/70291 ,  H05K3/0002 ,  H05K3/0005 ,  H05K3/0082

摘要： A direct exposure system comprises: a data mask that is a data object including drawing data; and a control mask that is a data object including at least one logical layer in which information about exposure conditions applied according to regions on a substrate is specified, and performs a direct exposure process using integrated data generated by combining the data mask with the control mask.

摘要翻译： 直接曝光系统包括：作为包括绘图数据的数据对象的数据掩模; 以及作为包括至少一个逻辑层的控制掩模，所述至少一个逻辑层指定了根据基板上的区域应用的关于曝光条件的信息，并且使用通过将数据掩模与控制掩模组合而生成的积分数据进行直接曝光处理 。

公开(公告)号：US20050056913A1

公开(公告)日：2005-03-17

申请号：US10663944

申请日：2003-09-16

申请人： Warren Farnworth

发明人： Warren Farnworth

IPC分类号： G03F7/00 ,  H01L21/48 ,  H01L21/68 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H05K3/00 ,  H05K3/44 ,  H01L23/58 ,  H01L21/331

CPC分类号： H01L21/4763 ,  B29C64/106 ,  B29C64/135 ,  G03F7/0037 ,  H01L21/486 ,  H01L21/6835 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/49827 ,  H01L2221/68345 ,  H01L2221/6835 ,  H01L2223/6622 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/445 ,  H05K2203/107 ,  H05K2203/1476 ,  H01L2924/00

摘要： A method for forming insulating precursors to via holes formed through conductive and semiconductive substrates includes use of stereolithographic processes. An unconsolidated material is introduced into a precursor hole, then regions of the unconsolidated material that are located adjacent to the surface of each precursor hole are selectively consolidated to form an insulative coating thereon. This process may be conducted once to form a single-layered insulative coating or multiple times to form multilayered insulative coatings. Subsequently, unconsolidated material may be removed to expose a via hole that extends through the insulative coating. Structures that include via holes and conductive vias that have been insulated in this manner are also disclosed, as are systems for forming the insulative coatings.

摘要翻译： 用于形成通过导电和半导体衬底形成的通孔的绝缘前体的方法包括使用立体光刻工艺。 将未固结的材料引入前体孔中，然后选择性地固化位于每个前体孔的表面附近的未固结材料的区域，以在其上形成绝缘涂层。 该方法可以进行一次以形成单层绝缘涂层或多次以形成多层绝缘涂层。 随后，可以去除未固结的材料以暴露穿过绝缘涂层的通孔。 还公开了以这种方式绝缘的通孔和导电通孔的结构，以及用于形成绝缘涂层的系统。

公开(公告)号：US20050053868A1

公开(公告)日：2005-03-10

申请号：US10934703

申请日：2004-09-07

申请人： Toshiki Naito

发明人： Toshiki Naito

IPC分类号： H05K3/00 ,  H05K3/28 ,  G03F7/00

CPC分类号： H05K3/0082 ,  H05K3/0023 ,  H05K3/28 ,  H05K2201/0108 ,  H05K2203/0191 ,  H05K2203/1545 ,  Y10S430/162 ,  Y10T156/1089 ,  Y10T156/1092 ,  Y10T156/1093 ,  Y10T156/1095 ,  Y10T156/1097 ,  Y10T156/1098

摘要： The invention provides a process for producing a wiring circuit board, which comprises the steps of: (A) forming a conductor layer of a predetermined pattern on an insulating layer; (B) forming a photosensitive solder resist layer on the insulating layer and the patterned conductor layer formed on the insulating layer; (C) disposing a transparent protective film on the photosensitive solder resist layer; and (D) exposing the photosensitive solder resist layer to a light through the transparent protective film.

摘要翻译： 本发明提供一种制造布线电路板的方法，包括以下步骤：（A）在绝缘层上形成预定图案的导体层; （B）在绝缘层上形成感光性阻焊层和形成在绝缘层上的图案化导体层; （C）在感光性阻焊层上设置透明保护膜; 和（D）将光敏抗蚀剂层曝光通过透明保护膜。

公开(公告)号：US20040191695A1

公开(公告)日：2004-09-30

申请号：US10400714

申请日：2003-03-27

发明人： Kevin Barry Ray ,  Ken-Ichi Shimazu ,  Anthony Paul Kitson

IPC分类号： G03C005/00

CPC分类号： H05K3/1283 ,  G03F7/0047 ,  H05K1/095 ,  H05K3/0082 ,  H05K3/02 ,  H05K3/125 ,  H05K2201/0257 ,  H05K2203/013 ,  H05K2203/0514 ,  H05K2203/1105 ,  Y10S430/145 ,  Y10S430/165

摘要： The present invention provides methods of making an electronic part in which a nanopaste composed of inorganic nanoparticles and a carrier is applied onto a surface of a substrate. The composition is then processed to form an electrically conductive pattern area that adheres to the surface of the substrate. Optionally, the conductivity of the pattern area may be improved by heating.

摘要翻译： 本发明提供了制造电子部件的方法，其中将由无机纳米颗粒组成的纳米糊料和载体涂覆在基材的表面上。 然后将组合物处理以形成粘附到基底表面的导电图案区域。 可选地，可以通过加热来改善图案区域的导电性。

公开(公告)号：US06738195B2

公开(公告)日：2004-05-18

申请号：US10289786

申请日：2002-11-07

申请人： Noriyoshi Matsumoto ,  Nozomu Kowatari ,  Youichi Hirabayashi

发明人： Noriyoshi Matsumoto ,  Nozomu Kowatari ,  Youichi Hirabayashi

IPC分类号： G02B1502

CPC分类号： G03F7/70308 ,  G03F7/70258 ,  H05K3/0082

摘要： An optical magnification adjustment system being capable of minutely correcting magnification. A first lens 1 of plano-convex is installed on the side of an object surface 5, and a second lens 2 of concave-plano is installed on the side of a formed image surface 7. By controlling the center space d between the first lens and the second lens, the image is enlarged or reduced. The radii of curvature R2 and R3 of the convex surface of the first lens and the concave surface of the second lens are respectively set according to the following equations. R2=(1−n1)/&phgr;2 R3=(n2−1)/&phgr;3 where, &phgr;2 and &phgr;3 represent optical power, and n1 and n2 represent refraction indexes, respectively.

摘要翻译： 能够精确校正放大率的光学倍率调节系统。 平面凸起的第一透镜1安装在物体表面5的一侧，并且凹面平面的第二透镜2安装在形成的图像表面7的侧面上。通过控制第一透镜的中心空间d 和第二透镜，图像被放大或缩小。 第一透镜的凸表面的曲率半径R2和R3以及第二透镜的凹面分别根据以下等式设置。其中，phi2和phi3分别表示光功率，n1和n2分别表示折射率。

公开(公告)号：US06700650B2

公开(公告)日：2004-03-02

申请号：US10109380

申请日：2002-03-28

申请人： Alain Sorel ,  Christophe Cousin

发明人： Alain Sorel ,  Christophe Cousin

IPC分类号： G03B2720

CPC分类号： H05K3/0082 ,  G03F7/2014 ,  G03F7/2032 ,  H05K2203/1572

摘要： A holder for exposing both faces of a panel to light in order to make a double-sided printed circuit using first and second flexible artworks. The holder has a first frame with no transparent plane support member for receiving the first flexible artwork, and a second frame with no transparent plane support member for receiving the second flexible artwork. The holder includes a system for positioning and fixing the peripheries of the artworks to their respective frames. The holder further includes a mechanism for positioning and holding the panel between the frames. There is an approach mechanism for causing the frames to move towards the faces of the panel. There is also a system for establishing suction in the volume defined between the frames having the panel therebetween.

摘要翻译： 用于使面板的两个面露出的保持器点亮，以便使用第一和第二柔性工艺制作双面印刷电路。 保持器具有第一框架，没有用于接收第一柔性图案的透明平面支撑构件，以及不具有用于接收第二柔性图案的透明平面支撑构件的第二框架。 保持器包括用于将艺术作品的周边定位和固定到其各自的框架的系统。 保持架还包括用于在框架之间定位和保持面板的机构。 存在用于使框架朝向面板的面移动的接近机构。 还有一种用于在其间具有面板的框架之间限定的体积中建立抽吸的系统。

公开(公告)号：US20040016570A1

公开(公告)日：2004-01-29

申请号：US10450182

申请日：2003-06-10

发明人： Reo Yamamoto ,  Yoshihide Yamamoto

IPC分类号： H05K001/00 ,  H01R012/04 ,  H05K003/02

CPC分类号： H01L23/49811 ,  H01L23/15 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0306 ,  H05K1/114 ,  H05K3/0008 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/246 ,  H05K3/4061 ,  H05K2201/0317 ,  H05K2201/0347 ,  H05K2201/10674 ,  H05K2203/167 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

摘要： It is an object to provide a method of efficiently manufacturing a double-sided circuit board having a metallic via hole which can suitably be used as a submount for mounting a semiconductor device, that is, a substrate in which the electrical contact of a metallic via hole and a circuit pattern is excellent and an element can easily be bonded and positioned. In a ceramic substrate having a via hole filled with a conductive material, a ceramic portion of at least one of faces of the ceramic substrate has a surface roughness of Ranull0.8 nullm, a substrate in which the conductive material filled in the via hole present on at least one of the faces is protruded from a surface of the face with a height of 0.3 to 5.0 nullm is used as a material substrate and a conductive layer is formed on the surface, and subsequently, the conductive layer is patterned and a solder film pattern for element mounting is formed based on a position of a convex portion of the conductive layer which results from the via hole present on an underlaid portion of the conductive layer.

摘要翻译： 本发明的目的是提供一种有效地制造具有金属通孔的双面电路板的方法，该金属通孔适合地用作安装半导体器件的基座，即其中金属通孔 孔和电路图案是优异的，元件可以容易地粘合和定位。 在具有填充有导电材料的通路孔的陶瓷基板中，陶瓷基板的表面的至少一面的陶瓷部分的表面粗糙度Ra <0.8μm，其中填充在通孔中的导电材料 存在于至少一个面上的表面的表面的高度为0.3〜5.0μm的面的表面被用作材料基板，并且在表面上形成导电层，接着，对导电层进行图案化和 基于存在于导电层的底层部分上的通孔产生的导电层的凸部的位置形成用于元件安装的焊料膜图案。

公开(公告)号：US06632588B2

公开(公告)日：2003-10-14

申请号：US10190873

申请日：2002-07-08

申请人： John J. Grunwald ,  Shulamit Hirsh ,  Chava Gal

发明人： John J. Grunwald ,  Shulamit Hirsh ,  Chava Gal

IPC分类号： G03F700

CPC分类号： H05K3/0082 ,  B41C1/1008 ,  B41C1/1016 ,  B41C1/1033 ,  B41C2210/02 ,  B41C2210/04 ,  B41C2210/06 ,  B41C2210/12 ,  B41C2210/24 ,  B41C2210/262 ,  G03F7/00 ,  H05K3/064 ,  H05K2203/107 ,  Y10S430/145 ,  Y10S430/146 ,  Y10S430/165

摘要： A process is described for the direct production of an imaged pattern of resist on a substrate surface (such as a pattern of etch-resistant organic resin material on the surface of a copper-clad dielectric in connection with a printed circuit board (PCB) fabrication process or in the process of producing printed plates), which process utilizes thermo-resists rather than photoresists, i.e., compositions which undergo thermally-induced, rather than photo-induced, chemical transformations. A film of thermo-resist composition applied to the substrate surface is scanned by a focused heat source (e.g., a thermal laser emitting in the IR region) in a predetermined pattern, without a phototool, to bring about localized thermally-induced chemical transformations of the composition which either directly produce the resist pattern or produce in the film a developable latent image of the pattern.

摘要翻译： 描述了用于在衬底表面上直接生产抗蚀剂成像图案的方法（例如在与印刷电路板（PCB）制造相关的铜包覆电介质的表面上的耐蚀刻有机树脂材料的图案 工艺或制造印版的过程），该方法使用热敏抗蚀剂而不是光致抗蚀剂，即经历热诱导而不是光诱导的化学转化的组合物。 通过聚焦热源（例如，在IR区域中发射的热激光）以预定的图案扫描未涂有光固体的热敏组合物膜，以产生局部热致化学转化 直接产生抗蚀剂图案或在膜中产生图案的可显影潜像的组合物

公开(公告)号：US20030190533A1

公开(公告)日：2003-10-09

申请号：US10354838

申请日：2003-01-30

申请人： Kodak Polychrome Graphics, LLC

发明人： Kevin Barry Ray ,  Anthony Paul Kitson ,  Eduard Kottmair ,  Hans-Horst Glatt ,  Stefan Hilgart

IPC分类号： G03F009/00

CPC分类号： G03F1/68 ,  G03F7/023 ,  H05K3/0076 ,  H05K3/0082 ,  Y10S430/106 ,  Y10S430/145

摘要： Imageable precursors for masks and for electronic parts comprise a polymeric layer applied to a substrate. The layer comprises at least one polymer having infra-red absorbing groups carried as pendent groups on the polymer backbone. Certain infrared absorbing groups may also act to insolubilize the polymer in a developer, until it is imagewise exposed to infra-red radiation. Imagewise application of heat, resulting from imagewise exposure of the precursor to infra-red radiation, renders the polymer layer more soluble in the developer than prior to exposure to the infra-red radiation.

摘要翻译： 用于掩模和电子部件的可成像前体包括施加到基底的聚合物层。 该层包含至少一种聚合物，其具有在聚合物主链上作为悬挂基团携带的红外线吸收基团。 某些红外吸收基团也可以起作用以使显影剂中的聚合物不溶解，直到其成像曝光于红外辐射。 由于将前体成像曝光到红外辐射而产生的图像上的热量使得聚合物层比暴露于红外线辐射之前更易于在显影剂中溶解。