公开(公告)号：US20100096816A1

公开(公告)日：2010-04-22

申请号：US12371038

申请日：2009-02-13

Applicant: PI-YING CHENG ,  KIAN-POH WONG

Inventor： PI-YING CHENG ,  KIAN-POH WONG

IPC: B62B5/02

CPC classification number: A61G5/068 ,  B62B5/02

Abstract: The present invention provides an assistant apparatus for surmounting a barrier, which comprises a carrier body, an assistant mechanism, and a sensing/driving apparatus. The assistant mechanism, disposed at a side of the carrier body, having an assistant block disposed at the end thereof, functions to place the assistant block on the ground between the carrier body and the barrier so that the carrier body is capable of surmounting the barrier through the assistance of the assistant block. The sensing/driving apparatus, coupled to the assistant mechanism, functions to drive the assistant mechanism to generate the adjusting movement according to whether the barrier is detected or not. By means of the design of the present invention, the assistant block is adopted to reduce the height surmounted by the carrier each time so that the carrier is capable of surmounting the barrier section by section.

Abstract translation: 本发明提供了一种用于超越障碍物的辅助装置，其包括载体主体，辅助机构和感测/驱动装置。 辅助机构设置在载体主体的一侧，具有设置在其末端处的辅助块，用于将辅助块放置在载体和阻挡层之间的地面上，使得载体能够覆盖屏障 通过助理块的协助。 耦合到辅助机构的感测/驱动装置用于驱动辅助机构以根据是否检测到障碍物来产生调节运动。 借助于本发明的设计，每次使用辅助块来减小承运人所承受的高度，使承运人能够逐段地跨越障碍物。

公开(公告)号：US20100051552A1

公开(公告)日：2010-03-04

申请号：US12200488

申请日：2008-08-28

Applicant: Justin B. Rohde ,  William W. Han ,  Elizabeth A. Everitt ,  Michael E. Hogard ,  Ying-Cheng Lo ,  Erin M. Copeland ,  William P. Burns

Inventor： Justin B. Rohde ,  William W. Han ,  Elizabeth A. Everitt ,  Michael E. Hogard ,  Ying-Cheng Lo ,  Erin M. Copeland ,  William P. Burns

IPC: B01D61/26 ,  A61M1/16 ,  B01D61/28 ,  B01D61/02 ,  B01F5/10 ,  B01D61/00

CPC classification number: A61M1/1656 ,  A61M1/1607 ,  A61M1/166 ,  A61M1/1674 ,  A61M1/1696 ,  A61M1/28 ,  A61M1/287

Abstract: A system for monitoring water quality for dialysis, dialysis fluids, and body fluids treated by dialysis fluids, is disclosed. The system uses microelectromechanical systems (MEMS) sensors for detecting impurities in input water or dialysis fluid, and in the prepared dialysate. These sensors may also be used to monitor and check the blood of the patient being treated. These sensors include ion-selective sensors, for ions such as ammonium or calcium, and also include amperometric array sensors, suitable for ions from chlorine or chloramines, e.g., chloride. These sensors assist in the monitoring of water supplies from a city water main or well. The sensors may be used in conjunction with systems for preparing dialysate solutions from water for use at home or elsewhere.

Abstract translation: 公开了一种用于监测透析液，透析液和通过透析液处理的体液的水质的系统。 该系统使用微机电系统（MEMS）传感器来检测输入水或透析液中的杂质，以及所制备的透析液。 这些传感器也可用于监测和检查被治疗患者的血液。 这些传感器包括用于诸如铵或钙的离子的离子选择性传感器，还包括适用于氯或氯胺（例如氯化物）的离子的电流计数阵列传感器。 这些传感器有助于监测城市水务主体或井的供水。 传感器可与用于从家庭或其他地方使用的水制备透析液的系统结合使用。

公开(公告)号：US20090284628A1

公开(公告)日：2009-11-19

申请号：US12210534

申请日：2008-09-15

Applicant: Ying-Cheng WU ,  Te-Chun CHOU

Inventor： Ying-Cheng WU ,  Te-Chun CHOU

IPC: H04N5/335 ,  H01L31/00

CPC classification number: H01L27/14618 ,  H01L27/14625 ,  H01L27/14636 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014

Abstract: An image sensor package includes an image sensor chip, a sidewall, an encapsulation glass, conductive material, and a plurality of solder balls. The image sensor chip comprises a photosensitive area, a non-photosensitive area surrounding the photosensitive area, and a plurality of bonding pads formed on the non-photosensitive area. The sidewall is located on the non-photosensitive are and defines a plurality of first through holes aligned with and corresponding to the bonding pads. The encapsulation glass is located on the sidewall. A plurality of solder balls are formed on the encapsulation glass aligned with the bonding pads, respectively. The encapsulation glass defines a plurality of second through holes each corresponding to a bonding pad and a corresponding solder ball. The image sensor package further comprises a conductive material through which the first and second through holes penetrate.

Abstract translation: 图像传感器封装包括图像传感器芯片，侧壁，封装玻璃，导电材料和多个焊球。 图像传感器芯片包括感光区域，环绕感光区域的非感光区域和形成在非感光区域上的多个接合焊盘。 侧壁位于非感光体上，并且限定与接合焊盘对准并对应于接合焊盘的多个第一通孔。 封装玻璃位于侧壁上。 分别在与焊盘对准的封装玻璃上形成多个焊球。 封装玻璃限定多个第二通孔，每个通孔对应于焊盘和相应的焊球。 图像传感器封装还包括导电材料，第一和第二通孔穿过该导电材料。

公开(公告)号：US20090267206A1

公开(公告)日：2009-10-29

申请号：US12192083

申请日：2008-08-14

Applicant: YING-CHENG WU ,  TE-CHUN CHOU

Inventor： YING-CHENG WU ,  TE-CHUN CHOU

IPC: H01L23/488

CPC classification number: H01L25/105 ,  H01L24/16 ,  H01L2224/16 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01015 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H05K3/323

Abstract: A stacked semiconductor package includes a circuit board with a number of pads disposed thereon, and a number of package units stacked on the circuit board. Each of the package units includes a substrate, a chip, an anisotropic conductive layer, and a number of conductive elements. The substrate has a first surface facing to the circuit board and a second surface opposite to the first surface, both of the first surface and the second surface have a number of pads disposed thereon. The chip is disposed on the substrate and electrically connected with the substrate. The anisotropic conductive layer is disposed between the substrate and the chip, and is capable of fixing the chip on the substrate. The conductive elements electrically connect the pads on the first surface of the substrate with the pads on the second surface of an adjacent substrate and the pads on the circuit board.

Abstract translation: 堆叠的半导体封装包括其上布置有多个焊盘的电路板和堆叠在电路板上的多个封装单元。 每个封装单元包括基板，芯片，各向异性导电层和多个导电元件。 基板具有面对电路板的第一表面和与第一表面相对的第二表面，第一表面和第二表面都具有设置在其上的多个焊盘。 芯片设置在基板上并与基板电连接。 各向异性导电层设置在基板和芯片之间，并且能够将芯片固定在基板上。 导电元件将衬底的第一表面上的焊盘与相邻衬底的第二表面上的焊盘和电路板上的焊盘电连接。

公开(公告)号：US07540672B2

公开(公告)日：2009-06-02

申请号：US11262592

申请日：2005-10-31

Applicant: Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu ,  Po-Chih Hsu

Inventor： Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu ,  Po-Chih Hsu

IPC: G03B17/00

CPC classification number: H04N5/2254 ,  G02B7/025 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/8592 ,  H04N5/2253 ,  H01L2924/00014

Abstract: A digital still camera module includes an image sensor package (2) and a lens barrel (30) mounted on the image sensor package. The image sensor package includes a substrate (20), an image sensor chip (22), and a cover (28). The substrate defines a receiving chamber (203) therein. The image sensor chip mounted in the receiving chamber of the substrate. The cover, which is transparent and has a smaller profile than that of the substrate, is secured to the top portion of the substrate thereby sealing the receiving chamber. The top portion of the substrate has an uncovered section (29) at a periphery of the cover. The lens barrel includes at least one lens (31) received therein. The lens barrel is securely attached to the uncovered section of the top portion of the substrate.

Abstract translation: 数字静态照相机模块包括安装在图像传感器封装上的图像传感器封装（2）和透镜镜筒（30）。 图像传感器封装包括基板（20），图像传感器芯片（22）和盖子（28）。 衬底在其中限定接收室（203）。 图像传感器芯片安装在基板的接收室中。 透明并且具有比基板更小的轮廓的盖被固定到基板的顶部，从而密封接收室。 衬底的顶部在盖的周边具有未覆盖部分（29）。 镜筒包括容纳在其中的至少一个透镜（31）。 透镜筒牢固地附接到基板的顶部的未覆盖部分。

公开(公告)号：US20090124085A1

公开(公告)日：2009-05-14

申请号：US12019178

申请日：2008-01-24

Applicant: Hung-Ming TSAI ,  Ying Cheng CHUANG

Inventor： Hung-Ming TSAI ,  Ying Cheng CHUANG

IPC: H01L21/311

CPC classification number: H01L21/3086 ,  H01L21/76232 ,  H01L29/1037

Abstract: The present invention discloses a method for forming a semiconductor device. The method includes providing a substrate; forming at least one first opening in the substrate to a predetermined depth and exposing a sidewall of the substrate in the first opening; forming a spacer on the sidewall and exposing a portion of the substrate in the bottom of the first opening; etching the exposed substrate in the bottom of the first opening by using the spacer as a mask to form a second opening; forming an isolation layer in the second opening and a portion of the first opening; forming a gate dielectric layer on the surface of the substrate; and forming a conductive layer covering the substrate.

Abstract translation: 本发明公开了一种形成半导体器件的方法。 该方法包括提供基板; 在所述基板中形成至少一个第一开口至预定深度，并在所述第一开口中暴露所述基板的侧壁; 在所述侧壁上形成间隔物并暴露所述第一开口底部中的所述基底的一部分; 通过使用间隔件作为掩模来蚀刻第一开口的底部中的暴露的基板以形成第二开口; 在所述第二开口中形成隔离层和所述第一开口的一部分; 在所述基板的表面上形成栅极电介质层; 以及形成覆盖所述基板的导电层。

公开(公告)号：US07476929B2

公开(公告)日：2009-01-13

申请号：US11269671

申请日：2005-11-09

Applicant: Ching-Nan Hsiao ,  Chi-Hui Lin ,  Ying-Cheng Chuang

Inventor： Ching-Nan Hsiao ,  Chi-Hui Lin ,  Ying-Cheng Chuang

IPC: H01L27/115 ,  H01L29/788

CPC classification number: H01L21/28273 ,  H01L29/66825 ,  H01L29/7887

Abstract: The present invention discloses a multi-bit stacked-type non-volatile memory having a spacer-shaped floating gate and a manufacturing method thereof. The manufacturing method includes forming a patterned dielectric layer containing arsenic on a semiconductor substrate, wherein the patterned dielectric layer defines an opening as an active area. A dielectric spacer is formed on a side wall of the patterned dielectric layer and a gate dielectric layer is formed on the semiconductor substrate. A source/drain region is formed by thermal driving method making arsenic diffusion from the patterned dielectric layer into the semiconductor substrate. A spacer-shaped floating gate is formed on the side wall of the dielectric spacer and the gate dielectric layer. An interlayer dielectric layer is formed on the spacer-shaped floating gate. A control gate is formed on the interlayer dielectric layer and fills the opening of the active area.

Abstract translation: 本发明公开了一种具有间隔型浮动栅极的多位堆叠型非易失性存储器及其制造方法。 制造方法包括在半导体衬底上形成含有砷的图案化电介质层，其中图案化电介质层限定开口作为有效区域。 在图案化电介质层的侧壁上形成介质间隔物，并在半导体衬底上形成栅极电介质层。 源极/漏极区域通过使从扩散图案化的介电层扩散到半导体衬底中的热驱动方法形成。 间隔物形状的浮栅形成在电介质隔离物的侧壁和栅介电层上。 在间隔物形浮栅上形成层间绝缘层。 在层间电介质层上形成控制栅极，填充有源区的开口。

公开(公告)号：US20080251875A1

公开(公告)日：2008-10-16

申请号：US11850619

申请日：2007-09-05

Applicant: YING-CHENG WU ,  KUN-HSIAO LIU

Inventor： YING-CHENG WU ,  KUN-HSIAO LIU

IPC: H01L23/22 ,  H01L31/0203

CPC classification number: H01L23/3121 ,  H01L23/16 ,  H01L23/3135 ,  H01L23/50 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An exemplary semiconductor package includes a substrate, at least one passive component, an insulative layer and a chip. The substrate defines a cavity therein. The at least one passive component is disposed within the cavity, and is electrically connected to the substrate. The insulative layer is received in the cavity, and encases the at least one passive component. The chip is disposed on the insulative layer, and is electrically connected to the substrate. The semiconductor package packaging the at least one passive component within the cavity and under the chip can improve a space usage thereof, thus a packaging scale of the semiconductor package could be reduced.

Abstract translation: 示例性半导体封装包括衬底，至少一个无源部件，绝缘层和芯片。 衬底在其中限定空腔。 所述至少一个无源部件设置在所述空腔内，并且电连接到所述基板。 绝缘层被接收在空腔中，并且包围至少一个无源部件。 芯片设置在绝缘层上，并与基板电连接。 封装空腔内和芯片下方的至少一个无源部件的半导体封装可以改善其空间使用，从而可以减少半导体封装的封装尺寸。

公开(公告)号：US20080110304A1

公开(公告)日：2008-05-15

申请号：US11599368

申请日：2006-11-15

Applicant: Yu-Min Cheng ,  Wen-Ying Cheng ,  Min-Hsiang Sung

Inventor： Yu-Min Cheng ,  Wen-Ying Cheng ,  Min-Hsiang Sung

IPC: B25B7/12

CPC classification number: B25B9/00

Abstract: The present invention discloses a probe clamp used for removing a damaged probe. The probe clamp includes a container, a seizing head and a push rod, and the seizing head is sheathed onto a desired removing probe. If a force is applied to drive the push rod to withdraw the seizing head, then the damaged probe can be clamped tightly for the removal. The probe clamp of the invention not only can seize the damaged probe quickly and precisely, but also can clamp and remove the probe effectively, so that the probe will not slide or touch other probes that may result in damaging more probes. Therefore, the invention improves the working efficiency and reduces the consumption of probes effectively.

Abstract translation: 本发明公开了一种用于去除损坏的探针的探针夹。 探头夹具包括容器，抓取头和推杆，并且将抓取头套在所需的移除探针上。 如果施加力来驱动推杆取出卡头，则可以将损坏的探头紧紧夹紧以进行拆卸。 本发明的探针夹具不仅可以快速，精确地抓住损伤的探头，而且可以有效地夹持和移除探头，使探针不会滑动或碰触可能导致更多探针损伤的其他探针。 因此，本发明提高了工作效率，有效降低了探针的消耗。

公开(公告)号：US20080099864A1

公开(公告)日：2008-05-01

申请号：US11695441

申请日：2007-04-02

Applicant: YING-CHENG WU ,  CHUN-HUNG LIN

Inventor： YING-CHENG WU ,  CHUN-HUNG LIN

IPC: H01L31/0232 ,  H01L21/58 ,  H01L23/48

CPC classification number: H01L31/0203 ,  H01L24/48 ,  H01L24/85 ,  H01L27/14618 ,  H01L27/14627 ,  H01L31/0232 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/16195 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A digital camera module (100) includes a chip package (110) and a lens module (130), mounted on the chip package, for forming a focused image on the chip package. The chip package includes a supporter (112), a chip (114), a plurality of wires (116), a main adhesive (118), and a cover plate (119). The supporter includes a through hole defined therethrough and has a plurality of top contacts (1130) formed thereon around the through hole. The chip is disposed in the through hole and includes a plurality of pads (1144) arranged thereon. The wires electrically connect the pads to the top contacts. The main adhesive is applied to a gap between the chip and the supporter and fixes the chip to the supporter. The cover plate is adhered and supported on the main adhesive. A method for making the chip package is also provided.

Abstract translation: 数字照相机模块（100）包括安装在芯片封装上的芯片封装（110）和透镜模块（130），用于在芯片封装上形成聚焦图像。 芯片封装包括支撑件（112），芯片（114），多个电线（116），主粘合剂（118）和盖板（119）。 支撑件包括通过其定义的通孔，并且在通孔周围形成有多个顶部触头（1130）。 芯片设置在通孔中并且包括布置在其上的多个焊盘（1144）。 电线将焊盘电连接到顶部触点。 将主要粘合剂施加到芯片和支撑件之间的间隙，并将芯片固定到支撑件上。 盖板粘接并支撑在主粘合剂上。 还提供了制造芯片封装的方法。