公开(公告)号：US6140226A

公开(公告)日：2000-10-31

申请号：US126212

申请日：1998-07-30

申请人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  John Patrick Hummel ,  Christopher Vincent Jahnes ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/76813 ,  H01L2221/1063 ,  Y10S438/945

摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

公开(公告)号：US6017814A

公开(公告)日：2000-01-25

申请号：US192133

申请日：1998-11-13

申请人： Alfred Grill ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002

摘要： A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.

摘要翻译： 描述了一种用于分离半导体芯片上的电平内的配线电平和电线的结构化介电层和制造工艺，其包括具有窄气隙的下介电层以形成电介质柱或线，以及形成在柱或细线上的上电介质层，其中 气隙用于大大降低结构化层的有效介电常数。 本发明克服了使用固体材料的介电常数较高的固体电介质层的问题。

公开(公告)号：US5869880A

公开(公告)日：1999-02-09

申请号：US596909

申请日：1996-03-13

申请人： Alfred Grill ,  Katherine Lynn Saenger

发明人： Alfred Grill ,  Katherine Lynn Saenger

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L23/485

CPC分类号： H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002

摘要： A structured dielectric layer and fabrication process for separating wiring levels and wires within a level on a semiconductor chip is described incorporating a lower dielectric layer having narrow air gaps to form dielectric pillars or lines and an upper dielectric layer formed over the pillars or fine lines wherein the air gaps function to substantially reduce the effective dielectric constant of the structured layer. The invention overcomes the problem of solid dielectric layers which would have the higher dielectric constant of the solid material used.

公开(公告)号：US5796166A

公开(公告)日：1998-08-18

申请号：US668241

申请日：1996-06-21

申请人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Thomas John Licata ,  Ronnen Andrew Roy

发明人： Paul David Agnello ,  Cyril Cabral, Jr. ,  Alfred Grill ,  Christopher Vincent Jahnes ,  Thomas John Licata ,  Ronnen Andrew Roy

IPC分类号： H01L21/28 ,  H01L21/46 ,  H01L21/8238 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/092 ,  H01L27/105 ,  H01L27/108 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L29/94

CPC分类号： H01L21/28185 ,  H01L21/28061 ,  H01L21/28202 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/4941 ,  H01L29/4958 ,  H01L29/513 ,  H01L29/518 ,  H01L29/94

摘要： A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon and has a wide process window wherein the refractory metal is selected from Ta, W, Nb, V, Ti, Zr, Hf, Cr and Mo.

公开(公告)号：US5789320A

公开(公告)日：1998-08-04

申请号：US636456

申请日：1996-04-23

申请人： Panayotis Constantinou Andricacos ,  James Hartfiel Comfort ,  Alfred Grill ,  David Edward Kotecki ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger ,  Alejandro Gabriel Schrott

发明人： Panayotis Constantinou Andricacos ,  James Hartfiel Comfort ,  Alfred Grill ,  David Edward Kotecki ,  Vishnubhai Vitthalbhai Patel ,  Katherine Lynn Saenger ,  Alejandro Gabriel Schrott

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/44

CPC分类号： H01L27/1085 ,  H01L28/60

摘要： Noble metal plating on a preexisting seed layer is used in the fabrication of electrodes for DRAM and FRAM. The plating may be spatially selective or nonselective. In the nonselective case, a blanket film is first plated and then patterned after deposition by spatially selective material removal. In the selective case, the plated deposits are either selectively grown in lithographically defined areas by a through-mask plating technique, or selectively grown as a conformal coating on the exposed regions of a preexisting electrode structure. A diamond-like carbon mask can be used in the plating process. A self-aligned process is disclosed for selectively coating insulators in a through-mask process.

摘要翻译： 用于DRAM和FRAM的电极的制造中使用预先存在的种子层上的贵金属电镀。 电镀可以是空间选择性的或非选择性的。 在非选择性情况下，首先将覆盖膜镀覆，然后通过空间选择性材料去除在沉积后进行图案化。 在选择性情况下，电镀沉积物可以通过通孔掩模技术在光刻定义的区域中选择性地生长，或者在预先存在的电极结构的暴露区域上选择性地生长为保形涂层。 在电镀工艺中可以使用类金刚石碳膜。 公开了一种自对准工艺，用于在通过掩模工艺中选择性地涂覆绝缘体。

公开(公告)号：US5440507A

公开(公告)日：1995-08-08

申请号：US350249

申请日：1994-12-06

申请人： Michael J. Brady ,  Bodil E. Braren ,  Richard J. Gambino ,  Alfred Grill ,  Vishnubhai V. Patel

发明人： Michael J. Brady ,  Bodil E. Braren ,  Richard J. Gambino ,  Alfred Grill ,  Vishnubhai V. Patel

IPC分类号： B41M5/26 ,  G11B7/00 ,  G11B7/0045 ,  G11B7/0055 ,  G11B7/24 ,  G11B7/243 ,  G11B7/258 ,  G11B7/30 ,  G11C11/42 ,  G11C13/04

CPC分类号： G11B7/258 ,  G11B7/00454 ,  G11B7/00557 ,  G11B7/24 ,  G11B7/243 ,  G11B2007/2431 ,  G11B2007/24312 ,  G11B2007/24322 ,  G11B2007/24328 ,  Y10S430/146 ,  Y10S430/165

摘要： A method and apparatus for storing data is provided incorporating an amorphous solid having covalent bonds and a first index of refraction and an energy source for thermally heating selected areas of the amorphous solid to change the index of refraction without melting or substantially crystallizing the amorphous solid. The invention overcomes the problem of corrosion, moisture, or microbial attack resulting in deterioration of the storage medium over time, i.e., 100 years.

摘要翻译： 提供一种用于存储数据的方法和装置，其包含具有共价键和第一折射率的无定形固体和用于热加热非晶形固体的选定区域的能量源，以改变折射率而不熔化或基本上使无定形固体结晶。 本发明克服了腐蚀，潮湿或微生物侵袭的问题，导致存储介质随着时间，即100年的劣化。

公开(公告)号：US5302266A

公开(公告)日：1994-04-12

申请号：US951924

申请日：1992-09-25

申请人： Henry J. Grabarz ,  Alfred Grill ,  William M. Holber ,  Joseph S. Logan ,  James T. C. Yeh

发明人： Henry J. Grabarz ,  Alfred Grill ,  William M. Holber ,  Joseph S. Logan ,  James T. C. Yeh

IPC分类号： C23C14/34 ,  C23C14/04 ,  C23C14/32 ,  C23C14/35 ,  H01J37/32 ,  H01L21/285 ,  H01L21/768 ,  H05H1/18

CPC分类号： C23C14/046 ,  C23C14/32 ,  C23C14/357 ,  H01J37/32009 ,  H01J37/32623 ,  H01J37/32678 ,  H01L21/76877 ,  H01J2237/3327

摘要： An electron cyclotron resonance plasma heating apparatus system and process in which microwave energy is transmitted directly in an axial direction through an evacuated chamber to generate energetic electrons. These energetic electrons spiral around the magnetic field lines formed by the solenoid and spiral substantially parallel to the axis. A metal atom vapor source transmits the metal atom vapor into the chamber through a housing port in the chamber wall. The metal atom vapor source in the housing is out of the line of sight of the substrate. The metal atoms are ionized by the energized electrons, and these ionized metal atoms are confined to the plasma column substantially free of neutral atoms as such ionized metal approaches and contacts the substrate in said evacuated chamber. In this way, the ionized metal atoms substantially avoid contact with the wall of chamber. A sputter target of a second metal may be placed in the plane of the substrate and a bias voltage applied to the target. Atoms of the second metal are then sputtered off and ionized by the plasma and are deposited on the substrate with the first metal ions.

摘要翻译： 电子回旋共振等离子体加热装置系统和微波能量通过真空室沿轴向直接传递以产生高能电子的过程。 这些高能电子围绕由螺线管形成的磁场线与螺旋线基本平行。 金属原子蒸汽源通过室壁中的壳体端口将金属原子蒸气传输到室中。 壳体中的金属原子蒸汽源不在衬底的视线之内。 金属原子被激发电子电离，这些离子化的金属原子被限制在基本上不含中性原子的等离子体柱上，因为这样的电离金属靠近并接触所述真空室中的衬底。 以这种方式，电离金属原子基本上避免与室的壁接触。 可以将第二金属的溅射靶放置在基板的平面中，并将偏置电压施加到靶。 然后将第二金属的原子溅射并通过等离子体离子化，并用第一金属离子沉积在基底上。

公开(公告)号：US08877340B2

公开(公告)日：2014-11-04

申请号：US12844029

申请日：2010-07-27

申请人： Jack O. Chu ,  Christos Dimitrakopoulos ,  Marcus O. Freitag ,  Alfred Grill ,  Timothy J. McArdle ,  Chun-Yung Sung ,  Robert L. Wisnieff

发明人： Jack O. Chu ,  Christos Dimitrakopoulos ,  Marcus O. Freitag ,  Alfred Grill ,  Timothy J. McArdle ,  Chun-Yung Sung ,  Robert L. Wisnieff

IPC分类号： B32B9/00

CPC分类号： H01L21/02527 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/188 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02516 ,  Y10T428/30

摘要： A graphene layer is formed on a crystallographic surface having a non-hexagonal symmetry. The crystallographic surface can be a surface of a single crystalline semiconductor carbide layer. The non-hexagonal symmetry surface of the single crystalline semiconductor carbide layer is annealed at an elevated temperature in ultra-high vacuum environment to form the graphene layer. During the anneal, the semiconductor atoms on the non-hexagonal surface of the single crystalline semiconductor carbide layer are evaporated selective to the carbon atoms. As the semiconductor atoms are selectively removed, the carbon concentration on the surface of the semiconductor-carbon alloy layer increases. Despite the non-hexagonal symmetry of the surface of the semiconductor-carbon alloy layer, the remaining carbon atoms can coalesce to form a graphene layer having hexagonal symmetry.

摘要翻译： 在具有非六边形对称性的结晶表面上形成石墨烯层。 晶体表面可以是单晶半导体碳化物层的表面。 单晶半导体碳化物层的非六边形对称表面在超高真空环境中在升高的温度下退火以形成石墨烯层。 在退火过程中，单晶半导体碳化物层的非六边形表面上的半导体原子对碳原子有选择性的蒸发。 随着半导体原子被选择性地去除，半导体 - 碳合金层表面上的碳浓度增加。 尽管半导体 - 碳合金层的表面具有非六边形对称性，但剩余的碳原子可以聚结形成具有六边形对称性的石墨烯层。

公开(公告)号：US08680511B2

公开(公告)日：2014-03-25

申请号：US13369901

申请日：2012-02-09

申请人： Christos D. Dimitrakopoulos ,  Damon B. Farmer ,  Alfred Grill ,  Yu-Ming Lin ,  Deborah A. Neumayer ,  Dirk Pfeiffer ,  Wenjuan Zhu

发明人： Christos D. Dimitrakopoulos ,  Damon B. Farmer ,  Alfred Grill ,  Yu-Ming Lin ,  Deborah A. Neumayer ,  Dirk Pfeiffer ,  Wenjuan Zhu

IPC分类号： H01L29/06

CPC分类号： H01L21/0237 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/02378 ,  H01L21/02527 ,  H01L21/02617 ,  H01L21/02661 ,  H01L29/1606 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/66045 ,  H01L29/7781 ,  H01L29/78684

摘要： A silicon nitride layer is provided on an uppermost surface of a graphene layer and then a hafnium dioxide layer is provided on an uppermost surface of the silicon nitride layer. The silicon nitride layer acts as a wetting agent for the hafnium dioxide layer and thus prevents the formation of discontinuous columns of hafnium dioxide atop the graphene layer. The silicon nitride layer and the hafnium dioxide layer, which collectively form a low EOT bilayer gate dielectric, exhibit continuous morphology atop the graphene layer.

摘要翻译： 在石墨烯层的最上表面上设置氮化硅层，然后在氮化硅层的最上表面上设置二氧化铪层。 氮化硅层用作二氧化铪层的润湿剂，从而防止在石墨烯层顶上形成不连续的二氧化铪塔。 共同形成低EOT双层栅极电介质的氮化硅层和二氧化铪层在石墨烯层的顶部呈现连续的形态。

公开(公告)号：US08361853B2

公开(公告)日：2013-01-29

申请号：US12902620

申请日：2010-10-12

申请人： Guy Cohen ,  Christos D. Dimitrakopoulos ,  Alfred Grill ,  Robert L. Wisnieff

发明人： Guy Cohen ,  Christos D. Dimitrakopoulos ,  Alfred Grill ,  Robert L. Wisnieff

IPC分类号： H01L29/06 ,  H01L21/336

CPC分类号： H01L29/775 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/1606 ,  H01L29/66439 ,  H01L29/78684

摘要： The present disclosure provides a semiconductor structure including a nanoribbon-containing layer of alternating graphene nanoribbons separated by alternating insulating ribbons. The alternating graphene nanoribbons are parallel to a surface of an underlying substrate and, in some embodiments, might be oriented along crystallographic directions of the substrate. The alternating insulating ribbons may comprise hydrogenated graphene, i.e., graphane, fluorinated graphene, or fluorographene. The semiconductor structure mentioned above can be formed by selectively converting portions of an initial graphene layer into alternating insulating ribbons, while the non-converted portions of the initial graphene form the alternating graphene nanoribbons. Semiconductor devices such as, for example, field effect transistors, can be formed atop the semiconductor structure provided in the present disclosure.

摘要翻译： 本公开提供了一种半导体结构，其包括由交替的绝缘带分开的交替的石墨烯纳米带的纳米带层。 交替的石墨烯纳米带平行于下面的基底的表面，并且在一些实施方案中可以沿着基底的结晶方向取向。 交替的绝缘带可以包括氢化石墨烯，即塔帕尼，氟化石墨烯或荧光荧光物质。 上述半导体结构可以通过将初始石墨烯层的部分选择性地转换为交替绝缘带而形成，而初始石墨烯的未转化部分形成交替的石墨烯纳米带。 诸如场效应晶体管的半导体器件可以形成在本公开中提供的半导体结构的顶部。