公开(公告)号：US20170345944A1

公开(公告)日：2017-11-30

申请号：US15169451

申请日：2016-05-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Shih-Yen Lin ,  Chi-Wen Liu ,  Chong-Rong Wu ,  Xian-Rui Chang

IPC分类号： H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02

CPC分类号： H01L29/78696 ,  H01L21/02568 ,  H01L21/0262 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/66969 ,  H01L29/778 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78687

摘要： The present disclosure provides a semiconductor device in accordance with some embodiments. The semiconductor device includes a first transition metal dichalcogenide film on a substrate; a second transition metal dichalcogenide film on the first transition metal dichalcogenide film; source and drain features formed over the second transition metal dichalcogenide film; and a first gate stack formed over the second transition metal dichalcogenide film and interposed between the source and drain feature.

公开(公告)号：US09773662B1

公开(公告)日：2017-09-26

申请号：US15173105

申请日：2016-06-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  NATIONAL TAIWAN UNIVERSITY

发明人： Miin-Jang Chen ,  Chi-Wen Liu ,  Po-Hsien Cheng

IPC分类号： H01L21/00 ,  H01L21/02 ,  H01L21/311 ,  H01L29/78 ,  H01L29/161 ,  H01L29/66

CPC分类号： H01L21/0228 ,  H01L21/02164 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/0673 ,  H01L29/161 ,  H01L29/66795 ,  H01L29/785

摘要： In a method for fabricating a fine structure, a metal oxide layer is formed by using an atomic layer deposition over a substrate, and the metal oxide layer is removed. An interfacial oxide layer is formed between the metal oxide layer and the substrate. The interfacial oxide layer is an oxide of an element constituting the substrate, and the interfacial oxide layer is removed.

公开(公告)号：US20170110559A1

公开(公告)日：2017-04-20

申请号：US15392579

申请日：2016-12-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Harry-Hak-Lay Chuang ,  Cheng-Cheng Kuo ,  Chi-Wen Liu ,  Ming Zhu

IPC分类号： H01L29/66 ,  H01L29/786 ,  H01L21/324 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/265 ,  H01L29/423 ,  H01L29/06

CPC分类号： H01L29/66977 ,  H01L21/26513 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0657 ,  H01L29/42392 ,  H01L29/66356 ,  H01L29/66666 ,  H01L29/66742 ,  H01L29/7391 ,  H01L29/78618 ,  H01L29/78642

摘要： A method for forming a tunneling field-effect transistor (TFET) is disclosed. The method includes etching a semiconductor substrate to form a semiconductor protrusion that protrudes out from a top surface of the semiconductor substrate, forming a drain region in lower portion of the semiconductor protrusion, and patterning a gate stack layer to form a gate stack. The gate stack has a gating surface that directly contacts and wraps around a middle portion of the semiconductor protrusion. The method further includes forming a source region in an upper portion of the semiconductor protrusion and forming a source contact over the source region, the source contact have a first width that is larger than a width of the source region.

公开(公告)号：US20150054039A1

公开(公告)日：2015-02-26

申请号：US13970790

申请日：2013-08-20

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Ching ,  Zhi-Chang Lin ,  Chao Hsiung Wang ,  Chi-Wen Liu

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/76

CPC分类号： H01L29/785 ,  H01L21/76 ,  H01L21/76229 ,  H01L29/66795

摘要： The present disclosure relates to a Fin field effect transistor (FinFET) device having epitaxial enhancement structures, and an associated method of fabrication. In some embodiments, the FinFET device has a semiconductor substrate having a plurality of isolation regions overlying the semiconductor substrate. A plurality of three-dimensional fins protrude from a top surface of the semiconductor substrate at locations between the plurality of isolation regions. Respective three-dimensional fins have an epitaxial enhancement structure that introduces a strain into the three-dimensional fin. The epitaxial enhancement structures are disposed over a semiconductor material within the three-dimensional fin at a position that is more than 10 nanometers above a bottom of an adjacent isolation region. Forming the epitaxial enhancement structure at such a position provides for sufficient structural support to avoid isolation region collapse.

摘要翻译： 本公开涉及具有外延增强结构的Fin场效应晶体管（FinFET）器件及其相关制造方法。 在一些实施例中，FinFET器件具有半导体衬底，其具有覆盖半导体衬底的多个隔离区域。 在多个隔离区域之间的位置处，多个三维翅片从半导体衬底的顶表面突出。 相应的三维翅片具有向三维翅片引入应变的外延增强结构。 外延增强结构被布置在三维鳍片内的半导体材料上方，位于相邻隔离区域的底部之上超过10纳米的位置。 在这样的位置形成外延增强结构提供足够的结构支撑以避免隔离区域崩溃。

公开(公告)号：US12068383B2

公开(公告)日：2024-08-20

申请号：US17813110

申请日：2022-07-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC分类号： H01L29/417 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/088 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78 ,  H10B12/00

CPC分类号： H01L29/41791 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/41725 ,  H01L29/41783 ,  H01L29/456 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66636 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/7831 ,  H01L29/785 ,  H10B12/056 ,  H01L29/66545

摘要： A method includes forming a gate stack on a middle portion of s semiconductor fin, and forming a first gate spacer on a sidewall of the gate stack. After the first gate spacer is formed, a template dielectric region is formed to cover the semiconductor fin. The method further includes recessing the template dielectric region. After the recessing, a second gate spacer is formed on the sidewall of the gate stack. The end portion of the semiconductor fin is etched to form a recess in the template dielectric region. A source/drain region is epitaxially grown in the recess.

公开(公告)号：US12034077B2

公开(公告)日：2024-07-09

申请号：US17663267

申请日：2022-05-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC分类号： H01L29/78 ,  B82Y10/00 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/165

CPC分类号： H01L29/7856 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78696 ,  H01L29/165 ,  H01L2029/7858

摘要： A device includes a first semiconductor strip, a first gate dielectric encircling the first semiconductor strip, a second semiconductor strip overlapping the first semiconductor strip, and a second gate dielectric encircling the second semiconductor strip. The first gate dielectric contacts the first gate dielectric. A gate electrode has a portion over the second semiconductor strip, and additional portions on opposite sides of the first and the second semiconductor strips and the first and the second gate dielectrics.

公开(公告)号：US11631768B2

公开(公告)日：2023-04-18

申请号：US16459511

申请日：2019-07-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  NATIONAL TAIWAN UNIVERSITY

发明人： Huang-Siang Lan ,  CheeWee Liu ,  Chi-Wen Liu ,  Shih-Hsien Huang ,  I-Hsieh Wong ,  Hung-Yu Yeh ,  Chung-En Tsai

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/165 ,  H01L27/092 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8238

摘要： A semiconductor device includes a fin extending along a first direction over a substrate, and a gate structure extending in a second direction overlying the fin. The gate structure includes a gate dielectric layer overlying the fin, a gate electrode overlying the gate dielectric layer, and insulating gate sidewalls on opposing lateral surfaces of the gate electrode extending along the second direction. A source/drain region is formed in the fin in a region adjacent the gate electrode structure, and a stressor layer is between the source/drain region and the semiconductor substrate. The stressor layer includes GeSn or SiGeSn containing 1019 atoms cm−3 or less of a dopant, and a portion of the fin under the gate structure is a channel region.

公开(公告)号：US20220310826A1

公开(公告)日：2022-09-29

申请号：US17842193

申请日：2022-06-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Kuo-Cheng Chiang ,  Ching-Wei Tsai ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC分类号： H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/02 ,  H01L21/283 ,  H01L29/78

摘要： Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.

公开(公告)号：US20220302257A1

公开(公告)日：2022-09-22

申请号：US17805719

申请日：2022-06-07

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yi Peng ,  Hung-Li Chiang ,  Yu-Lin Yang ,  Chih Chieh Yeh ,  Yee-Chia Yeo ,  Chi-Wen Liu

IPC分类号： H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L21/308 ,  H01L27/12 ,  H01L29/775 ,  H01L29/786 ,  H01L29/423 ,  H01L21/306 ,  H01L21/84

摘要： Transistor structures and methods of forming transistor structures are provided. The transistor structures include alternating layers of a first epitaxial material and a second epitaxial material. In some embodiments, one of the first epitaxial material and the second epitaxial material may be removed for one of an n-type or p-type transistor. A bottommost layer of the first epitaxial material and the second epitaxial material maybe be removed, and sidewalls of one of the first epitaxial material and the second epitaxial material may be indented or recessed.

公开(公告)号：US20220271165A1

公开(公告)日：2022-08-25

申请号：US17663267

申请日：2022-05-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Kuo-Cheng Chiang ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  B82Y10/00 ,  H01L29/06

摘要： A device includes a first semiconductor strip, a first gate dielectric encircling the first semiconductor strip, a second semiconductor strip overlapping the first semiconductor strip, and a second gate dielectric encircling the second semiconductor strip. The first gate dielectric contacts the first gate dielectric. A gate electrode has a portion over the second semiconductor strip, and additional portions on opposite sides of the first and the second semiconductor strips and the first and the second gate dielectrics.