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    METHODS FOR PROCESSING A SUBSTRATE HAVING A BACKSIDE LAYER
    62.
    发明申请
    METHODS FOR PROCESSING A SUBSTRATE HAVING A BACKSIDE LAYER 审中-公开
    用于处理具有背层的基板的方法

    公开(公告)号：US20090075095A1

    公开(公告)日：2009-03-19

    申请号：US12208865

    申请日：2008-09-11

    Applicant: Igor Ivanov ,  Tony Chiang ,  Chi-I Lang

    Inventor： Igor Ivanov ,  Tony Chiang ,  Chi-I Lang

    IPC: B32B27/30 ,  B32B9/00 ,  B44C1/22 ,  B05D1/18 ,  C25D5/02

    CPC classification number: C25D5/028 ,  C25D5/34 ,  C25D7/12 ,  H01L21/6835 ,  Y10T428/31855

    Abstract: Methods for processing a substrate utilizing a backside layer are presented including: receiving a substrate, the substrate including a front side and a backside; forming the backside layer on the backside of the substrate; and performing at least one processing operation on the front side of the substrate, wherein the backside layer protects the backside of the substrate during the performing the at least one processing operation. In some embodiments, methods further include cross-linking the backside layer such that the backside layer is stabilized. In some embodiments, methods further include: functionalizing the backside layer, where the functionalizing alters a chemical characteristic of the backside layer, and where the functionalizing includes a functional group such as: a hydroxyl group, an amino group, a mercapto group, a fluorine group, a chlorine group, an alkene group, an aryle group, and a carboxy group.

    Abstract translation: 提供了利用背面层处理衬底的方法，包括：接收衬底，所述衬底包括正面和背面; 在衬底的背面形成背面层; 以及在所述基板的前侧执行至少一个处理操作，其中所述背面层在执行所述至少一个处理操作期间保护所述基板的背面。 在一些实施方案中，方法还包括交联背面层，使得背侧层是稳定的。 在一些实施方案中，方法还包括：功能化背面层，其中官能化改变背面层的化学特性，并且官能化包括官能团如羟基，氨基，巯基，氟 基团，氯基团，烯烃基团，芳基基团和羧基基团。

    Methods for forming nonvolatile memory elements with resistive-switching metal oxides
    64.
    发明申请
    Methods for forming nonvolatile memory elements with resistive-switching metal oxides 有权
    用电阻式开关金属氧化物形成非易失性存储元件的方法

    公开(公告)号：US20080220601A1

    公开(公告)日：2008-09-11

    申请号：US11714334

    申请日：2007-03-05

    Applicant: Nitin Kumar ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang ,  Prashant B. Phatak

    Inventor： Nitin Kumar ,  Jinhong Tong ,  Chi-I Lang ,  Tony Chiang ,  Prashant B. Phatak

    IPC: H01L21/20 ,  H01L21/4763

    CPC classification number: H01L45/04 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608

    Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed by depositing a metal-containing material on a silicon-containing material. The metal-containing material may be oxidized to form a resistive-switching metal oxide. The silicon in the silicon-containing material reacts with the metal in the metal-containing material when heat is applied. This forms a metal silicide lower electrode for the nonvolatile memory element. An upper electrode may be deposited on top of the metal oxide. Because the silicon in the silicon-containing layer reacts with some of the metal in the metal-containing layer, the resistive-switching metal oxide that is formed is metal deficient when compared to a stoichiometric metal oxide formed from the same metal.

    Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以通过将含金属的材料沉积在含硅材料上而形成。 含金属材料可以被氧化以形成电阻式开关金属氧化物。 当施加热量时，含硅材料中的硅与含金属材料中的金属反应。 这形成用于非易失性存储元件的金属硅化物下电极。 上部电极可以沉积在金属氧化物的顶部。 由于含硅层中的硅与含金属层中的一些金属反应，与由相同金属形成的化学计量的金属氧化物相比，形成的电阻 - 开关金属氧化物是金属缺陷的。

    Methods for discretized processing of regions of a substrate
    67.
    发明申请
    Methods for discretized processing of regions of a substrate 有权
    离子处理基板区域的方法

    公开(公告)号：US20070082487A1

    公开(公告)日：2007-04-12

    申请号：US11352016

    申请日：2006-02-10

    Applicant: Tony Chiang ,  David Lazovsky ,  Thomas Boussie ,  Alexander Gorer

    Inventor： Tony Chiang ,  David Lazovsky ,  Thomas Boussie ,  Alexander Gorer

    IPC: H01L21/44

    CPC classification number: H01L21/76849 ,  B82Y30/00 ,  H01L21/67051 ,  H01L21/67126

    Abstract: The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is processed by delivering materials to or modifying regions of the substrate.

    Abstract translation: 本发明提供了用于基板区域的离散化，组合处理的方法和系统，例如用于集成电路制造中使用的新材料，工艺和工艺顺序集成方案的发现，实现，优化和鉴定。 通过将材料输送到衬底或修改衬底的区域来处理其上具有差分处理区域阵列的衬底。

    Processing substrates using site-isolated processing
    69.
    发明申请
    Processing substrates using site-isolated processing 有权
    使用现场隔离处理处理衬底

    公开(公告)号：US20060292845A1

    公开(公告)日：2006-12-28

    申请号：US11418689

    申请日：2006-05-05

    Applicant: Tony Chiang ,  David Lazovsky ,  Sandra Malhotra

    Inventor： Tony Chiang ,  David Lazovsky ,  Sandra Malhotra

    IPC: C23C16/00 ,  H01L21/44

    CPC classification number: H01L22/26 ,  H01L21/32051 ,  H01L21/67028 ,  H01L21/6708 ,  H01L21/67207 ,  H01L21/67745 ,  H01L21/76834 ,  H01L21/76841 ,  H01L21/76849 ,  H01L21/76871

    Abstract: Substrate processing systems and methods are described for processing substrates having two or more regions. The processing includes one or more of molecular self-assembly and combinatorial processing. At least one of materials, processes, processing conditions, material application sequences, and process sequences is different for the processing in at least one region of the substrate relative to at least one other region of the substrate. Processing systems are described that include numerous processing modules. The modules include a site-isolated reactor (SIR) configured for one or more of molecular self-assembly and combinatorial processing of a substrate.

    Abstract translation: 描述了用于处理具有两个或更多个区域的基板的基板处理系统和方法。 该处理包括分子自组装和组合处理中的一种或多种。 材料，工艺，加工条件，材料应用顺序和工艺顺序中的至少一个不同于衬底相对于衬底的至少一个其它区域的至少一个区域中的处理。 描述了包括许多处理模块的处理系统。 模块包括配置用于衬底的分子自组装和组合处理中的一个或多个的位点隔离反应器（SIR）。

    Method of depositing a metal seed layer on semiconductor substrates
    70.
    发明申请
    Method of depositing a metal seed layer on semiconductor substrates 失效
    在半导体衬底上沉积金属种子层的方法

    公开(公告)号：US20050085068A1

    公开(公告)日：2005-04-21

    申请号：US10981319

    申请日：2004-11-03

    Applicant: Tony Chiang ,  Gongda Yao ,  Peijun Ding ,  Fusen Chen ,  Barry Chin ,  Gene Kohara ,  Zheng Xu ,  Hong Zhang

    Inventor： Tony Chiang ,  Gongda Yao ,  Peijun Ding ,  Fusen Chen ,  Barry Chin ,  Gene Kohara ,  Zheng Xu ,  Hong Zhang

    IPC: H01L21/285 ,  H01L21/768 ,  H01L21/4763

    CPC classification number: H01L21/76843 ,  C23C14/046 ,  C23C14/165 ,  H01L21/2855 ,  H01L21/76805 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76871 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76883

    Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using an ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) of the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.

    Abstract translation: 我们公开了使用离子沉积溅射在半导体特征表面上施加雕刻层的材料的方法，其中施加有雕刻层的表面被保护以通过冲击沉积层的离子来抵抗侵蚀和污染，所述方法包括 步骤：a）以足够低的衬底偏压施加雕刻层的第一部分，使得施加所述雕刻层的表面不会以对所述半导体器件的性能或寿命有害的量被腐蚀掉或污染; 以及b）将所述雕刻层的后续部分施加足够高的衬底偏压，以从所述第一部分雕刻形状，同时沉积附加层材料。 该方法特别适用于在半导体特征表面上雕刻阻挡层，润湿层和导电层，并且当导电层是铜时尤其有用。 在施加阻挡层时，使用标准溅射技术或使用离子沉积等离子体将阻挡层材料的第一部分沉积在衬底表面上，但是与足够低的衬底偏置电压（包括没有施加的衬底电压）组合， 受离子影响的表面不会以对器件性能或寿命有害的量溅射。 随后，使用离子沉积溅射在增加的衬底偏置电压下施加阻挡材料的第二部分，这导致阻挡层材料的第一部分的再溅射（雕刻），同时能够进行更多的各向异性沉积新沉积的材料。 应用于特征的导电材料，特别是铜种子层可以使用与上述参考阻挡层所述相同的雕刻技术来实现。

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