公开(公告)号：US20090085166A1

公开(公告)日：2009-04-02

申请号：US12243201

申请日：2008-10-01

Applicant: Noriyuki IWAMURO

Inventor： Noriyuki IWAMURO

IPC: H01L29/20 ,  H01L21/20

CPC classification number: H01L29/7802 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/417 ,  H01L29/41741 ,  H01L29/872

Abstract: A gallium nitride semiconductor device is disclosed that can be made by an easy manufacturing method. The device includes a silicon substrate, buffer layers formed on the top surface of the silicon substrate, and gallium nitride grown layers formed thereon. The silicon substrate has trenches 12 formed from the bottom surface, each trench having a depth reaching the gallium nitride grown layer through the silicon substrate and the buffer layers. The inside surface of each of the trenches and the bottom surface of the silicon substrate is covered with a drain electrode as a metal film. The vertical gallium nitride semiconductor device with this structure allows an electric current to flow in the direction of the thickness of the silicon substrate regardless of the resistance values of the gallium nitride grown layers and the buffer layers.

Abstract translation: 公开了可以通过简单的制造方法制造的氮化镓半导体器件。 该器件包括硅衬底，形成在硅衬底的顶表面上的缓冲层和形成在其上的氮化镓生长层。 硅衬底具有从底表面形成的沟槽12，每个沟槽具有通过硅衬底和缓冲层到达氮化镓生长层的深度。 每个沟槽的内表面和硅衬底的底表面被作为金属膜的漏电极覆盖。 具有这种结构的垂直氮化镓半导体器件允许电流在硅衬底的厚度方向上流动，而与氮化镓生长层和缓冲层的电阻值无关。

公开(公告)号：US07394094B2

公开(公告)日：2008-07-01

申请号：US11320316

申请日：2005-12-29

Applicant: Jonathan E. Halpert ,  Moungi G. Bawendi

Inventor： Jonathan E. Halpert ,  Moungi G. Bawendi

IPC: H01L35/24 ,  H01L51/00

CPC classification number: H01L29/267 ,  B82Y10/00 ,  B82Y30/00 ,  C30B29/60 ,  H01L21/02439 ,  H01L21/02521 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/165 ,  H01L29/205 ,  H01L29/225

Abstract: A semiconductor nanocrystal can have a barbell shape. The nanocrystal can include two semiconductor materials selected so that upon excitation, one charge carrier is substantially confined to the one semiconductor material and the other charge carrier is substantially confined to the other semiconductor material.

Abstract translation: 半导体纳米晶体可以具有杠铃形状。 纳米晶体可以包括选择的两种半导体材料，使得在激发时，一个电荷载体基本上限制在一个半导体材料上，另一个电荷载体基本上限制在另一个半导体材料上。

公开(公告)号：US20070194329A1

公开(公告)日：2007-08-23

申请号：US11707926

申请日：2007-02-20

Applicant: Hee-Jin Kim

Inventor： Hee-Jin Kim

IPC: H01L33/00 ,  H01L31/12 ,  H01L27/15 ,  H01L29/26

CPC classification number: H01L33/007 ,  H01L21/0242 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02647

Abstract: There is provided a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises a first nitride semiconductor layer including amorphous powder, an active layer on the first nitride semiconductor layer, and a second nitride semiconductor layer on the active layer.

Abstract translation: 提供了一种氮化物半导体发光器件。 氮化物半导体发光器件包括第一氮化物半导体层，包括无定形粉末，第一氮化物半导体层上的有源层和有源层上的第二氮化物半导体层。

公开(公告)号：US20070085093A1

公开(公告)日：2007-04-19

申请号：US11533965

申请日：2006-09-21

Applicant: Akira Ohmae ,  Michinori Shiomi ,  Noriyuki Futagawa ,  Takaaki Ami ,  Takao Miyajima ,  Yuuji Hiramatsu ,  Izuho Hatada ,  Nobukata Okano ,  Shigetaka Tomiya ,  Katsunori Yanashima ,  Tomonori Hino ,  Hironobu Narui

Inventor： Akira Ohmae ,  Michinori Shiomi ,  Noriyuki Futagawa ,  Takaaki Ami ,  Takao Miyajima ,  Yuuji Hiramatsu ,  Izuho Hatada ,  Nobukata Okano ,  Shigetaka Tomiya ,  Katsunori Yanashima ,  Tomonori Hino ,  Hironobu Narui

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01L33/0025 ,  C30B23/04 ,  C30B25/04 ,  C30B29/403 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02642 ,  H01L21/02647 ,  H01L27/15 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/08 ,  H01L33/12 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L33/46

Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.

Abstract translation: 一种制造发光二极管的方法，包括以下步骤：在其一个主表面上提供具有多个突出部分的基板，其中突出部分由与基板不同的材料制成并生长 第一氮化物系III-V族化合物半导体层，其通过在凹部的底面成为三角形的基部的截面为三角形状的基板的每个凹部上; 在第一氮化物基III-V族化合物半导体层上在衬底上横向生长第二氮化物III-V族化合物半导体层; 并且在第二氮化物III-V族化合物半导体层上依次生长第一导电类型，有源层和第四氮化物III-V族化合物的第三氮化物基III-V族化合物半导体层 第二导电类型的半导体层。

公开(公告)号：US20070072396A1

公开(公告)日：2007-03-29

申请号：US10573463

申请日：2004-09-24

Applicant: Eric Feltin ,  Zahia Bougrioua ,  Gilles Nataf

Inventor： Eric Feltin ,  Zahia Bougrioua ,  Gilles Nataf

IPC: H01L21/20 ,  H01L21/36

CPC classification number: C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  C30B29/60 ,  H01L21/0237 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262

Abstract: The invention relates to a method for the production of self-supporting substrates comprising element III nitrides. More specifically, the invention relates to a method of producing a self-supporting substrate comprising a III-nitride, in particular, gallium nitride (GaN), which is obtained by means of epitaxy using a starting substrate. The invention is characterised in that it consists in depositing a single-crystal silicon-based intermediary layer by way of a sacrificial layer which is intended to be spontaneously vaporised during the III-nitride epitaxy step. The inventive method can be used, for example, to produce a flat, self-supporting III-nitride layer having a diameter greater than 2″.

Abstract translation: 本发明涉及生产包含元素III氮化物的自支撑衬底的方法。 更具体地说，本发明涉及一种制备包括III族氮化物，特别是通过使用起始衬底的外延获得的氮化镓（GaN））的自支撑衬底的方法。 本发明的特征在于其包括通过在III族氮化物外延步骤期间被自发蒸发的牺牲层沉积单晶硅基中间层。 本发明的方法可以用于例如生产直径大于2“的扁平的自支撑III族氮化物层。

公开(公告)号：US07192850B2

公开(公告)日：2007-03-20

申请号：US11024801

申请日：2004-12-30

Applicant: Hsueh-Shih Chen ,  Dai-Luon Lo ,  Chien-Ming Chen ,  Gwo-Yang Chang

Inventor： Hsueh-Shih Chen ,  Dai-Luon Lo ,  Chien-Ming Chen ,  Gwo-Yang Chang

IPC: H01L21/00

CPC classification number: B82Y30/00 ,  B82Y10/00 ,  C23C18/08 ,  H01L21/02409 ,  H01L21/02439 ,  H01L21/0256 ,  H01L21/02581 ,  H01L21/02601 ,  H01L21/02628 ,  Y10S977/774

Abstract: A doping method for forming quantum dots is disclosed, which includes following steps: providing a first precursor solution for a group II element and a second precursor solution for a group VI element; heating and mixing the first precursor solution and the second precursor solution for forming a plurality of II–VI compound cores of the quantum dots dispersing in a melting mixed solution; and injecting a third precursor solution for a group VI element and a forth precursor solution with at least one dopant to the mixed solution in turn at a fixed time interval in order to form quantum dots with multi-shell dopant; wherein the dopant described here is selected from a group consisting of transitional metal and halogen elements. This method of the invention can dope the dopants in the inner quantum dot and enhance the emission intensity efficiently.

Abstract translation: 公开了一种用于形成量子点的掺杂方法，其包括以下步骤：为第Ⅵ族元素提供第一前体溶液和为Ⅵ族元素提供第二前体溶液; 加热和混合第一前体溶液和第二前体溶液，以形成分散在熔融混合溶液中的量子点的多个II-VI化合物核心; 并且以固定的时间间隔依次向所述混合溶液中注入具有至少一种掺杂剂的第Ⅵ族元素和第四前体溶液的第三前体溶液，以形成具有多壳掺杂剂的量子点; 其中这里描述的掺杂剂选自由过渡金属和卤素元素组成的组。 本发明的这种方法可以掺杂在内量子点中并有效地提高发射强度。

公开(公告)号：US07132309B2

公开(公告)日：2006-11-07

申请号：US10846847

申请日：2004-05-13

Applicant: Chien-Min Sung

Inventor： Chien-Min Sung

IPC: H01L21/00

CPC classification number: H01L21/02115 ,  H01L21/02362 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/02425 ,  H01L21/0243 ,  H01L21/02439 ,  H01L21/02444 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/0405 ,  H01L21/3146 ,  H01L21/3148 ,  H01L21/6835 ,  H01L21/76256 ,  H01L23/3732 ,  H01L29/1602 ,  H01L2221/68363 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.

Abstract translation: 本发明提供了金刚石半导体器件及其形成方法。 在一个方面，提供了一种模具，其具有被配置成与用于金刚石层的装置表面的配置成反比地匹配的界面表面。 然后将动态金刚石层沉积在模具的金刚石界面表面上，并且将基底连接到动力金刚石层的生长表面。 然后可以去除模具的至少一部分以露出具有与模具的金刚石界面表面的形状相反的形状的金刚石的装置表面。 模具可以由合适的半导体材料形成，该半导体材料被薄化以产生最终的装置。 可选地，半导体材料可以在去除模具之后耦合到金刚石层。

公开(公告)号：US07105866B2

公开(公告)日：2006-09-12

申请号：US10911624

申请日：2004-08-05

Applicant: Nada El-Zein ,  Jamal Ramdani ,  Kurt Eisenbeiser ,  Ravindranath Droopad

Inventor： Nada El-Zein ,  Jamal Ramdani ,  Kurt Eisenbeiser ,  Ravindranath Droopad

IPC: H01L29/861

CPC classification number: H01L29/882 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02521 ,  H01L21/8258 ,  H01L27/0605

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract translation: 通过首先在硅晶片上生长容纳缓冲层，可以将复合半导体材料的高质量外延层生长在大的硅晶片上。 容纳缓冲层是通过氧化硅的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。

公开(公告)号：US20060186556A1

公开(公告)日：2006-08-24

申请号：US11323187

申请日：2005-12-29

Applicant: Chien-Min Sung

Inventor： Chien-Min Sung

IPC: H01L23/58

CPC classification number: H01L21/02115 ,  H01L21/02362 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/02425 ,  H01L21/0243 ,  H01L21/02439 ,  H01L21/02444 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02527 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/0405 ,  H01L21/3146 ,  H01L21/3148 ,  H01L21/6835 ,  H01L21/76256 ,  H01L23/3732 ,  H01L29/1602 ,  H01L2221/68363 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

Abstract: The present invention provides semiconductor-on-diamond devices, and methods for the formation thereof. In one aspect, a mold is provided which has an interface surface configured to inversely match a configuration intended for the device surface of a diamond layer. An adynamic diamond layer is then deposited upon the diamond interface surface of the mold, and a substrate is joined to the growth surface of the adynamic diamond layer. At least a portion of the mold can then be removed to expose the device surface of the diamond which has received a shape which inversely corresponds to the configuration of the mold's diamond interface surface. The mold can be formed of a suitable semiconductor material which is thinned to produce a final device. Optionally, a semiconductor material can be coupled to the diamond layer subsequent to removal of the mold.

公开(公告)号：US20060145187A1

公开(公告)日：2006-07-06

申请号：US11302957

申请日：2005-12-13

Applicant: Yong Kim ,  Dong Lee

Inventor： Yong Kim ,  Dong Lee

IPC: H01L31/109 ,  H01L29/12

CPC classification number: C30B29/406 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02439 ,  H01L21/0254 ,  H01L21/02658

Abstract: The present invention provides to a gallium nitride (GaN) semiconductor and a method of manufacturing the same, capable of reducing crystal defects caused by a difference in lattice parameters, and minimizing internal residual stress. In particular, since a high-quality GaN thin film is formed on a silicon wafer, manufacturing costs can be reduced by securing high-quality wafers with a large diameter at a low price, and applicability to a variety of devices and circuit can also be improved.

Abstract translation: 本发明提供一种氮化镓（GaN）半导体及其制造方法，其能够减少由晶格参数的差异引起的晶体缺陷，并使内部残余应力最小化。 特别地，由于在硅晶片上形成高质量的GaN薄膜，所以可以通过以较低的价格确保大直径的高品质晶片来降低制造成本，并且适用于各种器件和电路也可以 改进。