Non-destructive evaluation of microstructure and interface roughness of electrically conducting lines in semiconductor integrated circuits in deep sub-micron regime
    72.
    发明授权
    Non-destructive evaluation of microstructure and interface roughness of electrically conducting lines in semiconductor integrated circuits in deep sub-micron regime 有权
    在深亚微米体系的半导体集成电路中的导电线的微结构和界面粗糙度的非破坏性评估

    公开(公告)号:US07500208B2

    公开(公告)日:2009-03-03

    申请号:US11673369

    申请日:2007-02-09

    IPC分类号: G06F17/50 G01R31/26

    摘要: Novel structures and methods for evaluating lines in semiconductor integrated circuits. A first plurality of lines are formed on a wafer each of which includes multiple line sections. All the line sections are of the same length. The electrical resistances of the line sections are measured. Then, a first line geometry adjustment is determined based on the electrical resistances of all the sections. The first line geometry adjustment represents an effective reduction of cross-section size of the lines due to grain boundary electrical resistance. A second plurality of lines of same length and thickness can be formed on the same wafer. Then, second and third line geometry adjustments are determined based on the electrical resistances of these lines measured at different temperatures. The second and third line geometry adjustments represent an effective reduction of cross-section size of the lines due to grain boundary electrical resistance and line surface roughness.

    摘要翻译: 用于评估半导体集成电路中的线路的新型结构和方法。 在每个包括多个线段的晶片上形成第一组多条线。 所有线段长度相同。 测量线路段的电阻。 然后,基于所有部分的电阻来确定第一行几何调整。 第一行几何调整表示由于晶界电阻而导致的线的横截面尺寸的有效减小。 相同长度和厚度的第二组多条线可以形成在同一晶片上。 然后,基于在不同温度下测量的这些线的电阻来确定第二和第三线几何调整。 第二和第三线几何调整表示由于晶界电阻和线表面粗糙度导致的线的横截面尺寸的有效减小。

    Electronic fuse structure and method of manufacturing
    73.
    发明授权
    Electronic fuse structure and method of manufacturing 有权
    电子熔断器结构及制造方法

    公开(公告)号:US06633055B2

    公开(公告)日:2003-10-14

    申请号:US09303509

    申请日:1999-04-30

    IPC分类号: H01L2974

    摘要: A gap conductor structure for an integrated electronic circuit that may function as an electronic fuse device or as a low capacitance inter level signal line is integrated as part of the semi-conductor chip wiring. The gap conducting structure includes one or more air gap regions of predefined volume that fully or partially exposes a length of interlevel conductor layer in an IC. Alternately, the air gap region may wholly located within the dielectric region below a corresponding conductor and separated by insulator. When functioning as a fuse, the gap region acts to reduce thermal conductivity away from the exposed portion of the conductor enabling generation of higher heat currents in the conducting line with lower applied voltages sufficient to melt a part of the conducting line. The presence of gaps, and hence, the fuses, are scalable and may be tailored to the capacity of currents they must carry with the characteristics of the fuses defined by a circuit designer. Furthermore, conducting structures completely or partially exposed in the air gap may function as low capacitance minimum delay transmission lines.

    摘要翻译: 作为半导体芯片布线的一部分,集成电子电路的可用作电子熔断器件或低电容级间信号线的间隙导体结构被集成。 间隙导电结构包括一个或多个预定体积的气隙区域,其完全或部分地暴露IC中的层间导体层的长度。 或者,气隙区域可以完全位于相应导体下方的电介质区域内并被绝缘体分隔开。 当用作熔丝时,间隙区域用于降低远离导体的暴露部分的热导率,使得能够以较低的施加电压在导线中产生更高的热流,从而熔化导电线的一部分。 间隙的存在以及保险丝的存在是可扩展的,并且可以根据电路设计者定义的保险丝的特性来适应其必须携带的电流的容量。 此外,在气隙中完全或部分暴露的导电结构可用作低电容最小延迟传输线

    Cooling microfan arrangements and process

    公开(公告)号:US5326430A

    公开(公告)日:1994-07-05

    申请号:US164494

    申请日:1993-12-07

    CPC分类号: F04D25/08 H02N1/004

    摘要: A micro electrostatic cooling fan arrangement is provided which includes a heat source having a planar surface, a stator attached to the heat source, an axle attached to the heat source and spaced from the stator, a rotary element including a hub having an aperture therein and a fan blade, the axle passing through the aperture of the hub and the fan blade having a major surface thereof disposed at an angle with respect to the surface of the heat source and attached to the hub at one end, with the other end of the fan blade being adjacent to but spaced from the stator and a voltage source applied to the stator having sufficient voltage to charge the fan blade. Also, a process is provided for making a microfan which includes forming a strip of sacrificial material on a planar surface of a heat source, applying a spin on insulating layer over the heat source and the strip for producing a sloping surface extending from about the top of the strip toward the planar surface of the heat source, applying a layer of conductive material on the sloping surface and strip and defining from the layer of conductive material a fan blade on the sloping surface of the spin on insulating layer and a stator at one end of the fan blade.

    Laternal field emmission devices and methods of fabrication
    75.
    发明授权
    Laternal field emmission devices and methods of fabrication 失效
    横向场致发射装置及其制造方法

    公开(公告)号:US5308439A

    公开(公告)日:1994-05-03

    申请号:US13607

    申请日:1993-02-04

    CPC分类号: H01J9/025 H01J1/3042

    摘要: Lateral cathode field emission devices and methods of fabrication are set forth. Conventional integrated circuit fabrication techniques are advantageously used to produce the lateral FEDs. Cathode tips on the order of several hundred angstroms are consistently obtained as well as exact spacing of the cathode to gate and cathode to anode. Various cathode and device configurations are described, including a circular field emission device. A single integrated structure having multiple cathodes and multiple gates is possible to perform various logic operations and/or enhance current output from the device. Multiple field effect devices, with cathodes disposed parallel or perpendicular to the substrate, are integrally coupled through a sharing of one or more metallization layers definitive of the elements of the devices. Significant advantages in current density and circuit layout can be obtained. Methods for fabricating the various devices are also explained.

    摘要翻译: 阐述了侧向阴极场发射器件及其制造方法。 传统的集成电路制造技术有利地用于产生横向FED。 一贯获得数百埃数量级的阴极尖端,以及阴极与栅极和阴极与阳极的精确间距。 描述了各种阴极和器件配置,包括圆形场致发射器件。 具有多个阴极和多个栅极的单个集成结构可以执行各种逻辑操作和/或增强来自该器件的电流输出。 具有平行或垂直于衬底设置的阴极的多个场效应器件通过共享设备元件的一个或多个金属化层而被一体地耦合。 可以获得电流密度和电路布局的显着优点。 还说明了制造各种装置的方法。

    Ring-loaded flexural disc spring
    76.
    发明授权
    Ring-loaded flexural disc spring 失效
    环形弹簧弹簧

    公开(公告)号:US4196895A

    公开(公告)日:1980-04-08

    申请号:US926781

    申请日:1978-07-21

    IPC分类号: F16F1/32 G10K13/00

    CPC分类号: F16F1/32 G10K13/00

    摘要: A ring-loaded flexural disc spring acts as an isolation mount in a thin cndrical space in the tail of a longitudinal vibrator type of underwater sound transducer. The ring-loaded spring comprises a thin disc having a raised bearing surface at a specified distance from the perimeter on one side of the disc and a raised bearing surface at the perimeter on the other side of the disc. The spring flexes into a concave shape when a load is applied. The operation of the disc is linear over the entire specified load range.

    摘要翻译: 环形的弯曲弹簧作为隔离安装件在纵向振动器类型的水下声音传感器的尾部中的薄的圆柱形空间中起作用。 环形弹簧包括具有在盘的一侧上与周边规定距离的凸起的支承表面的薄盘和在盘的另一侧的周边处的升高的支承表面。 当施加负载时,弹簧弯曲成凹形。 盘的操作在整个指定的负载范围内是线性的。

    Structure and method to ensure correct operation of an integrated circuit in the presence of ionizing radiation
    77.
    发明授权
    Structure and method to ensure correct operation of an integrated circuit in the presence of ionizing radiation 有权
    确保电离辐射存在时集成电路正确运行的结构和方法

    公开(公告)号:US09223037B2

    公开(公告)日:2015-12-29

    申请号:US13442062

    申请日:2012-04-09

    摘要: Systems and methods to ensure correct operation of a semiconductor chip in the presence of ionizing radiation is disclosed. The system includes a semiconductor chip, a first radiation detection array incorporated in the semiconductor chip, and at least one additional radiation detection array incorporated in the semiconductor chip. a processor determines a region of the semiconductor chip affected by an incident radiation particle by analyzing a trajectory of the radiation particle determined from locations of sensors hit by the radiation particle in the first radiation detection array and the at least one additional radiation detection array. The processor determines whether corrective action is needed based on the region of the semiconductor chip affected by the incident radiation particle.

    摘要翻译: 公开了在存在电离辐射的情况下确保半导体芯片的正确操作的系统和方法。 该系统包括半导体芯片,并入半导体芯片中的第一辐射检测阵列和并入半导体芯片中的至少一个附加辐射检测阵列。 处理器通过分析从第一辐射检测阵列中的辐射粒子和至少一个附加辐射检测阵列所击中的传感器的位置确定的辐射粒子的轨迹来确定受入射辐射粒子影响的半导体芯片的区域。 处理器基于受入射辐射粒子影响的半导体芯片的区域来确定是否需要校正动作。