摘要:
Methods, systems and program products are disclosed for performing a stress test of a line in an integrated circuit (IC) chip. One embodiment of the method includes: applying a constant current Is to the line; and stress testing the line while applying the constant current Is such that the constant current Is is not altered by a resistance change due to an onset of electromigration.
摘要:
Novel structures and methods for evaluating lines in semiconductor integrated circuits. A first plurality of lines are formed on a wafer each of which includes multiple line sections. All the line sections are of the same length. The electrical resistances of the line sections are measured. Then, a first line geometry adjustment is determined based on the electrical resistances of all the sections. The first line geometry adjustment represents an effective reduction of cross-section size of the lines due to grain boundary electrical resistance. A second plurality of lines of same length and thickness can be formed on the same wafer. Then, second and third line geometry adjustments are determined based on the electrical resistances of these lines measured at different temperatures. The second and third line geometry adjustments represent an effective reduction of cross-section size of the lines due to grain boundary electrical resistance and line surface roughness.
摘要:
A gap conductor structure for an integrated electronic circuit that may function as an electronic fuse device or as a low capacitance inter level signal line is integrated as part of the semi-conductor chip wiring. The gap conducting structure includes one or more air gap regions of predefined volume that fully or partially exposes a length of interlevel conductor layer in an IC. Alternately, the air gap region may wholly located within the dielectric region below a corresponding conductor and separated by insulator. When functioning as a fuse, the gap region acts to reduce thermal conductivity away from the exposed portion of the conductor enabling generation of higher heat currents in the conducting line with lower applied voltages sufficient to melt a part of the conducting line. The presence of gaps, and hence, the fuses, are scalable and may be tailored to the capacity of currents they must carry with the characteristics of the fuses defined by a circuit designer. Furthermore, conducting structures completely or partially exposed in the air gap may function as low capacitance minimum delay transmission lines.
摘要:
A micro electrostatic cooling fan arrangement is provided which includes a heat source having a planar surface, a stator attached to the heat source, an axle attached to the heat source and spaced from the stator, a rotary element including a hub having an aperture therein and a fan blade, the axle passing through the aperture of the hub and the fan blade having a major surface thereof disposed at an angle with respect to the surface of the heat source and attached to the hub at one end, with the other end of the fan blade being adjacent to but spaced from the stator and a voltage source applied to the stator having sufficient voltage to charge the fan blade. Also, a process is provided for making a microfan which includes forming a strip of sacrificial material on a planar surface of a heat source, applying a spin on insulating layer over the heat source and the strip for producing a sloping surface extending from about the top of the strip toward the planar surface of the heat source, applying a layer of conductive material on the sloping surface and strip and defining from the layer of conductive material a fan blade on the sloping surface of the spin on insulating layer and a stator at one end of the fan blade.
摘要:
Lateral cathode field emission devices and methods of fabrication are set forth. Conventional integrated circuit fabrication techniques are advantageously used to produce the lateral FEDs. Cathode tips on the order of several hundred angstroms are consistently obtained as well as exact spacing of the cathode to gate and cathode to anode. Various cathode and device configurations are described, including a circular field emission device. A single integrated structure having multiple cathodes and multiple gates is possible to perform various logic operations and/or enhance current output from the device. Multiple field effect devices, with cathodes disposed parallel or perpendicular to the substrate, are integrally coupled through a sharing of one or more metallization layers definitive of the elements of the devices. Significant advantages in current density and circuit layout can be obtained. Methods for fabricating the various devices are also explained.
摘要:
A ring-loaded flexural disc spring acts as an isolation mount in a thin cndrical space in the tail of a longitudinal vibrator type of underwater sound transducer. The ring-loaded spring comprises a thin disc having a raised bearing surface at a specified distance from the perimeter on one side of the disc and a raised bearing surface at the perimeter on the other side of the disc. The spring flexes into a concave shape when a load is applied. The operation of the disc is linear over the entire specified load range.
摘要:
Systems and methods to ensure correct operation of a semiconductor chip in the presence of ionizing radiation is disclosed. The system includes a semiconductor chip, a first radiation detection array incorporated in the semiconductor chip, and at least one additional radiation detection array incorporated in the semiconductor chip. a processor determines a region of the semiconductor chip affected by an incident radiation particle by analyzing a trajectory of the radiation particle determined from locations of sensors hit by the radiation particle in the first radiation detection array and the at least one additional radiation detection array. The processor determines whether corrective action is needed based on the region of the semiconductor chip affected by the incident radiation particle.
摘要:
Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a via formed in a dielectric layer to expose a contact pad and a capture pad formed in the via and over the dielectric layer. The capture pad has openings over the dielectric layer to form segmented features. The solder bump is deposited on the capture pad and the openings over the dielectric layer.
摘要:
Back-end-of-line (BEOL) wiring structures and inductors, methods for fabricating BEOL wiring structures and inductors, and design structures for a BEOL wiring structure or an inductor. A feature, which may be a trench or a wire, is formed that includes a sidewall intersecting a top surface of a dielectric layer. A surface layer is formed on the sidewall of the feature. The surface layer is comprised of a conductor and has a thickness selected to provide a low resistance path for the conduction of a high frequency signal.
摘要:
Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The method includes forming a plurality of trenches in a dielectric layer extending to an underlying metal layer. The method further includes depositing metal in the plurality of trenches to form discrete metal line islands in contact with the underlying metal layer. The method also includes forming a solder bump in electrical connection to the plurality of metal line islands.