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100 条记录 (耗时 0.043 秒)

    Multi-layer ceramic electrostatic chuck with integrated channel
    71.
    发明授权
    Multi-layer ceramic electrostatic chuck with integrated channel 失效
    多层陶瓷静电卡盘，集成通道

    公开(公告)号：US06639783B1

    公开(公告)日：2003-10-28

    申请号：US09149807

    申请日：1998-09-08

    申请人： Shamouil Shamouilian ,  You Wang ,  Ananda H. Kumar

    发明人： Shamouil Shamouilian ,  You Wang ,  Ananda H. Kumar

    IPC分类号： H02N1300

    CPC分类号： H02N13/00 ,  Y10T279/23

    摘要： A semiconductor wafer support chuck having small diameter gas distribution ports for heat transfer gas. The diameter ports inhibit plasma ignition in heat transfer gas distribution channels. The ports are less than 20 mils in diameter less than 3 mm in length. The short length of the ports facilitates fabrication of multiple ports of very small diameter. The ports communicate with a gas distribution plenum integrated into the body of the chuck beneath a wafer support surface. The plenum has radial channels and a peripheral groove for distributing heat transfer gas to the wafer support surface.

    摘要翻译： 一种半导体晶片支撑卡盘，其具有用于传热气体的小直径气体分配端口。 直径端口禁止传热气体分配通道中的等离子体点火。 这些端口的直径小于20密耳，长度小于3毫米。 端口的短长度有助于制造非常小直径的多个端口。 端口与在晶片支撑表面下方集成到卡盘主体中的气体分配气室连通。 气室具有径向通道和用于将传热气体分配到晶片支撑表面的外围槽。

    Layer thin film wiring process featuring self-alignment of vias
    72.
    发明授权
    Layer thin film wiring process featuring self-alignment of vias 失效
    层间薄膜布线工艺具有通孔自对准功能

    公开(公告)号：US5219669A

    公开(公告)日：1993-06-15

    申请号：US871450

    申请日：1992-04-21

    申请人： Kenneth Chang ,  George Czornyj ,  Ananda H. Kumar ,  Heinz O. Steimel

    发明人： Kenneth Chang ,  George Czornyj ,  Ananda H. Kumar ,  Heinz O. Steimel

    IPC分类号： H01L21/48 ,  H05K3/10 ,  H05K3/14 ,  H05K3/46

    CPC分类号： H01L21/4846 ,  H05K3/107 ,  H05K3/143 ,  H05K3/4644 ,  Y10S428/901 ,  Y10T428/12569

    摘要： The present invention provides a packaging semiconductor structure and method for obtaining same. The structure is comprised of at least one level of dielectric and metallurgy layers. The at least one level is comprised of a wiring metallurgy plane and a "through-via" plane of interconnecting metallurgy in association with both one and two layers of polymeric dielectric materials. The self-alignment method of fabrication of the level provides a streamlined technique wherein stringent masking and alignment requirements are relaxed, undue processing such as at least one polishing step is eliminated and a structure having adhesive integrity is fabricated.

    摘要翻译： 本发明提供一种包装半导体结构及其制造方法。 该结构由至少一层电介质层和冶金层构成。 该至少一个级别包括布线冶金平面和与一层和两层聚合物电介质材料相关联的互连冶金的“通孔”平面。 水平的制造的自对准方法提供了一种流线型技术，其中严格的遮蔽和对准要求被放宽，消除了诸如至少一个抛光步骤的不适当的处理，并且制造了具有粘合剂完整性的结构。

    Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial arowth of crack-free aallium nitride fi ms and devices
    79.
    发明申请
    Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial arowth of crack-free aallium nitride fi ms and devices 有权
    制备单晶硅晶片的方法和结构，用作无裂纹氮化镓薄膜和器件外延生长的基板

    公开(公告)号：US20140217420A1

    公开(公告)日：2014-08-07

    申请号：US14251634

    申请日：2014-04-13

    申请人： Ananda H. Kumar

    发明人： Ananda H. Kumar

    IPC分类号： H01L21/02 ,  H01L29/20 ,  H01L29/04

    CPC分类号： H01L21/02282 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02488 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02658 ,  H01L29/045 ,  H01L29/2003 ,  H01L33/007

    摘要： This document describes the fabrication and use of ceramic stabilizing layer fabricated right on the product silicon wafer to facilitate its use as a substrate for fabrication of gallium nitride films. A ceramic layer is formed and then attached to a single crystal silicon substrate to form a composite silicon substrate that has coefficient of thermal expansion comparable with GaN. The composite silicon substrates prepared by this invention are uniquely suited for use as growth substrates for crack-free gallium nitride films, benefitting from compressive stresses produced by choosing a ceramic having a desired higher coefficient thermal expansion than those of silicon and gallium nitride.

    摘要翻译： 本文件描述了在产品硅晶片上制造的陶瓷稳定层的制造和使用，以便于其用作制造氮化镓膜的基板。 形成陶瓷层，然后附着到单晶硅衬底上以形成与GaN相当的热膨胀系数的复合硅衬底。 通过本发明制备的复合硅衬底独特地适合用作无裂纹氮化镓膜的生长衬底，受益于通过选择具有比硅和氮化镓的热膨胀系数更高的系数热膨胀的陶瓷而产生的压应力。

    Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth of crack-free gallium nitride films and devices
    80.
    发明授权
    Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth of crack-free gallium nitride films and devices 有权
    制备单晶硅晶片的方法和结构，用作无裂纹氮化镓膜和器件的外延生长的基板

    公开(公告)号：US08697541B1

    公开(公告)日：2014-04-15

    申请号：US13337045

    申请日：2011-12-23

    申请人： Ananda H. Kumar

    发明人： Ananda H. Kumar

    IPC分类号： H01L21/30 ,  H01L21/46

    CPC分类号： H01L21/02282 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02488 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02658 ,  H01L29/045 ,  H01L29/2003 ,  H01L33/007

    摘要： This document describes the fabrication and use of ceramic stabilizing layer fabricated right on the product silicon wafer to facilitate its use as a substrate for fabrication of gallium nitride films. A ceramic layer is formed and then attached to a single crystal silicon substrate to form a composite silicon substrate that has coefficient of thermal expansion comparable with GaN. The composite silicon substrates prepared by this invention are uniquely suited for use as growth substrates for crack-free gallium nitride films, benefiting from compressive stresses produced by choosing a ceramic having a desired higher coefficient thermal expansion than those of silicon and gallium nitride.

    摘要翻译： 本文件描述了在产品硅晶片上制造的陶瓷稳定层的制造和使用，以便于其用作制造氮化镓膜的基板。 形成陶瓷层，然后附着到单晶硅衬底上以形成与GaN相当的热膨胀系数的复合硅衬底。 通过本发明制备的复合硅衬底独特地适合用作无裂纹氮化镓膜的生长衬底，受益于通过选择具有比硅和氮化镓的热膨胀系数更高的系数热膨胀的陶瓷而产生的压应力。