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    COMPONENT AND METHOD FOR PRODUCING A COMPONENT
    71.
    发明申请
    COMPONENT AND METHOD FOR PRODUCING A COMPONENT 有权

    公开(公告)号：US20170330981A1

    公开(公告)日：2017-11-16

    申请号：US15528106

    申请日：2015-10-14

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Lutz Hoeppel ,  Norwin von Malm

    IPC: H01L31/0236 ,  H01L23/495 ,  H01L23/48 ,  H01L31/101 ,  H01L23/498

    CPC classification number: H01L31/0236 ,  H01L23/481 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/49827 ,  H01L31/101 ,  H01L33/382 ,  H01L33/387

    Abstract: A component with a semiconductor body, and first and second metal layer is disclosed. The first metal layer is arranged between the semiconductor body and the second metal layer, the semiconductor body has a first semiconductor layer on a side which is averted from the first metal layer, a second semiconductor layer on a side facing towards the first metal layer, and an active layer arranged between the first semiconductor layer and the second semiconductor layer, the component has a through-connection, which extends through the second semiconductor layer and the active layer for the electrical bonding of the first semiconductor layer. The second metal layer has a first subregion electrically connected to the through-connection by the first metal layer, and a second subregion spaced apart laterally from the first subregion by an intermediate space. In an overhead view, the first metal layer laterally completely covers the intermediate space.

    Optoelectronic Semiconductor Chip
    73.
    发明申请
    Optoelectronic Semiconductor Chip 有权

    公开(公告)号：US20170200861A1

    公开(公告)日：2017-07-13

    申请号：US15315376

    申请日：2015-06-12

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Alexander F. Pfeuffer ,  Norwin von Malm

    IPC: H01L33/38 ,  H01L33/40 ,  H01L33/46 ,  H01L33/22

    CPC classification number: H01L33/382 ,  H01L33/22 ,  H01L33/387 ,  H01L33/405 ,  H01L33/46

    Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment the chip includes a semiconductor layer sequence having a bottom face and a top face, wherein the semiconductor layer sequence comprises a first layer of a first conductivity type, an active layer for generating electromagnetic radiation, and a second layer of a second conductivity type and a bottom contact element located at the bottom face and a top contact element located at the top face for injecting current into the semiconductor layer sequence. The chip further includes a current distribution element located at the bottom face, the current distribution element distributes current along the bottom face during operation and a plurality of vias extending from the current distribution element through the first layer and through the active layer into the semiconductor layer sequence, wherein the vias are not in direct electrical contact with the active layer.

    Radiation-emitting semiconductor chip
    76.
    发明授权
    Radiation-emitting semiconductor chip 有权
    辐射发射半导体芯片

    公开(公告)号：US09590008B2

    公开(公告)日：2017-03-07

    申请号：US14702807

    申请日：2015-05-04

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Jürgen Moosburger ,  Norwin von Malm ,  Patrick Rode ,  Lutz Höppel ,  Karl Engl

    IPC: H01L33/62 ,  H01L27/15 ,  H01L33/38 ,  H01L33/00 ,  H01L33/02

    CPC classification number: H01L27/15 ,  H01L25/167 ,  H01L33/005 ,  H01L33/02 ,  H01L33/08 ,  H01L33/382 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

    Abstract: A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation and is arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region facing away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer, in the emission region, electrically conductively connects to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; the second semiconductor layer, in the emission region, electrically conductively connects to a second connection layer.

    Abstract translation: 辐射发射半导体芯片包括具有半导体层序列的载体和半导体本体，其中在具有半导体层序列的半导体主体中形成发光区域和保护二极管区域; 半导体层序列包括产生辐射并且被布置在第一半导体层和第二半导体层之间的有源区; 第一半导体层布置在有源区域背离载体的一侧; 发射区域具有延伸穿过有源区域的凹部; 发射区域中的第一半导体层导电地连接到第一连接层，其中第一连接层在凹部中从第一半导体层向载体延伸; 在发射区域中的第二半导体层导电地连接到第二连接层。

    Display device and method for producing a display device
    77.
    发明授权
    Display device and method for producing a display device 有权
    显示装置及其制造方法

    公开(公告)号：US09362335B2

    公开(公告)日：2016-06-07

    申请号：US14367821

    申请日：2012-12-11

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Norwin von Malm

    IPC: H01L33/00 ,  H01L27/15 ,  H01L33/50 ,  H01L33/38

    CPC classification number: H01L27/156 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/15 ,  H01L33/005 ,  H01L33/20 ,  H01L33/382 ,  H01L33/50 ,  H01L33/505 ,  H01L33/62 ,  H01L2933/0066

    Abstract: A display device with a semiconductor layer sequence includes an active region provided for generating radiation and a plurality of pixels. The display device also includes a carrier. The active region is arranged between a first semiconductor layer and a second semiconductor layer. The semiconductor layer sequence includes at least one recess, which extends from a major face of the semiconductor layer sequence facing the carrier through the active region into the first semiconductor layer and is provided for electrical contacting of the first semiconductor layer. The carrier includes a plurality of switches, which are each provided for controlling at least one pixel.

    Abstract translation: 具有半导体层序列的显示装置包括用于产生辐射的有源区和多个像素。 显示装置还包括载体。 有源区布置在第一半导体层和第二半导体层之间。 半导体层序列包括至少一个凹槽，其从面向载体的半导体层序列的主表面延伸穿过有源区进入第一半导体层，并提供用于第一半导体层的电接触。 载体包括多个开关，每个开关被设置用于控制至少一个像素。

    Optoelectronic Semiconductor Chip
    78.
    发明申请
    Optoelectronic Semiconductor Chip 有权
    光电半导体芯片

    公开(公告)号：US20150194411A1

    公开(公告)日：2015-07-09

    申请号：US14407891

    申请日：2013-05-27

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Norwin von Malm

    IPC: H01L25/075 ,  H01L23/538 ,  H01L33/62

    CPC classification number: H01L25/0753 ,  H01L23/5386 ,  H01L33/382 ,  H01L33/62 ,  H01L2924/0002 ,  H05K1/0289 ,  H05K2201/0969 ,  H05K2201/10106 ,  H01L2924/00

    Abstract: An optoelectronic semiconductor chip includes an interconnection layer with a first electrically conductive contact layer, a second electrically conductive contact layer and an insulation layer, which is formed of an electrically insulating material. Further, the optoelectronic semiconductor chip includes two optoelectronic semiconductor bodies, each of which include an active region that is intended to generate radiation. The insulation layer is arranged on a top of the second electrically conductive contact layer facing the optoelectronic semiconductor bodies. The first electrically conductive contact layer is arranged on a top of the insulation layer remote from the second electrically conductive contact layer. The optoelectronic semiconductor bodies are interconnected electrically in parallel by the interconnection layer.

    Abstract translation: 光电半导体芯片包括由电绝缘材料形成的具有第一导电接触层，第二导电接触层和绝缘层的互连层。 此外，光电子半导体芯片包括两个光电子半导体本体，每个光电半导体主体包括旨在产生辐射的有源区。 绝缘层设置在面向光电半导体主体的第二导电接触层的顶部上。 第一导电接触层布置在远离第二导电接触层的绝缘层的顶部上。 光电半导体本体通过互连层并联连接。

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