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    Method for repairing copper diffusion barrier layers on a semiconductor solid substrate and repair kit for implementing this method
    72.
    发明授权
    Method for repairing copper diffusion barrier layers on a semiconductor solid substrate and repair kit for implementing this method 失效
    在半导体固体基板上修复铜扩散阻挡层的方法以及用于实施该方法的修理工具

    公开(公告)号：US08524512B2

    公开(公告)日：2013-09-03

    申请号：US13003451

    申请日：2009-09-07

    申请人： Vincent Mevellec

    发明人： Vincent Mevellec

    IPC分类号： H01L21/768

    CPC分类号： C23C18/1893 ,  C23C18/31 ,  C23C18/34 ,  H01L21/288 ,  H01L21/76846 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76898

    摘要： Method for repairing copper diffusion barrier layers on a semiconductor solid substrate and repair kit for implementing this method.One subject of the present invention is a method for repairing a surface of a substrate coated with a discontinuous copper diffusion barrier layer of a titanium-based material.According to the invention, this method comprises: a) the contacting of the surface with a suspension containing copper or copper alloy nanoparticles for a time of between 1 s and 15 min; and b) the contacting of the thus treated surface with a liquid solution having a pH of between 8.5 and 12 and containing: at least one metal salt, at least one reducing agent, at least one stabilizer at a temperature of between 50° C. and 90° C., preferably between 60° C. and 80° C., for a time of between 30 s and 10 min, preferably between 1 min and 5 min, in order to thus form a metallic film having a thickness of at least 50 nanometers re-establishing the continuity of the copper diffusion barrier layer.

    摘要翻译： 在半导体固体基板上修复铜扩散阻挡层的方法以及用于实施该方法的修理工具。 本发明的一个主题是用于修复涂覆有钛基材料的不连续铜扩散阻挡层的基板的表面的方法。 根据本发明，该方法包括：a）使表面与含有铜或铜合金纳米颗粒的悬浮液接触1至15分钟; 和b）如此处理的表面与pH为8.5至12的液体溶液的接触，并且在50℃的温度下含有至少一种金属盐，至少一种还原剂，至少一种稳定剂。 90℃，优选60℃至80℃，时间为30秒至10分钟，优选1分钟至5分钟，以便形成厚度为 至少50纳米重新建立铜扩散阻挡层的连续性。

    Process for selectively depositing copper thin films on substrates with copper and ruthenium areas via vapor deposition
    74.
    发明授权
    Process for selectively depositing copper thin films on substrates with copper and ruthenium areas via vapor deposition 有权
    通过气相沉积在铜和钌区域的基板上选择性沉积铜薄膜的工艺

    公开(公告)号：US08283485B2

    公开(公告)日：2012-10-09

    申请号：US12139585

    申请日：2008-06-16

    申请人： John Anthony Thomas Norman

    发明人： John Anthony Thomas Norman

    IPC分类号： H01L21/443

    CPC分类号： H01L21/28556 ,  C23C16/04 ,  C23C16/18 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76868 ,  H01L21/76871 ,  H01L21/76877

    摘要： A process for preparing a multi-layer substrate is described herein. In one embodiment, the process provides a multi-layer substrate comprising a first layer and a second layer where the process comprises the steps of providing the first layer comprising a barrier area and a copper area; and depositing the second layer comprising copper onto the first layer wherein the depositing provides the second layer comprising a first thickness ranging from about 20 Angstroms to about 2,000 Angstroms onto the barrier area and a second thickness ranging from about 0 Angstroms to about 1,000 Angstroms onto the copper area in the first layer wherein the first thickness is greater than the second thickness.

    摘要翻译： 本文描述了制备多层基底的方法。 在一个实施例中，该方法提供了包括第一层和第二层的多层衬底，其中该方法包括提供包括阻挡区域和铜区域的第一层的步骤; 以及将包含铜的所述第二层沉积到所述第一层上，其中所述沉积提供所述第二层，所述第二层包括从所述阻挡区域上的约20埃到约2000埃的第一厚度，以及从约0埃到约1,000埃的第二厚度 第一层中的铜区域，其中第一厚度大于第二厚度。

    Conformal adhesion promoter liner for metal interconnects
    77.
    发明授权
    Conformal adhesion promoter liner for metal interconnects 失效
    用于金属互连的保形粘合促进剂衬垫

    公开(公告)号：US08105937B2

    公开(公告)日：2012-01-31

    申请号：US12190906

    申请日：2008-08-13

    申请人： Tien-Jen Cheng ,  Zhengwen Li ,  Keith Kwong Hon Wong ,  Huilong Zhu

    发明人： Tien-Jen Cheng ,  Zhengwen Li ,  Keith Kwong Hon Wong ,  Huilong Zhu

    IPC分类号： H01L21/44

    CPC分类号： H01L23/53238 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76877 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A dielectric layer is patterned with at least one line trough and/or at least one via cavity. A metallic nitride liner is formed on the surfaces of the patterned dielectric layer. A metal liner is formed on the surface of the metallic nitride liner. A conformal copper nitride layer is formed directly on the metal liner by atomic layer deposition (ALD) or chemical vapor deposition (CVD). A Cu seed layer is formed directly on the conformal copper nitride layer. The at least one line trough and/or the at least one via cavity are filled with an electroplated material. The direct contact between the conformal copper nitride layer and the Cu seed layer provides enhanced adhesion strength. The conformal copper nitride layer may be annealed to covert an exposed outer portion into a contiguous Cu layer, which may be employed to reduce the thickness of the Cu seed layer.

    摘要翻译： 用至少一个线槽和/或至少一个通孔腔对电介质层进行构图。 金属氮化物衬垫形成在图案化电介质层的表面上。 在金属氮化物衬垫的表面上形成金属衬垫。 通过原子层沉积（ALD）或化学气相沉积（CVD）直接在金属衬垫上形成共形的氮化铜层。 在适形的氮化铜层上直接形成Cu籽晶层。 至少一个线槽和/或至少一个通孔腔被电镀材料填充。 保形氮化铜层和Cu籽晶层之间的直接接触提供了增强的粘合强度。 可以将共形的氮化铜层退火以将暴露的外部部分翻转成连续的Cu层，其可用于减小Cu籽晶层的厚度。

    Conductor-dielectric structure and method for fabricating
    78.
    发明授权
    Conductor-dielectric structure and method for fabricating 失效
    导体 - 电介质结构及其制造方法

    公开(公告)号：US07960276B2

    公开(公告)日：2011-06-14

    申请号：US12128713

    申请日：2008-05-29

    申请人： Shom Ponoth ,  David L. Rath ,  Chih-Chao Yang ,  Keith Kwong Hon Wong

    发明人： Shom Ponoth ,  David L. Rath ,  Chih-Chao Yang ,  Keith Kwong Hon Wong

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  H01L21/76865 ,  H01L21/76868 ,  H01L21/76873 ,  H01L2221/1089

    摘要： A conductor-dielectric interconnect structure is fabricated by providing a structure comprising a dielectric layer having a patterned feature therein; depositing a plating seed layer on the dielectric layer in the patterned feature; depositing a sacrificial seed layer on the plating seed layer in the via; reducing the thickness of the sacrificial seed layer by reverse plating; and plating a conductive metal on the sacrificial seed layer in the patterned feature. Also provided is a dielectric layer having a via therein; a plating seed layer on the dielectric layer in the patterned feature; and a discontinuous sacrificial seed layer located in the patterned feature.

    摘要翻译： 通过提供包括其中具有图案化特征的电介质层的结构来制造导体 - 电介质互连结构; 在所述图案化特征中的所述电介质层上沉积电镀种子层; 在通孔的电镀种子层上沉积牺牲种子层; 通过反向电镀减少牺牲种子层的厚度; 以及在所述图案化特征中的所述牺牲种子层上镀覆导电金属。 还提供了其中具有通孔的电介质层; 图案化特征中的电介质层上的电镀种子层; 以及位于图案化特征中的不连续牺牲种子层。

    Void-free copper filling of recessed features for semiconductor devices
    79.
    发明授权
    Void-free copper filling of recessed features for semiconductor devices 有权
    半导体器件凹陷特征的无孔铜填充

    公开(公告)号：US07884012B2

    公开(公告)日：2011-02-08

    申请号：US11864566

    申请日：2007-09-28

    申请人： Kenji Suzuki ,  Tadahiro Ishizaka ,  Miho Jomen ,  Jonathan Rullan

    发明人： Kenji Suzuki ,  Tadahiro Ishizaka ,  Miho Jomen ,  Jonathan Rullan

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76844 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76883

    摘要： A method is provided for void-free copper (Cu) filling of recessed features in a semiconductor device. The method includes providing a patterned substrate containing a recessed feature, depositing a barrier film on the patterned substrate, including in the recessed feature, depositing a Ru metal film on the barrier film, and depositing a discontinuous Cu seed layer on the Ru metal film, where the Cu seed layer partially covers the Ru metal film in the recessed feature. The method further includes exposing the substrate to an oxidation source gas that oxidizes the Cu seed layer and the portion of the Ru metal film not covered by the Cu seed layer, heat-treating the oxidized Cu seed layer and the oxidized Ru metal film under high vacuum conditions or in the presence of an inert gas to activate the oxidized Ru metal film for Cu plating, and filling the recessed feature with bulk Cu metal. The exposure to the oxidation source gas can be an air exposure commonly encountered in semiconductor device manufacturing prior to Cu plating.

    摘要翻译： 提供了一种用于半导体器件中凹陷特征的无空隙铜（Cu）填充的方法。 该方法包括提供含有凹陷特征的图案化衬底，在图案化衬底上沉积阻挡膜，包括在凹陷特征中，在阻挡膜上沉积Ru金属膜，以及在Ru金属膜上沉积不连续的Cu籽晶层， 其中Cu籽晶层部分地覆盖凹陷特征中的Ru金属膜。 该方法还包括将衬底暴露于氧化Cu籽晶层的氧化源气体和未被Cu籽晶层覆盖的Ru金属膜的部分，在高温下热处理氧化的Cu种子层和氧化的Ru金属膜 真空条件下或在惰性气体存在下活化用于Cu电镀的氧化的Ru金属膜，并用块状Cu金属填充凹陷特征。 暴露于氧化源气体可以是在镀铜之前在半导体器件制造中通常遇到的空气暴露。

    COPPER DIFFUSION BARRIER
    80.
    发明申请
    COPPER DIFFUSION BARRIER 有权
    铜扩散障碍物

    公开(公告)号：US20110006430A1

    公开(公告)日：2011-01-13

    申请号：US12882577

    申请日：2010-09-15

    申请人： Nicolas Jourdan ,  Joaquin Torres

    发明人： Nicolas Jourdan ,  Joaquin Torres

    IPC分类号： H01L23/532

    CPC分类号： H01L21/76843 ,  H01L21/76831 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The invention concerns a method of forming a copper portion surrounded by an insulating material in an integrated circuit structure, the insulating material being a first oxide, the method having steps including forming a composite material over a region of the insulating material where the copper portion is to be formed, the composite material having first and second materials, annealing such that the second material reacts with the insulating material to form a second oxide that provides a diffusion barrier to copper; and depositing a copper layer over the composite material by electrochemical deposition to form the copper portion.

    摘要翻译： 本发明涉及一种形成由集成电路结构中的绝缘材料包围的铜部分的方法，绝缘材料是第一氧化物，该方法包括在绝缘材料的区域上形成复合材料，其中铜部分为 要形成的具有第一和第二材料的复合材料退火，使得第二材料与绝缘材料反应以形成向铜提供扩散阻挡层的第二氧化物; 以及通过电化学沉积在复合材料上沉积铜层以形成铜部分。