公开(公告)号：US08415219B2

公开(公告)日：2013-04-09

申请号：US11638612

申请日：2006-12-13

申请人： Franz Hirler ,  Helmut Strack

发明人： Franz Hirler ,  Helmut Strack

IPC分类号： H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/1604 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/7813

摘要： To attain a comparatively high breakdown voltage at a high avalanche strength and with the physical size simultaneously being as small as possible, the invention proposes constructing a transistor device in a semiconductor material region in which a first source/drain region is used as a source region and in which the source region has a comparatively reduced surface charge or surface charge density.

摘要翻译： 为了在高雪崩强度下获得相当高的击穿电压并且物理尺寸同时尽可能小，本发明提出在其中使用第一源极/漏极区域作为源极区域的半导体材料区域中构造晶体管器件 并且其中源区具有相对减小的表面电荷或表面电荷密度。

公开(公告)号：US20100264523A1

公开(公告)日：2010-10-21

申请号：US12828327

申请日：2010-07-01

申请人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

发明人： Adolf Koller ,  Horst Theuss ,  Ralf Otremba ,  Josef Hoeglauer ,  Helmut Strack ,  Reinhard Ploss

IPC分类号： H01L23/552 ,  H01L23/485

CPC分类号： H01L23/552 ,  H01L23/3114 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099

摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.

摘要翻译： 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。

公开(公告)号：US20070023881A1

公开(公告)日：2007-02-01

申请号：US11427204

申请日：2006-06-28

申请人： Helmut Strack

发明人： Helmut Strack

IPC分类号： H01L23/02 ,  H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/76256 ,  H01L21/76834 ,  H01L21/76838 ,  H01L29/417 ,  H01L29/456 ,  H01L29/861 ,  H01L2221/6834 ,  H01L2221/6835 ,  H01L2221/68363 ,  H01L2924/0002 ,  Y10S438/977 ,  H01L2924/00

摘要： A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of the substrate layer (4) and/or of the wiring structure has a ternary carbide and/or a ternary nitride and/or carbon.

摘要翻译： 半导体晶片设置有布线结构，半导体芯片位置配置成行和列。 半导体晶片具有至少一个作为自支撑尺寸稳定的基板层（4）的涂层（6），和/或作为由导电的耐高温材料构成的布线结构。 衬底层（4）和/或布线结构的涂层材料（6）具有三元碳化物和/或三元氮化物和/或碳。

公开(公告)号：US20060180932A1

公开(公告)日：2006-08-17

申请号：US11328595

申请日：2006-01-10

申请人： Ralf Otremba ,  Khalil Hosseini ,  Helmut Strack

发明人： Ralf Otremba ,  Khalil Hosseini ,  Helmut Strack

IPC分类号： H01L23/52

CPC分类号： H01L24/72 ,  H01L23/051 ,  H01L23/4334 ,  H01L23/49562 ,  H01L24/48 ,  H01L25/117 ,  H01L2224/48472 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： One embodiment of the invention relates to a component arrangement having a semiconductor chip, a chip carrier, a contact piece and a package. The semiconductor chip includes a first load terminal, a second load terminal and a control terminal, with the first load terminal and the second load terminal being arranged on mutually opposite sides of the semiconductor chip. The semiconductor chip is arranged on the chip carrier and is electrically and thermally conductively connected to the first load terminal. The contact piece is arranged on the second load terminal and is electrically and thermally conductively connected to it. The package is formed from a dielectric compound, which surrounds the semiconductor chip, the chip carrier and the contact piece. The chip carrier is exposed on a first side of the package, the contact piece is exposed on a second side of the package opposite the first side. A connecting leg is passed out of the package and is electrically conductively connected to the control terminal. One embodiment of the invention furthermore relates to a component cascade, in which a plurality of component arrangements are arranged on one another in the form of a stack.

摘要翻译： 本发明的一个实施例涉及具有半导体芯片，芯片载体，接触片和封装的部件布置。 半导体芯片包括第一负载端子，第二负载端子和控制端子，其中第一负载端子和第二负载端子布置在半导体芯片的相对的相对侧上。 半导体芯片布置在芯片载体上并且电和热导电地连接到第一负载端子。 接触件布置在第二负载端子上，并且与导电连接。 封装由围绕半导体芯片，芯片载体和接触片的电介质化合物形成。 芯片载体暴露在封装的第一侧上，接触件暴露在与第一侧相对的封装的第二侧上。 连接腿从包装件中流出并与导电连接到控制端子。 本发明的一个实施例还涉及一种组件级联，其中多个组件布置以堆叠的形式彼此布置。

公开(公告)号：US06828609B2

公开(公告)日：2004-12-07

申请号：US10455834

申请日：2003-06-06

申请人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Martin Weber

发明人： Gerald Deboy ,  Dirk Ahlers ,  Helmut Strack ,  Michael Rueb ,  Hans Martin Weber

IPC分类号： H01L2980

CPC分类号： H01L29/7816 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/41766 ,  H01L29/4232 ,  H01L29/4238 ,  H01L29/7801 ,  H01L29/7802

摘要： A semiconductor component having a semiconductor body comprises a blocking pn junction, a source zone of a first conductivity type and bordering on a zone forming the blocking pn junction of a second conductivity type complementary to the first conductivity type, and a drain zone of the first conductivity type. The side of the zone of the second conductivity type faces the drain zone forming a first surface, and in the region between the first surface and a second surface areas of the first and second conductivity type are nested in one another. The areas of the first and second conductivity type are variably so doped that near the first surface doping atoms of the second conductivity type predominate, and near the second surface doping atoms of the first conductivity type predominate. Furthermore a plurality of floating zones of the first and second conductivity type is provided.

摘要翻译： 具有半导体主体的半导体部件包括阻挡pn结，第一导电类型的源极区域，并且与形成与第一导电类型互补的第二导电类型的阻挡pn结的区域接合，并且第一导电类型的漏极区域 导电类型。 第二导电类型的区域侧面对排水区，形成第一表面，并且在第一表面和第一和第二导电类型的第二表面区域之间的区域彼此嵌套。 第一和第二导电类型的区域是可变地掺杂的，在第一表面附近，第二导电类型的掺杂原子占主导地位，并且在第二表面附近，第一导电类型的掺杂原子占主导地位。 此外，提供了第一和第二导电类型的多个浮动区域。

公开(公告)号：US06812524B2

公开(公告)日：2004-11-02

申请号：US10013999

申请日：2001-12-11

申请人： Dirk Ahlers ,  Jens-Peer Stengl ,  Jenoe Tihanyi ,  Hans Weber ,  Gerald Deboy ,  Helmut Strack ,  Armin Willmeroth

发明人： Dirk Ahlers ,  Jens-Peer Stengl ,  Jenoe Tihanyi ,  Hans Weber ,  Gerald Deboy ,  Helmut Strack ,  Armin Willmeroth

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/7816

摘要： A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.

摘要翻译： 半导体部件包括形成在半导体本体中的第一和第二连接区域，围绕半导体主体中的第二连接区域的沟道区域以及形成在沟道区域和第一连接区域之间并且包含补偿区域的漂移路径。 补偿区相对于漂移区具有互补导电类型并且包括至少两个段。 选择两个相邻段之间的距离，使得这些段之间的穿通电压位于对应于位于额定电流和额定电流两倍之间的电流处的漂移路径上的电压降所假定的电压范围的电压范围 当前。

公开(公告)号：US06649459B2

公开(公告)日：2003-11-18

申请号：US09817594

申请日：2001-03-26

申请人： Gerald Deboy ,  Wolfgang Friza ,  Oliver Häberlen ,  Michael Rüb ,  Helmut Strack

发明人： Gerald Deboy ,  Wolfgang Friza ,  Oliver Häberlen ,  Michael Rüb ,  Helmut Strack

IPC分类号： H01L21338

CPC分类号： H01L29/7802 ,  H01L21/26586 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/41766

摘要： The invention relates to a method for producing a semiconductor component including semiconductor areas of different conductivity types which are alternately positioned in a semiconductor body. The semiconductor areas of different conductivity types extend at least from one first zone to a position near a second zone. Because of variable doping in trenches and in the trench fillings, an electric field is generated which increases from both the first zone and the second zone.

摘要翻译： 本发明涉及一种用于制造半导体元件的方法，该半导体元件包括交替地位于半导体本体中的不同导电类型的半导体区域。 不同导电类型的半导体区域至少从一个第一区延伸到靠近第二区的位置。 由于沟槽和沟槽填充中的可变掺杂，产生从第一区和第二区两者增加的电场。

公开(公告)号：US06225643B1

公开(公告)日：2001-05-01

申请号：US09158248

申请日：1998-09-22

申请人： Jenoe Tihanyi ,  Helmut Strack

发明人： Jenoe Tihanyi ,  Helmut Strack

IPC分类号： H01L2904

CPC分类号： H01L29/7802 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/6634 ,  H01L29/7395 ,  H01L29/7396

摘要： An SOI cell includes a semiconductor body having at least one insulator layer. A polycrystalline zone doped with a dopant of a first conductivity type is grown on the insulator layer. The polycrystalline zone is adjoined outside the region of the insulator layer by a semiconductor region, which is doped with the dopant of the first conduction type that has been diffused out of the polycrystalline zone. A dopant source having a dopant of a second conductivity type is also provided. A zone having the dopant of the second conductivity type is formed by diffusing the dopant out of the dopant source.

摘要翻译： SOI单元包括具有至少一个绝缘体层的半导体本体。 在绝缘体层上生长掺杂有第一导电类型的掺杂剂的多晶区。 多晶区域通过半导体区域与绝缘体层的区域相邻，该半导体区域掺杂有已经扩散到多晶区域的第一导电类型的掺杂剂。 还提供了具有第二导电类型的掺杂剂的掺杂剂源。 通过将掺杂剂从掺杂剂源扩散出来，形成具有第二导电类型的掺杂剂的区域。

公开(公告)号：US06184555B2

公开(公告)日：2001-02-06

申请号：US09117636

申请日：1998-12-04

申请人： Jeno Tihanyi ,  Helmut Strack ,  Heinrich Geiger

发明人： Jeno Tihanyi ,  Helmut Strack ,  Heinrich Geiger

IPC分类号： H01L2976

CPC分类号： H01L29/7811 ,  H01L21/2257 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7835

摘要： The invention relates to a field effect-controllable semiconductor component of vertical or lateral design i.e. MOSFETs and IGBTs. In this case, depletion zones and complementary depletion zones of opposite conduction types are introduced in the source-drain load path, in the semiconductor body, i.e. in the inner zone in the case of vertical components and in the drift zone in the case of lateral components, the concentration of the regions doped by the first conduction type corresponding approximately to the concentration of the regions doped by the second conduction type.

摘要翻译： 本发明涉及垂直或侧向设计的场效应可控半导体元件，即MOSFET和IGBT。 在这种情况下，相反导电类型的耗尽区和互补耗尽区被引入到半导体主体中的源极 - 漏极负载路径中，即在垂直分量的情况下在内部区域中，并且在横向 由第一导电类型掺杂的区域的浓度大致对应于由第二导电类型掺杂的区域的浓度。

公开(公告)号：US5311052A

公开(公告)日：1994-05-10

申请号：US426783

申请日：1982-09-29

申请人： Jens P. Stengl ,  Helmut Strack ,  Jeno Tihanyi

发明人： Jens P. Stengl ,  Helmut Strack ,  Jeno Tihanyi

IPC分类号： H01L27/088 ,  H01L21/76 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/22 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/861 ,  H01L29/34

CPC分类号： H01L29/404

摘要： Semiconductor component, including a semiconductor body having an edge, a surface, a substrate of a first given conductivity type, at least one zone being embedded in a planar manner in the substrate at the surface and being of a second conductivity type opposite the first given type, and insulating layer disposed on the surface, an electrode being in contact with the at least one zone, a channel stopper disposed on the insulating layer outside the at least one zone and in vicinity of the edge of the semiconductor body, the channel stopper being electrically connected to the substrate, and a field plate beind disposed on the insulating layer between the at least one zone and the channel stopper and being electrically connected to the at least one zone, the channel stopper being disposed at an increasing distance from the edge and the surface of the semiconductor body, as seen in direction toward the at least one zone.

摘要翻译： 半导体部件，包括具有第一给定导电类型的边缘，表面，衬底的半导体本体，至少一个区域以平面方式嵌入在该表面的衬底中，并且具有与第一给定的相反的第二导电类型 类型和绝缘层，与所述至少一个区域接触的电极，设置在所述至少一个区域外部并且位于所述半导体主体的边缘附近的所述绝缘层上的通道阻挡件，所述通道塞 电连接到所述衬底，并且场板被设置在所述至少一个区域和所述通道阻挡件之间的所述绝缘层上并且电连接到所述至少一个区域，所述通道阻挡件设置在距所述边缘 以及半导体本体的表面，从朝向至少一个区域的方向看。