公开(公告)号：US10002930B2

公开(公告)日：2018-06-19

申请号：US15365627

申请日：2016-11-30

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Jens Peter Konrath ,  Francisco Javier Santos Rodriguez ,  Carsten Schaeffer ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Guenther Wellenzohn

IPC: H01L29/45 ,  H01L21/28 ,  H01L29/40 ,  H01L21/02 ,  H01L21/04 ,  H01L21/225 ,  H01L29/47 ,  H01L29/16 ,  H01L21/285 ,  H01L29/20

CPC classification number: H01L29/401 ,  H01L21/02697 ,  H01L21/043 ,  H01L21/046 ,  H01L21/0485 ,  H01L21/0495 ,  H01L21/2258 ,  H01L21/28575 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/45 ,  H01L29/452 ,  H01L29/47 ,  H01L29/861 ,  H01L29/872

Abstract: Disclosed is a method. The method includes forming a metal layer on a first surface of a semiconductor body; irradiating the metal layer with particles to move metal atoms from the metal layer into the semiconductor body and form a metal atom containing region in the semiconductor body; and annealing the semiconductor body. The annealing includes heating at least the metal atom containing region to a temperature of less than 500° C.

公开(公告)号：US09917000B2

公开(公告)日：2018-03-13

申请号：US14873124

申请日：2015-10-01

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Ronny Kern ,  Josef Unterweger

IPC: H01L21/68 ,  H01L21/683

CPC classification number: H01L21/6836 ,  H01L21/6838

Abstract: A wafer carrier comprises a first foil, a second foil, and a chamber between the first and the second foil. The first foil has a perforation and is used for carrying the wafer. The first and the second foil are connected to each other so as to form the chamber. The chamber is configured to be evacuated to form a vacuum in the chamber, the vacuum causes an underpressure at the perforation, the underpressure forms a carrying force to the wafer to be carried.

公开(公告)号：US20180068975A1

公开(公告)日：2018-03-08

申请号：US15690517

申请日：2017-08-30

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Alexander Breymesser ,  Andre Brockmeier ,  Carsten von Koblinski ,  Francisco Javier Santos Rodriguez ,  Ronny Kern

IPC: H01L23/00 ,  H01L21/78 ,  H01L23/367 ,  H01L21/48 ,  H01L23/31

CPC classification number: H01L24/94 ,  H01L21/4803 ,  H01L21/561 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3114 ,  H01L23/3171 ,  H01L23/367 ,  H01L24/03 ,  H01L24/05 ,  H01L24/83 ,  H01L2224/03312 ,  H01L2224/0332 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05005 ,  H01L2224/83893 ,  H01L2224/83894 ,  H01L2224/94 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/12032 ,  H01L2224/03

Abstract: A method for forming semiconductor devices includes attaching a glass structure to a wide band-gap semiconductor wafer having a plurality of semiconductor devices. The method further includes forming at least one pad structure electrically connected to at least one doping region of a semiconductor substrate of the wide band-gap semiconductor wafer, by forming electrically conductive material within at least one opening extending through the glass structure.

公开(公告)号：US20170316929A1

公开(公告)日：2017-11-02

申请号：US15650504

申请日：2017-07-14

Applicant: Infineon Technologies AG

Inventor： Helmut Oefner ,  Nico Caspary ,  Mohammad Momeni ,  Reinhard Ploss ,  Francisco Javier Santos Rodriguez ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L21/268 ,  H01L21/324 ,  H01L29/66 ,  H01L21/18 ,  H01L21/28 ,  H01L21/322 ,  H01L21/225

CPC classification number: H01L29/7393 ,  H01L21/02002 ,  H01L21/02005 ,  H01L21/02008 ,  H01L21/0201 ,  H01L21/02016 ,  H01L21/187 ,  H01L21/2257 ,  H01L21/268 ,  H01L21/28238 ,  H01L21/3221 ,  H01L21/3225 ,  H01L21/324 ,  H01L21/3242 ,  H01L21/76256 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/66325 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7813

Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.

公开(公告)号：US20170148664A1

公开(公告)日：2017-05-25

申请号：US14946886

申请日：2015-11-20

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez ,  Iris Moder ,  Ingo Muri

IPC: H01L21/762 ,  H01L21/265 ,  H01L21/306

CPC classification number: H01L21/76243 ,  H01L21/02005 ,  H01L21/26533 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/30625 ,  H01L21/324 ,  H01L21/7806

Abstract: According to various embodiments, a method may include: providing a substrate having a first side and a second side opposite the first side; forming a buried layer at least one of in or over the substrate by processing the first side of the substrate; thinning the substrate from the second side of the substrate, wherein the buried layer includes a solid state compound having a greater resistance to the thinning than the substrate and wherein the thinning stops at the buried layer.

公开(公告)号：US09570542B2

公开(公告)日：2017-02-14

申请号：US14242366

申请日：2014-04-01

Applicant: Infineon Technologies AG

Inventor： Alexander Breymesser ,  Andre Brockmeier ,  Elmar Falck ,  Francisco Javier Santos Rodriguez ,  Holger Schulze

IPC: H01L29/06 ,  H01L29/32 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L21/762 ,  H01L29/16 ,  H01L29/20 ,  H01L29/22

CPC classification number: H01L21/76224 ,  H01L21/78 ,  H01L23/562 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2203 ,  H01L29/32 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66136 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/8613

Abstract: A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. A conductive structure extends parallel to the first surface and overlaps the glass structure at the first side.

Abstract translation: 半导体器件包括半导体本体，其具有在第一侧的第一表面，与第一表面相对的第二表面和连接第一表面和第二表面的边缘表面。 边缘终端结构包括玻璃结构并且沿边缘表面至少从与第一表面共面的平面朝向第二表面延伸。 导电结构平行于第一表面延伸并且在第一侧与玻璃结构重叠。

公开(公告)号：US20160086838A1

公开(公告)日：2016-03-24

申请号：US14490705

申请日：2014-09-19

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez ,  Gerald Lackner ,  Josef Unterweger

IPC: H01L21/683

CPC classification number: H01L21/6835 ,  H01L21/304 ,  H01L2221/68318 ,  H01L2221/6834 ,  H01L2221/68381

Abstract: A wafer arrangement in accordance with various embodiments may include: a wafer; and a wafer support ring, wherein the wafer and the wafer support ring are configured to be releasably attachable to one another.

Abstract translation: 根据各种实施例的晶片布置可以包括：晶片; 以及晶片支撑环，其中所述晶片和所述晶片支撑环被配置为可释放地彼此附接。

公开(公告)号：US20160079183A1

公开(公告)日：2016-03-17

申请号：US14484928

申请日：2014-09-12

Applicant: Infineon Technologies AG

Inventor： Francisco Javier Santos Rodriguez

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/78 ,  H01L29/06 ,  H01L23/522

CPC classification number: H01L22/20 ,  H01L21/26513 ,  H01L21/302 ,  H01L21/306 ,  H01L21/30604 ,  H01L21/78 ,  H01L22/12 ,  H01L23/522 ,  H01L29/34 ,  H01L29/36 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device arrangement includes a semiconductor substrate which includes a semiconductor substrate front side and a semiconductor substrate back side. The semiconductor substrate includes at least one electrical element formed at the semiconductor substrate front side. The semiconductor device arrangement further includes at least one porous semiconductor region formed at the semiconductor substrate back side.

Abstract translation: 半导体器件布置包括半导体衬底，其包括半导体衬底正面和半导体衬底背面。 半导体衬底包括在半导体衬底正面形成的至少一个电气元件。 半导体器件布置还包括形成在半导体衬底背侧的至少一个多孔半导体区域。

公开(公告)号：US20150279930A1

公开(公告)日：2015-10-01

申请号：US14242366

申请日：2014-04-01

Applicant: Infineon Technologies AG

Inventor： Alexander Breymesser ,  Andre Brockmeier ,  Elmar Falck ,  Francisco Javier Santos Rodriguez ,  Holger Schulze

IPC: H01L29/06 ,  H01L29/861 ,  H01L29/739 ,  H01L29/40 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/78 ,  H01L23/562 ,  H01L29/0615 ,  H01L29/0649 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2203 ,  H01L29/32 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66136 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8611 ,  H01L29/8613

Abstract: A semiconductor device includes a semiconductor body with a first surface at a first side, a second surface opposite to the first surface and an edge surface connecting the first and second surfaces. An edge termination structure includes a glass structure and extends along the edge surface, at least from a plane coplanar with the first surface towards the second surface. A conductive structure extends parallel to the first surface and overlaps the glass structure at the first side.

Abstract translation: 半导体器件包括半导体本体，其具有在第一侧的第一表面，与第一表面相对的第二表面和连接第一表面和第二表面的边缘表面。 边缘终端结构包括玻璃结构并且沿边缘表面至少从与第一表面共面的平面朝向第二表面延伸。 导电结构平行于第一表面延伸并且在第一侧与玻璃结构重叠。

公开(公告)号：US08822310B2

公开(公告)日：2014-09-02

申请号：US13774827

申请日：2013-02-22

Applicant: Infineon Technologies AG

Inventor： Gerald Lackner ,  Christian Maier ,  Francisco Javier Santos Rodriguez

IPC: H01L21/46

CPC classification number: H01L21/683 ,  H01L21/02104 ,  H01L21/268 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/6835 ,  H01L21/6838 ,  H01L21/68735 ,  H01L21/6875 ,  H01L2221/6834

Abstract: Some embodiments discussed relates to an apparatus for holding a substrate, comprising a body with a surface for a semiconductor wafer to rest on, with the surface having a first surface area on which a first area of the semiconductor wafer can rest, and a second surface area on which a second area of the semiconductor wafer can rest, wherein the second surface area protrudes with respect to the first surface area.