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公开(公告)号：US10510830B2
公开(公告)日：2019-12-17
申请号：US16120300
申请日：2018-09-02
发明人： Ching-Hung Weng , Cheng-Jui Yang , Yu-Min Yang , Yuan-Hsiao Chang , Bo-Kai Wang , Wen-Huai Yu , Ying-Ru Shih , Sung-Lin Hsu
IPC分类号： H01L29/32 , H01L29/04 , H01L29/167 , H01L31/0368 , C30B11/00 , C30B29/06
摘要： An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (Ω·cm), the slope of resistivity is 0 to −1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
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公开(公告)号：US10138572B2
公开(公告)日：2018-11-27
申请号：US15070610
申请日：2016-03-15
发明人： Sung-Lin Hsu , Cheng-Jui Yang , Pei-Kai Huang , Sheng-Hua Ni , Yu-Min Yang , Ming-Kung Hsiao , Wen-Huai Yu , Ching-Shan Lin , Wen-Ching Hsu , Chung-Wen Lan
摘要： A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
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3.发明授权公开(公告)号：US09885125B2
公开(公告)日：2018-02-06
申请号：US14645483
申请日：2015-03-12
发明人： Hung-Sheng Chou , Li Wei Li , Wen-Huai Yu , Bruce Hsu , Chun-I Fan , Wen Ching Hsu
CPC分类号： C30B29/06 , B05B12/004 , B05D1/02 , B05D7/227 , C30B35/002
摘要： A method for manufacturing an isolating layer onto a crucible includes the steps as follows: providing a spraying device for the following spraying steps; heating the crucible and measuring the heated crucible to get a first temperature; spraying a slurry on the inner wall of the crucible to form an isolating layer by a spraying unit with a predetermined spraying manner; measuring the isolating layer to get a second temperature; obtaining a value for the difference between the first and second temperatures and judging whether the difference value in a within predetermined difference scope or not, in which the predetermined difference scope is about 6° C.˜12° C.; when the difference value is not in the predetermined difference scope, adjusting the predetermined spraying manner; when the difference value is in the predetermined difference scope, implementing the above spraying steps to the crucible.
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公开(公告)号：US09593406B2
公开(公告)日：2017-03-14
申请号：US14550239
申请日：2014-11-21
发明人： Miin-Jang Chen , Wen-Ching Hsu
IPC分类号： H01L31/0216 , H01L31/0224 , H01L31/0336 , H01L33/06 , H01L33/24 , C23C14/08 , G02B1/113 , G02B1/115 , C23C16/04 , C23C16/40 , C23C16/455 , C23C14/34 , C25D5/10 , C25D7/00 , C23C18/16
CPC分类号： C23C14/08 , C23C14/34 , C23C16/045 , C23C16/403 , C23C16/45525 , C23C18/165 , C25D5/10 , C25D7/00 , G02B1/113 , G02B1/115 , Y10T428/24364
摘要： The invention provides an optical device and manufacture thereof. The optical device of the invention includes a transparent substrate, a seeding layer, a plurality of nano-rods and a protection layer. The seeding layer is formed to overlay an entrance surface and an exit surface of the transparent substrate. The plurality of nano-rods are formed on the seeding layer. The protection layer is formed to completely overlay the plurality of nano-rods.
摘要翻译： 本发明提供一种光学装置及其制造方法。 本发明的光学装置包括透明基板，接种层，多个纳米棒和保护层。 形成接合层以覆盖透明基板的入射表面和出射表面。 在接种层上形成多个纳米棒。 保护层形成为完全覆盖多个纳米棒。
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公开(公告)号：US20170062635A1
公开(公告)日：2017-03-02
申请号：US15248905
申请日：2016-08-26
发明人： Cheng-Jui Yang , Huang Wei Lin , Yu-Min Yang , Kuo-Wei Chuang , Ming-Kung Hsiao , Yuan Hsiao Chang , Bo-Kai Wang , Wen-Huai Yu , Sung Lin Hsu , I-Ching Li , Wen-Ching Hsu
IPC分类号： H01L31/0368 , H01L31/18
CPC分类号： H01L31/03682 , C01B33/02 , C01P2002/60 , C01P2002/90 , C01P2006/40 , C01P2006/80 , C30B11/00 , C30B28/06 , C30B29/06 , C30B29/605 , H01L31/182 , Y02E10/546 , Y02P70/521
摘要： A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 Ω-cm.
摘要翻译： 提供多晶硅晶片。 多晶硅晶片包括多个硅晶粒，其中多晶硅晶片的碳含量大于4ppma，多晶硅晶片的电阻率大于或等于1.55Ω-cm。
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6.发明授权Method of fabricating crystalline silicon ingot including nucleation promotion layer 有权包括成核促进层的晶体硅锭的制造方法公开(公告)号：US09493357B2
公开(公告)日：2016-11-15
申请号：US13416525
申请日：2012-03-09
申请人： Wen-Huai Yu , Cheng-Jui Yang , Yu-Min Yang , Kai-Yuan Pai , Wen-Chieh Lan , Chan-Lu Su , Yu-Tsung Chiang , Sung-Lin Hsu , Wen-Ching Hsu , Chung-Wen Lan
发明人： Wen-Huai Yu , Cheng-Jui Yang , Yu-Min Yang , Kai-Yuan Pai , Wen-Chieh Lan , Chan-Lu Su , Yu-Tsung Chiang , Sung-Lin Hsu , Wen-Ching Hsu , Chung-Wen Lan
CPC分类号： C01B33/02 , C30B11/002 , C30B11/006 , C30B29/06 , H01L31/182 , Y02E10/546 , Y02P70/521 , Y10T428/259
摘要： A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
摘要翻译： 提供一种晶体硅锭及其制造方法。 该方法利用成核促进层促进多个硅晶粒在硅熔体上在成核促进层上成核并在垂直方向上生长成硅晶粒，直到硅熔体完全固化。 硅锭沿垂直方向的缺陷密度增加率为0.01％/ mm〜10％/ mm。
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公开(公告)号：US09490326B2
公开(公告)日：2016-11-08
申请号：US14698923
申请日：2015-04-29
发明人： Jian-Jhih Li , Wen-Ching Hsu
CPC分类号： H01L29/16 , C30B29/06 , C30B33/00 , C30B33/10 , Y10T428/24777
摘要： The instant disclosure relates to a wafer formed by slicing an ingot. The wafer has at least one side surface adjacent to the slicing path and topped with a nanostructure layer.
摘要翻译： 本公开涉及通过切割锭而形成的晶片。 晶片具有与切片路径相邻的至少一个侧表面并且顶部具有纳米结构层。
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公开(公告)号：US09315918B2
公开(公告)日：2016-04-19
申请号：US13416765
申请日：2012-03-09
申请人： Sung-Lin Hsu , Cheng-Jui Yang , Pei-Kai Huang , Sheng-Hua Ni , Yu-Min Yang , Ming-Kung Hsiao , Wen-Huai Yu , Ching-Shan Lin , Wen-Ching Hsu , Chung-Wen Lan
发明人： Sung-Lin Hsu , Cheng-Jui Yang , Pei-Kai Huang , Sheng-Hua Ni , Yu-Min Yang , Ming-Kung Hsiao , Wen-Huai Yu , Ching-Shan Lin , Wen-Ching Hsu , Chung-Wen Lan
CPC分类号： C30B11/006 , C01B33/02 , C30B9/00 , C30B11/002 , C30B11/003 , C30B11/02 , C30B11/14 , C30B28/06 , C30B29/06
摘要： A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
摘要翻译： 公开了一种晶体硅锭及其制造方法。 本发明的结晶硅锭包括在晶体硅锭的垂直方向上生长的多个硅晶粒。 晶体硅锭的底部具有第一平均晶粒尺寸小于约12mm的硅晶粒。 晶体硅锭的上部距离所述底部约250mm，硅晶粒具有大于约14mm的第二平均晶粒尺寸。
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公开(公告)号：US20160056034A1
公开(公告)日：2016-02-25
申请号：US14731902
申请日：2015-06-05
发明人： Jer-Liang YEH , Chih-Yuan CHUANG , Chun-I FAN , Wen-Ching HSU
IPC分类号： H01L21/02
摘要： A method for manufacturing a wafer includes forming a plurality nano-pillars on a surface of a brick; forming a cover layer on the surfaces of the brick, wherein the cover layer covers the nano-pillars; forming an adhesive layer on the surface of the cover layer; cutting the brick into a plurality of wafers; and removing the cover layer and the adhesive layer on the wafers by a solvent, wherein the solvent reacts with the cover layer but not reacts with the brick.
摘要翻译： 晶片的制造方法包括在砖的表面上形成多个纳米柱; 在所述砖的表面上形成覆盖层，其中所述覆盖层覆盖所述纳米柱; 在覆盖层的表面上形成粘合剂层; 将砖切成多个晶片; 并通过溶剂除去晶片上的覆盖层和粘合剂层，其中溶剂与覆盖层反应，但不与砖反应。
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10.发明授权公开(公告)号：US09068279B2
公开(公告)日：2015-06-30
申请号：US13067710
申请日：2011-06-22
申请人： Chyan Jiunn-Yih , Yeh Jer-Liang , Hsu Wen-Ching , Ho Suz-Hua
发明人： Chyan Jiunn-Yih , Yeh Jer-Liang , Hsu Wen-Ching , Ho Suz-Hua
IPC分类号： H01L21/302 , C30B29/60 , H01L21/306 , H01L21/308 , H01L21/3065 , B82Y30/00 , B82Y40/00 , H01L21/02
CPC分类号： C30B29/60 , B82Y30/00 , B82Y40/00 , H01L21/0237 , H01L21/0243 , H01L21/02521 , H01L21/02658 , H01L21/30604 , H01L21/3065 , H01L21/3086 , Y10T428/24355
摘要： The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.
摘要翻译： 本发明提供一种外延衬底及其制造。 根据本发明的外延衬底包括晶体衬底。 特别地，晶体衬底具有纳米凹凸和非图案化的外延表面。 根据本发明的外延衬底有益于化合物半导体材料在外延薄膜生长中的优良品质。 此外，根据本发明的外延衬底的制造具有成本低且生产快速的优点。
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