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公开(公告)号：US09006081B2
公开(公告)日：2015-04-14
申请号：US13530543
申请日：2012-06-22
申请人： Jung-Seok Ahn , Il Hwan Kim , Jung-Hwan Kim , Sangwook Park , Chungsun Lee , Kwang-chul Choi
发明人： Jung-Seok Ahn , Il Hwan Kim , Jung-Hwan Kim , Sangwook Park , Chungsun Lee , Kwang-chul Choi
CPC分类号： H01L21/78 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2221/68318 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834 , H01L2221/68368 , H01L2221/68381 , H01L2224/13025 , H01L2224/13101 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/12042 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/014 , H01L2924/00 , H01L2924/00012
摘要： Methods of manufacturing a plurality of semiconductor chips are provided. The method may include providing a middle layer between a substrate and a carrier to combine the carrier with the substrate, thinning the substrate; after thinning the substrate, separating the carrier from the substrate; and after the carrier is separated from the substrate, cutting the substrate to form the plurality of semiconductor chips, wherein the middle layer is adhered to the carrier with a first bonding force, and the middle layer is adhered to the substrate with a second bonding force, and wherein the second bonding force is greater than the first bonding force.
摘要翻译： 提供制造多个半导体芯片的方法。 该方法可以包括在衬底和载体之间提供中间层以将载体与衬底组合，使衬底变薄; 在使衬底变薄之后，将衬底与衬底分离; 在载体与基板分离之后，切割基板以形成多个半导体芯片，其中中间层以第一结合力粘附到载体上，并且中间层以第二结合力粘附到基板 并且其中所述第二结合力大于所述第一结合力。
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公开(公告)号：US08791562B2
公开(公告)日：2014-07-29
申请号：US13183645
申请日：2011-07-15
申请人： Chung-sun Lee , Jung-Hwan Kim , Yun-hyeok Im , Ji-hwan Hwang , Hyon-chol Kim , Kwang-chul Choi , Eun-kyoung Choi , Tae-hong Min
发明人： Chung-sun Lee , Jung-Hwan Kim , Yun-hyeok Im , Ji-hwan Hwang , Hyon-chol Kim , Kwang-chul Choi , Eun-kyoung Choi , Tae-hong Min
IPC分类号： H01L23/58 , H01L25/065 , H01L25/10 , H01L23/00
CPC分类号： H01L25/0657 , H01L24/73 , H01L24/97 , H01L25/0655 , H01L25/105 , H01L2224/0401 , H01L2224/0557 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06565 , H01L2225/1023 , H01L2225/107 , H01L2225/1094 , H01L2924/00014 , H01L2924/01019 , H01L2924/01087 , H01L2924/09701 , H01L2924/15311 , H01L2924/15331 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/05552
摘要： A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip.
摘要翻译： 可用于三维（3D）系统级封装（SIP））的堆叠封装包括第一半导体芯片，第二半导体芯片和支持器。 第一半导体芯片包括贯通硅通孔（TSV），第二半导体芯片堆叠在第一半导体芯片上，并通过第一半导体芯片的TSV与第一半导体芯片电连接。 支撑件附接到第一半导体芯片上，以便与第二半导体芯片的边缘间隔开。
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公开(公告)号：US08759147B2
公开(公告)日：2014-06-24
申请号：US13235372
申请日：2011-09-17
申请人： Eun-Kyoung Choi , SeYoung Jeong , Kwang-chul Choi , Tae Hong Min , Chungsun Lee , Jung-Hwan Kim
发明人： Eun-Kyoung Choi , SeYoung Jeong , Kwang-chul Choi , Tae Hong Min , Chungsun Lee , Jung-Hwan Kim
IPC分类号： H01L21/00
CPC分类号： H01L24/97 , H01L21/561 , H01L21/6835 , H01L23/3128 , H01L23/36 , H01L23/3672 , H01L23/3677 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2225/06589 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
摘要翻译： 提供半导体封装及其制造方法。 在一个实施例中，为了制造半导体封装，提供其中制造有半导体芯片的晶片。 在晶片上形成散热层。 散热层接触半导体芯片的顶表面。 此后，从晶片上分离多个半导体芯片。
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公开(公告)号：US20130032947A1
公开(公告)日：2013-02-07
申请号：US13482415
申请日：2012-05-29
申请人： Sang-sick Park , Tae-je Cho , Sang-wook Park , Teak-hoon Lee , Kwang-chul Choi , Myung-sung Kang
发明人： Sang-sick Park , Tae-je Cho , Sang-wook Park , Teak-hoon Lee , Kwang-chul Choi , Myung-sung Kang
CPC分类号： H01L23/3128 , H01L21/563 , H01L21/568 , H01L23/3135 , H01L23/544 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2223/54426 , H01L2223/54486 , H01L2224/03462 , H01L2224/0401 , H01L2224/0557 , H01L2224/05624 , H01L2224/05647 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81005 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06596 , H01L2924/00014 , H01L2924/01327 , H01L2924/12042 , H01L2924/1431 , H01L2924/1432 , H01L2924/1433 , H01L2924/15311 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor package that stably protects an internal semiconductor chip from external shocks, and a method of manufacturing the semiconductor package is disclosed. The semiconductor package includes a first semiconductor chip including a first body layer having a first surface, a second surface, and a lateral surface between the first surface and the second surface, and a first protective layer that exposes an edge portion of the first surface and forms a step difference with the first surface; an encapsulation structure that covers a lateral surface of the first body layer and the edge portion of the first surface so as to encapsulate the first semiconductor chip to have a locking structure; and a first conductive terminal formed on the first body layer through the protective layer.
摘要翻译： 公开了一种稳定地保护内部半导体芯片免受外部冲击的半导体封装以及半导体封装的制造方法。 该半导体封装包括第一半导体芯片，该第一半导体芯片包括具有第一表面，第二表面和第一表面与第二表面之间的侧表面的第一本体层，以及暴露第一表面的边缘部分的第一保护层和 与第一表面形成阶梯差; 封装结构，其覆盖第一主体层的侧面和第一表面的边缘部分，以便将第一半导体芯片封装成具有锁定结构; 以及通过保护层形成在第一主体层上的第一导电端子。
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公开(公告)号：US20120228780A1
公开(公告)日：2012-09-13
申请号：US13422745
申请日：2012-03-16
申请人： Ji Hwang Kim , Kwang-Chul Choi , Sangwon Kim , Tae Hong Min
发明人： Ji Hwang Kim , Kwang-Chul Choi , Sangwon Kim , Tae Hong Min
IPC分类号： H01L23/522
CPC分类号： H01L23/36 , H01L21/563 , H01L21/76898 , H01L23/147 , H01L23/3114 , H01L23/3135 , H01L23/3192 , H01L23/48 , H01L23/481 , H01L23/49816 , H01L23/525 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/80 , H01L24/81 , H01L25/0657 , H01L2224/02379 , H01L2224/0401 , H01L2224/0519 , H01L2224/05548 , H01L2224/05556 , H01L2224/05559 , H01L2224/05567 , H01L2224/0557 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2225/06513 , H01L2225/06517 , H01L2225/06544 , H01L2225/06568 , H01L2225/06589 , H01L2924/00014 , H01L2924/15311 , H01L2924/18161 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.
摘要翻译： 提供了一种包括贯通插头的半导体器件及其制造方法。 在半导体器件中，由于在具有突出部和凹部的凸凹结构体的保护膜上配置重新配置的布线图形，因此能够防止漏电流的可靠性提高。 在制造半导体器件的方法中，由于通过使用选择性蚀刻工艺去除保护膜和绝缘膜衬套来暴露通孔结构的端面，所以通孔结构的损坏最小化，从而防止了铜污染 基质。
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公开(公告)号：US20120171814A1
公开(公告)日：2012-07-05
申请号：US13235372
申请日：2011-09-17
申请人： Eun-Kyoung CHOI , SeYoung JEONG , Kwang-chul CHOI , Tae Hong MIN , Chungsun LEE , Jung-Hwan KIM
发明人： Eun-Kyoung CHOI , SeYoung JEONG , Kwang-chul CHOI , Tae Hong MIN , Chungsun LEE , Jung-Hwan KIM
CPC分类号： H01L24/97 , H01L21/561 , H01L21/6835 , H01L23/3128 , H01L23/36 , H01L23/3672 , H01L23/3677 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2225/06589 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
摘要翻译： 提供半导体封装及其制造方法。 在一个实施例中，为了制造半导体封装，提供其中制造有半导体芯片的晶片。 在晶片上形成散热层。 散热层接触半导体芯片的顶表面。 此后，从晶片上分离多个半导体芯片。
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公开(公告)号：US20120018871A1
公开(公告)日：2012-01-26
申请号：US13183645
申请日：2011-07-15
申请人： Chung-sun LEE , Jung-Hwan Kim , Yun-Hyeok Im , Ji-Hwan Hwang , Hyon-chol Kim , Kwang-chul Choi , Eun-Kyong Choi , Tae-hong Min
发明人： Chung-sun LEE , Jung-Hwan Kim , Yun-Hyeok Im , Ji-Hwan Hwang , Hyon-chol Kim , Kwang-chul Choi , Eun-Kyong Choi , Tae-hong Min
IPC分类号： H01L23/58
CPC分类号： H01L25/0657 , H01L24/73 , H01L24/97 , H01L25/0655 , H01L25/105 , H01L2224/0401 , H01L2224/0557 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06565 , H01L2225/1023 , H01L2225/107 , H01L2225/1094 , H01L2924/00014 , H01L2924/01019 , H01L2924/01087 , H01L2924/09701 , H01L2924/15311 , H01L2924/15331 , H01L2924/15787 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/05552
摘要： A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip.
摘要翻译： 可用于三维（3D）系统级封装（SIP））的堆叠封装包括第一半导体芯片，第二半导体芯片和支持器。 第一半导体芯片包括贯通硅通孔（TSV），第二半导体芯片堆叠在第一半导体芯片上，并通过第一半导体芯片的TSV与第一半导体芯片电连接。 支撑件附接到第一半导体芯片上，以便与第二半导体芯片的边缘间隔开。
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公开(公告)号：US09202767B2
公开(公告)日：2015-12-01
申请号：US13422745
申请日：2012-03-16
申请人： Ji Hwang Kim , Kwang-Chul Choi , Sangwon Kim , Tae Hong Min
发明人： Ji Hwang Kim , Kwang-Chul Choi , Sangwon Kim , Tae Hong Min
IPC分类号： H01L23/522 , H01L23/36 , H01L25/065 , H01L21/768 , H01L23/48 , H01L23/14 , H01L23/00 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/525 , H01L23/552
CPC分类号： H01L23/36 , H01L21/563 , H01L21/76898 , H01L23/147 , H01L23/3114 , H01L23/3135 , H01L23/3192 , H01L23/48 , H01L23/481 , H01L23/49816 , H01L23/525 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/80 , H01L24/81 , H01L25/0657 , H01L2224/02379 , H01L2224/0401 , H01L2224/0519 , H01L2224/05548 , H01L2224/05556 , H01L2224/05559 , H01L2224/05567 , H01L2224/0557 , H01L2224/13021 , H01L2224/13022 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2225/06513 , H01L2225/06517 , H01L2225/06544 , H01L2225/06568 , H01L2225/06589 , H01L2924/00014 , H01L2924/15311 , H01L2924/18161 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.
摘要翻译： 提供了一种包括贯通插头的半导体器件及其制造方法。 在半导体器件中，由于在具有突出部和凹部的凸凹结构体的保护膜上配置重新配置的布线图形，因此能够防止漏电流的可靠性提高。 在制造半导体器件的方法中，由于通过使用选择性蚀刻工艺去除保护膜和绝缘膜衬套来暴露通孔结构的端面，所以通孔结构的损坏最小化，从而防止了铜污染 基质。
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公开(公告)号：US09059072B2
公开(公告)日：2015-06-16
申请号：US14294052
申请日：2014-06-02
申请人： Eun-Kyoung Choi , SeYoung Jeong , Kwang-chul Choi , Tae Hong Min , Chungsun Lee , Jung-Hwan Kim
发明人： Eun-Kyoung Choi , SeYoung Jeong , Kwang-chul Choi , Tae Hong Min , Chungsun Lee , Jung-Hwan Kim
IPC分类号： H01L23/02 , H01L23/00 , H01L21/56 , H01L23/31 , H01L25/065 , H01L25/00 , H01L23/367 , H01L21/683 , H01L23/36 , H01L23/522 , H01L25/18
CPC分类号： H01L24/97 , H01L21/561 , H01L21/6835 , H01L23/3128 , H01L23/36 , H01L23/3672 , H01L23/3677 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2225/06589 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
摘要翻译： 提供半导体封装及其制造方法。 在一个实施例中，为了制造半导体封装，提供其中制造有半导体芯片的晶片。 在晶片上形成散热层。 散热层接触半导体芯片的顶表面。 此后，从晶片上分离多个半导体芯片。
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公开(公告)号：US20120329249A1
公开(公告)日：2012-12-27
申请号：US13530543
申请日：2012-06-22
申请人： Jung-Seok Ahn , II Hwan Kim , Jung-Hwan Kim , Sangwook Park , Chungsun Lee , Kwang-chul Choi
发明人： Jung-Seok Ahn , II Hwan Kim , Jung-Hwan Kim , Sangwook Park , Chungsun Lee , Kwang-chul Choi
IPC分类号： H01L21/78
CPC分类号： H01L21/78 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/6836 , H01L23/3128 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2221/68318 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834 , H01L2221/68368 , H01L2221/68381 , H01L2224/13025 , H01L2224/13101 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/12042 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/014 , H01L2924/00 , H01L2924/00012
摘要： Methods of manufacturing a plurality of semiconductor chips are provided. The method may include providing a middle layer between a substrate and a carrier to combine the carrier with the substrate, thinning the substrate; after thinning the substrate, separating the carrier from the substrate; and after the carrier is separated from the substrate, cutting the substrate to form the plurality of semiconductor chips, wherein the middle layer is adhered to the carrier with a first bonding force, and the middle layer is adhered to the substrate with a second bonding force, and wherein the second bonding force is greater than the first bonding force.
摘要翻译： 提供制造多个半导体芯片的方法。 该方法可以包括在衬底和载体之间提供中间层以将载体与衬底组合，使衬底变薄; 在使衬底变薄之后，将衬底与衬底分离; 在载体与基板分离之后，切割基板以形成多个半导体芯片，其中中间层以第一结合力粘附到载体上，并且中间层以第二结合力粘附到基板 并且其中所述第二结合力大于所述第一结合力。
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