公开(公告)号：US09093415B2

公开(公告)日：2015-07-28

申请号：US14037110

申请日：2013-09-25

Applicant: Oh Han Kim ,  Sell Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

Inventor： Oh Han Kim ,  Sell Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

IPC: H01L23/36 ,  H01L25/065

CPC classification number: H01L23/36 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/065 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

Abstract translation: 集成电路封装系统及其制造方法包括：基板; 形成在所述基板上的模具帽; 基准标记刻在模具盖上; 涂覆在基板上并由基准标记引用的热界面材料; 以及安装在热界面材料上的散热器，通过相对于基准标记对齐的位置凹槽精确定位。

公开(公告)号：US20150084178A1

公开(公告)日：2015-03-26

申请号：US14037110

申请日：2013-09-25

Applicant: Oh Han Kim ,  SeIl Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

Inventor： Oh Han Kim ,  SeIl Jung ,  HeeSoo Lee ,  Jae Han Chung ,  YoungChul Kim

IPC: H01L23/36 ,  H01L25/065

CPC classification number: H01L23/36 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L25/065 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00

Abstract: An integrated circuit packaging system, and method of manufacture therefor, includes: a substrate; a mold cap formed on the substrate; fiducial mark inscribed in the mold cap; a thermal interface material applied over the substrate and referenced by the fiducial mark; and a heat spreader, mounted on the thermal interface material, precisely positioned by a position notch aligned relative to the fiducial mark.

Abstract translation: 一种集成电路封装系统及其制造方法，包括：基板; 形成在所述基板上的模具帽; 基准标记刻在模具盖上; 涂覆在基板上并由基准标记引用的热界面材料; 以及安装在热界面材料上的散热器，通过相对于基准标记对齐的位置凹槽精确定位。

公开(公告)号：US08709934B2

公开(公告)日：2014-04-29

申请号：US11758635

申请日：2007-06-05

Applicant: BaeYong Kim ,  Bongsuk Choi ,  Oh Han Kim

Inventor： BaeYong Kim ,  Bongsuk Choi ,  Oh Han Kim

IPC: H01L21/44

CPC classification number: H05K3/3436 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13019 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81193 ,  H01L2224/81464 ,  H01L2224/81469 ,  H01L2224/81815 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/0367 ,  Y02P70/613 ,  H01L2224/05552

Abstract: An electronic system is provided including forming a substrate having a contact, forming a conductive structure over the contact, mounting an electrical device having an external interconnect over the conductive structure, and forming a conductive protrusion from the conductive structure in the external interconnect.

Abstract translation: 提供了一种电子系统，包括形成具有触点的基板，在触点上形成导电结构，在导电结构上安装具有外部互连的电气装置，以及在外部互连中从导电结构形成导电突起。

公开(公告)号：US08536718B2

公开(公告)日：2013-09-17

申请号：US12822405

申请日：2010-06-24

Applicant: WonJun Ko ,  Oh Han Kim

Inventor： WonJun Ko ,  Oh Han Kim

IPC: H01L23/31

CPC classification number: H01L21/563 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate with a material layer including grooves in a fillet region that are substantially parallel and adjacent an integrated circuit; and forming a resin between the substrate and the integrated circuit that contacts a trench trace exposed by the grooves.

Abstract translation: 一种制造集成电路封装系统的方法，包括：向基片提供材料层，该材料层包括基本上平行并邻近集成电路的圆角区域中的凹槽; 以及在所述基板和所述集成电路之间形成树脂，所述树脂与所述凹槽暴露的沟槽迹线接触。

公开(公告)号：US08466567B2

公开(公告)日：2013-06-18

申请号：US12884134

申请日：2010-09-16

Applicant: DaeSik Choi ,  SangMi Park ,  Oh Han Kim

Inventor： DaeSik Choi ,  SangMi Park ,  Oh Han Kim

IPC: H01L23/28

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/11003 ,  H01L2224/1133 ,  H01L2224/13082 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48155 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/83005 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2224/92143 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a connection carrier having base device pads and base interconnect pads on a carrier top side of the connection carrier; connecting a base integrated circuit to the base device pads and mounted over the carrier top side; mounting base vertical interconnects directly on the base interconnect pads; attaching a base package substrate to the base integrated circuit and directly on the base vertical interconnects; forming a base encapsulation on the base package substrate, the base device pads, and the base interconnect pads; and removing a portion of the connection carrier with the base device pads and the base interconnect pads partially exposed opposite the base package substrate.

Abstract translation: 一种制造集成电路封装系统的方法，包括：在连接载体的载体顶侧上形成具有基底器件焊盘和基底互连焊盘的连接载体; 将基座集成电路连接到基座装置焊盘并安装在载体顶侧上; 将底座垂直互连直接安装在基底互连焊盘上; 将基底封装衬底附接到基底集成电路并直接在基底垂直互连上; 在基底封装衬底，基底器件焊盘和基底互连焊盘上形成基底封装; 以及使用与基底封装衬底相对部分地露出的基底器件焊盘和基底互连焊盘去除连接载体的一部分。

公开(公告)号：US08513057B2

公开(公告)日：2013-08-20

申请号：US13235135

申请日：2011-09-16

Applicant: Oh Han Kim ,  Ki Youn Jang ,  DaeSik Choi ,  DongSoo Moon

Inventor： Oh Han Kim ,  Ki Youn Jang ,  DaeSik Choi ,  DongSoo Moon

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L23/5389 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73209 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/82

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a routable layer having a column; mounting an integrated circuit structure in direct contact with the column; and forming a gamma connector to electrically connect the column to the integrated circuit structure.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供具有列的可布线层; 安装与柱直接接触的集成电路结构; 以及形成伽马连接器以将该列电连接到集成电路结构。

公开(公告)号：US20120326291A1

公开(公告)日：2012-12-27

申请号：US13165658

申请日：2011-06-21

Applicant: DaeSik Choi ,  Oh Han Kim ,  Jung SeIl

Inventor： DaeSik Choi ,  Oh Han Kim ,  Jung SeIl

IPC: H01L23/16 ,  H01L23/522 ,  H01L21/98 ,  H01L23/34

CPC classification number: H01L21/563 ,  H01L23/4334 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching a flip chip to the substrate; attaching a heat slug to the substrate and the flip chip; and forming a moldable underfill having a top underfill surface on the substrate, the flip chip, and the heat slug, the moldable underfill having a characteristic of being liquid at room temperature and the top underfill surface over the flip chip.

Abstract translation: 一种集成电路封装系统的制造方法，包括：提供基板; 将倒装芯片附接到基板; 将散热片附接到基板和倒装芯片; 并且在基板，倒装芯片和热芯块上形成具有顶部底部填充表面的可成型底部填充物，可模塑底部填充物具有在室温下为液体的特性，以及倒装芯片上的顶部底部填充表面。

公开(公告)号：US20120068319A1

公开(公告)日：2012-03-22

申请号：US12884134

申请日：2010-09-16

Applicant: DaeSik Choi ,  SangMi Park ,  Oh Han Kim

Inventor： DaeSik Choi ,  SangMi Park ,  Oh Han Kim

IPC: H01L23/528 ,  H01L21/98

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/03 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2224/11003 ,  H01L2224/1133 ,  H01L2224/13082 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48155 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/83005 ,  H01L2224/8385 ,  H01L2224/92125 ,  H01L2224/92143 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a connection carrier having base device pads and base interconnect pads on a carrier top side of the connection carrier; connecting a base integrated circuit to the base device pads and mounted over the carrier top side; mounting base vertical interconnects directly on the base interconnect pads; attaching a base package substrate to the base integrated circuit and directly on the base vertical interconnects; forming a base encapsulation on the base package substrate, the base device pads, and the base interconnect pads; and removing a portion of the connection carrier with the base device pads and the base interconnect pads partially exposed opposite the base package substrate.

Abstract translation: 一种制造集成电路封装系统的方法，包括：在连接载体的载体顶侧上形成具有基底器件焊盘和基底互连焊盘的连接载体; 将基座集成电路连接到基座装置焊盘并安装在载体顶侧上; 将底座垂直互连直接安装在基底互连焊盘上; 将基底封装衬底附接到基底集成电路并直接在基底垂直互连上; 在基底封装衬底，基底器件焊盘和基底互连焊盘上形成基底封装; 以及使用与基底封装衬底相对部分地露出的基底器件焊盘和基底互连焊盘去除连接载体的一部分。

公开(公告)号：US07956449B2

公开(公告)日：2011-06-07

申请号：US12146135

申请日：2008-06-25

Applicant: KyungHoon Lee ,  Oh Han Kim

Inventor： KyungHoon Lee ,  Oh Han Kim

IPC: H01L23/02

CPC classification number: H01L23/315 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/16 ,  H01L24/48 ,  H01L24/83 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A stacked integrated circuit package system includes: forming a recessed integrated circuit package system having a first encapsulation over a first integrated circuit and an interior cavity in the first encapsulation; forming a mountable integrated circuit package system having a second integrated circuit over a carrier; and mounting the recessed integrated circuit package system over the mountable integrated circuit package system with the second integrated circuit within the interior cavity and the first integrated circuit coupled with the carrier.

Abstract translation: 堆叠集成电路封装系统包括：形成在第一封装中的第一集成电路和内腔上具有第一封装的凹陷集成电路封装系统; 形成具有载体上的第二集成电路的可安装的集成电路封装系统; 以及将所述凹陷集成电路封装系统安装在所述可安装集成电路封装系统上，其中所述第二集成电路在所述内部空腔内，所述第一集成电路与所述载体耦合。

公开(公告)号：US20090243091A1

公开(公告)日：2009-10-01

申请号：US12184219

申请日：2008-07-31

Applicant: Oh Han Kim ,  BaeYong Kim ,  YoungMin Kim

Inventor： Oh Han Kim ,  BaeYong Kim ,  YoungMin Kim

IPC: H01L23/485

CPC classification number: H01L24/11 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/562 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/10122 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/18301 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00014

Abstract: A mock bump system includes: providing a first structure having an edge; and forming a mock bump near the edge.

Abstract translation: 模拟碰撞系统包括：提供具有边缘的第一结构; 并在边缘附近形成模拟碰撞。