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    LIGHT EMITTING DIODE WITH ENHANCED QUANTUM EFFICIENCY AND METHOD OF FABRICATION
    2.
    发明申请
    LIGHT EMITTING DIODE WITH ENHANCED QUANTUM EFFICIENCY AND METHOD OF FABRICATION 审中-公开
    具有增强量子效率的发光二极管和制造方法

    公开(公告)号：US20120235116A1

    公开(公告)日：2012-09-20

    申请号：US13387713

    申请日：2010-07-30

    申请人： Jie Su ,  Olga Kryliouk ,  Yuriy Melnik ,  Hidehiro Kojiri ,  Lu Chen ,  Tetsuya Ishikawa

    发明人： Jie Su ,  Olga Kryliouk ,  Yuriy Melnik ,  Hidehiro Kojiri ,  Lu Chen ,  Tetsuya Ishikawa

    IPC分类号： H01L33/04 ,  C30B25/02 ,  H01B1/02 ,  C30B25/08

    CPC分类号： H01L33/06 ,  H01L33/04 ,  H01L33/325

    摘要： One embodiment of a quantum well structure comprises an active region including active layers that comprise quantum wells and barrier layers wherein some or all of the active layers are p type doped. P type doping some or all of the active layers improves the quantum efficiency of III-V compound semiconductor light emitting diodes by locating the position of the P-N junction in the active region of the device thereby enabling the dominant radiative recombination to occur within the active region. In one embodiment, the quantum well structure is fabricated in a cluster tool having a hydride vapor phase epitaxial (HVPE) deposition chamber with a eutectic source alloy. In one embodiment, the indium gallium nitride (InGaN) layer and the magnesium doped gallium nitride (Mg—GaN) or magnesium doped aluminum gallium nitride (Mg—AlGaN) layer are grown in separate chambers by a cluster tool to avoid indium and magnesium cross contamination. Doping of group III-nitrides by hydride vapor phase epitaxy using group III-metal eutectics is also described. In one embodiment, a source is provided for HVPE deposition of a p-type or an n-type group III-nitride epitaxial film, the source including a liquid phase mechanical (eutectic) mixture with a group III species. In one embodiment, a method is provided for performing HVPE deposition of a p-type or an n-type group III-nitride epitaxial film, the method including using a liquid phase mechanical (eutectic) mixture with a group III species.

    摘要翻译： 量子阱结构的一个实施例包括有源区，包括有源层，其包括量子阱和阻挡层，其中一些或全部有源层是p型掺杂的。 通过将PN结的位置定位在器件的有源区域中，P型掺杂部分或全部有源层提高了III-V族化合物半导体发光二极管的量子效率，从而能够在主动区域内发生主要的辐射复合 。 在一个实施例中，量子阱结构在具有共晶源合金的氢化物气相外延（HVPE）沉积室的簇工具中制造。 在一个实施例中，氮化铟镓（InGaN）层和掺杂镁的氮化镓（Mg-GaN）或镁掺杂的氮化铝镓（Mg-AlGaN）层通过簇工具在分开的室中生长以避免铟和镁的交叉 污染。 还描述了使用III族金属共晶体通过氢化物气相外延掺杂的III族氮化物。 在一个实施例中，提供了用于HVPE沉积p型或n型III族氮化物外延膜的源，该源包括具有III族的液相机械（共晶）混合物。 在一个实施例中，提供了一种用于执行p型或n型III族氮化物外延膜的HVPE沉积的方法，该方法包括使用具有III族物质的液相机械（共晶）混合物。

    METHOD OF FORMING LED STRUCTURES
    3.
    发明申请
    METHOD OF FORMING LED STRUCTURES 审中-公开
    形成LED结构的方法

    公开(公告)号：US20110027973A1

    公开(公告)日：2011-02-03

    申请号：US12842883

    申请日：2010-07-23

    申请人： Jie Su ,  Olga Kryliouk

    发明人： Jie Su ,  Olga Kryliouk

    IPC分类号： H01L21/20

    CPC分类号： C23C16/54 ,  C23C16/481 ,  H01L21/0237 ,  H01L21/02455 ,  H01L21/02538 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/04

    摘要： One embodiment of fabricating a p-down light emitting diode (LED) structure comprises depositing a high crystal quality p type contact layer, depositing an active region on top of the p type contact layer, and depositing an n type contact layer on top of the active region using a hydride vapor phase epitaxy (HVPE) process. The high crystal quality p type contact layer is deposited at high temperature to ensure the high crystal quality of the p type film. The n type contact layer is formed on top of the active region in a HVPE chamber at a low temperature to prevent thermal damage to the quantum wells in the active region below the n type contact layer. The processing chamber used to form the p type contact layer is a separate processing chamber than the processing chamber used to form the n type contact layer.

    摘要翻译： 制造p-down发光二极管（LED）结构的一个实施例包括沉积高质量p型接触层，在p型接触层的顶部上沉积有源区，以及在n型接触层的顶部沉积n型接触层 活性区域使用氢化物​​气相外延（HVPE）工艺。 高品质p型接触层在高温下沉积以确保p型膜的高晶体质量。 n型接触层在HVPE室中的有源区域的顶部形成在低温下，以防止在n型接触层下面的有源区域中的量子阱的热损伤。 用于形成p型接触层的处理室是与用于形成n型接触层的处理室不同的处理室。

    METHOD OF FORMING IN-SITU PRE-GaN DEPOSITION LAYER IN HVPE
    4.
    发明申请
    METHOD OF FORMING IN-SITU PRE-GaN DEPOSITION LAYER IN HVPE 审中-公开
    在HVPE中形成原位前置GaN沉积层的方法

    公开(公告)号：US20100279020A1

    公开(公告)日：2010-11-04

    申请号：US12770306

    申请日：2010-04-29

    申请人： Yuriy Melnik ,  Hidehiro Kojiri ,  Olga Kryliouk ,  Tetsuya Ishikawa

    发明人： Yuriy Melnik ,  Hidehiro Kojiri ,  Olga Kryliouk ,  Tetsuya Ishikawa

    IPC分类号： B05D1/36

    CPC分类号： C23C16/4488 ,  C23C16/303 ,  C23C16/45523 ,  C30B25/02 ,  C30B29/403

    摘要： A method and apparatus is provided for preparing a substrate for forming electronic devices incorporating III/V compound semiconductors. Elemental halogen gases, hydrogen halide gases, or other halogen or halide gases, are contacted with liquid or solid group III metals to form precursors which are reacted with nitrogen sources to deposit a nitride buffer layer on the substrate. The buffer layer, which may be a transition layer, may incorporate more than one group III metal, and may be deposited with amorphous or crystalline morphology. An amorphous layer may be partially or fully recrystallized by thermal treatment. Instead of a layer, a plurality of discrete nucleation sites may be formed, whose size, density, and distribution may be controlled. The nitrogen source may include reactive nitrogen compounds as well as active nitrogen from a remote plasma source. The composition of the buffer or transition layer may also vary with depth according to a desired profile.

    摘要翻译： 提供了一种用于制备用于形成结合III / V化合物半导体的电子器件的衬底的方法和装置。 元素卤素气体，卤化氢气体或其它卤素或卤化物气体与液体或固体III族金属接触以形成与氮源反应以在衬底上沉积氮化物缓冲层的前体。 可以是过渡层的缓冲层可以结合多于一个III族金属，并且可以以无定形或结晶形态沉积。 非晶层可以通过热处理部分或完全重结晶。 代替层，可以形成多个离散的成核位点，其尺寸，密度和分布可以被控制。 氮源可以包括反应性氮化合物以及来自远程等离子体源的活性氮。 缓冲层或过渡层的组成也可根据所需的轮廓随深度而变化。

    GROUP III-NITRIDES ON SI SUBSTRATES USING A NANOSTRUCTURED INTERLAYER
    5.
    发明申请
    GROUP III-NITRIDES ON SI SUBSTRATES USING A NANOSTRUCTURED INTERLAYER 有权
    使用NANOSTRUCTURED INTERLAYER的SI基板上的III类氮化物

    公开(公告)号：US20100029064A1

    公开(公告)日：2010-02-04

    申请号：US12257567

    申请日：2008-10-24

    申请人： Olga Kryliouk ,  Hyun Jong Park ,  Timothy J. Anderson

    发明人： Olga Kryliouk ,  Hyun Jong Park ,  Timothy J. Anderson

    IPC分类号： H01L21/20

    CPC分类号： H01L21/02658 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262

    摘要： A layered group III-nitride article includes a single crystal silicon substrate, and a highly textured group III-nitride layer, such as GaN, disposed on the silicon substrate. The highly textured group III-nitride layer is crack free and has a thickness of at least 10 μm. A method for forming highly textured group III-nitride layers includes the steps of providing a single crystal silicon comprising substrate, depositing a nanostructured InxGa1-xN (1≧x≧0) interlayer on the silicon substrate, and depositing a highly textured group III-nitride layer on the interlayer. The interlayer has a nano indentation hardness that is less than both the silicon substrate and the highly textured group III-nitride layer.

    摘要翻译： 层状III族氮化物制品包括设置在硅衬底上的单晶硅衬底和高度纹理化的III族氮化物层，例如GaN。 高度纹理化的III族氮化物层是无裂纹的，并且具有至少10um的厚度。 用于形成高度纹理化的III族氮化物层的方法包括以下步骤：提供包含衬底的单晶硅，在硅衬底上沉积纳米结构的In x Ga 1-x N（1 = x> = 0）中间层，以及沉积高度纹理化的组 中间层上的III族氮化物层。 中间层具有小于硅衬底和高度纹理化的III族氮化物层的纳米压痕硬度。

    Crack free multilayered devices, methods of manufacture thereof and articles comprising the same
    8.
    发明授权
    Crack free multilayered devices, methods of manufacture thereof and articles comprising the same 有权
    无裂纹多层器件及其制造方法及其制品

    公开(公告)号：US08222057B2

    公开(公告)日：2012-07-17

    申请号：US12861614

    申请日：2010-08-23

    申请人： Olga Kryliouk ,  Timothy J. Anderson

    发明人： Olga Kryliouk ,  Timothy J. Anderson

    IPC分类号： H01L21/00

    CPC分类号： H01L21/0262 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/02658

    摘要： Disclosed herein is an article comprising a substrate; an interlayer comprising aluminum nitride, gallium nitride, boron nitride, indium nitride or a solid solution of aluminum nitride, gallium nitride, boron nitride and/or indium nitride; the interlayer being directly disposed upon the substrate and in contact with the substrate; where the interlayer comprises a columnar film and/or nanorods and/or nanotubes; and a group-III nitride layer disposed upon the interlayer; where the group-III nitride layer completely covers a surface of the interlayer that is opposed to a surface in contact with the substrate; the group-III nitride layer being free from cracks.

    摘要翻译： 本文公开了包含基材的制品; 包括氮化铝，氮化镓，氮化硼，氮化铟或氮化铝，氮化镓，氮化硼和/或氮化铟的固溶体的中间层; 所述中间层直接设置在所述基板上并与所述基板接触; 其中中间层包括柱状膜和/或纳米棒和/或纳米管; 和设置在中间层上的III族氮化物层; 其中III族氮化物层完全覆盖与衬底接触的表面相对的中间层的表面; III族氮化物层没有裂纹。