公开(公告)号：US09466739B1

公开(公告)日：2016-10-11

申请号：US14213691

申请日：2014-03-14

申请人： Steven R. J. Brueck ,  Sanjay Krishna ,  Seung-Chang Lee

发明人： Steven R. J. Brueck ,  Sanjay Krishna ,  Seung-Chang Lee

IPC分类号： H01L31/0232 ,  H01L31/18 ,  H01L31/0352

CPC分类号： H01L31/02327 ,  H01L31/035236 ,  H01L31/09

摘要： The present disclosure relates to an electromagnetic energy detector. The detector can include a substrate having a first refractive index; a metal layer; an absorber layer having a second refractive index and disposed between the substrate and the metal layer; a coupling structure to convert incident radiation to a surface plasma wave; additional conducting layers to provide for electrical contact to the electromagnetic energy detector, each conducting layer characterized by a conductivity and a refractive index; and a surface plasma wave (“SPW”) mode-confining layer having a third refractive index that is higher than the second refractive index disposed between the substrate and the metal layer.

摘要翻译： 本公开涉及电磁能量检测器。 检测器可以包括具有第一折射率的基板; 金属层; 具有第二折射率并设置在所述基板和所述金属层之间的吸收体层; 将入射辐射转换成表面等离子体波的耦合结构; 附加导电层以提供与电磁能量检测器的电接触，每个导电层的特征在于导电性和折射率; 以及具有比设置在基板和金属层之间的第二折射率高的第三折射率的表面等离子体波（“SPW”）模式限制层。

公开(公告)号：US08557622B2

公开(公告)日：2013-10-15

申请号：US13223580

申请日：2011-09-01

申请人： Seung Chang Lee ,  Steven R. J. Brueck

发明人： Seung Chang Lee ,  Steven R. J. Brueck

IPC分类号： H01L21/00 ,  H01L21/20 ,  H01L21/36 ,  H01L29/06 ,  H01L31/00

CPC分类号： H01L21/02603 ,  B82Y10/00 ,  B82Y40/00 ,  B82Y99/00 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02507 ,  H01L21/02521 ,  H01L21/02639 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/127 ,  H01L29/158 ,  H01L29/7783 ,  H01L29/7853 ,  H01L33/06 ,  H01L33/18 ,  H01S5/32 ,  Y10S977/951 ,  Y10S977/962

摘要： Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

摘要翻译： 示例性实施例提供用于其形成的半导体纳米线和纳米线器件/应用和方法。 在实施例中，平面内纳米线可以在图案化衬底上外延生长，其比用于器件处理和三维（3D）集成电路的垂直纳米线更有利。 在实施方案中，可以通过使用最初在一维（1D）纳米尺度开口中生长的外延层的横向过生长和刻面的选择性外延来形成平面内纳米线。 在实施例中，可以在纳米线，衬底和附加电气或光学部件之间建立和控制光学，电气和热连接，以获得更好的器件和系统性能。

公开(公告)号：US08030108B1

公开(公告)日：2011-10-04

申请号：US12492265

申请日：2009-06-26

申请人： Seung Chang Lee ,  Steven R. J. Brueck

发明人： Seung Chang Lee ,  Steven R. J. Brueck

IPC分类号： H01L21/00

CPC分类号： H01L21/02603 ,  B82Y10/00 ,  B82Y40/00 ,  B82Y99/00 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02507 ,  H01L21/02521 ,  H01L21/02639 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/127 ,  H01L29/158 ,  H01L29/7783 ,  H01L29/7853 ,  H01L33/06 ,  H01L33/18 ,  H01S5/32 ,  Y10S977/951 ,  Y10S977/962

摘要： Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

摘要翻译： 示例性实施例提供用于其形成的半导体纳米线和纳米线器件/应用和方法。 在实施例中，平面内纳米线可以在图案化衬底上外延生长，其比用于器件处理和三维（3D）集成电路的垂直纳米线更有利。 在实施方案中，可以通过使用最初在一维（1D）纳米尺度开口中生长的外延层的横向过生长和刻面的选择性外延来形成平面内纳米线。 在实施例中，可以在纳米线，衬底和附加电气或光学部件之间建立和控制光学，电气和热连接，以获得更好的器件和系统性能。

公开(公告)号：US5500389A

公开(公告)日：1996-03-19

申请号：US342031

申请日：1994-11-17

申请人： Seung-Chang Lee ,  Sun-Jin Yun ,  Bo-Woo Kim ,  Sang-Won Kang

发明人： Seung-Chang Lee ,  Sun-Jin Yun ,  Bo-Woo Kim ,  Sang-Won Kang

IPC分类号： B82Y10/00 ,  B82Y40/00 ,  H01L21/20 ,  H01L21/203

CPC分类号： H01L33/025 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02639 ,  H01L33/002 ,  Y10S438/938

摘要： A process for formation of a hetero junction structured film utilizing V grooves is disclosed. A monocrystalline film 1 is etched into V grooves, and thereupon, a hetero film 2 having misfits is grown, so that dislocations would be intensively distributed within the V grooves. Then, an oxide layer 3 is formed thereupon, and then, the portions of the oxide layer 3 and the hereto film 2 corresponding to the V grooves are removed by carrying out an etching. Then, the residue oxide layer is removed, thereby forming a non-stress non-dislocation hetero junction structure. Further, the following steps can be added. That is, on the above structure, a thin oxide layer 3 is deposited by carrying out a thermal oxidation or a chemical deposition, and then, a polycrystalline silicon film 4 is deposited. Then the surface irregularities are smoothened by carrying out a selective grinding. Or the following steps may be added. That is, the V groove portions of the hetero film 2 and the monocrystalline film 1 are filled with a monocrystalline film, and the residue oxide layer 3 is removed. Thus a hetero junction film can be grown in which the stress effect is minimized, and the dislocation concentration is made to be extremely low.

摘要翻译： 公开了一种利用V沟形成异质结结构薄膜的方法。 将单晶膜1蚀刻成V槽，随后生长出错位的异质膜2，使位错集中分布在V槽内。 然后，在其上形成氧化物层3，然后通过进行蚀刻来去除与V槽对应的氧化物层3和本膜2的部分。 然后，除去残留氧化物层，从而形成非应力非位错异质结结构。 此外，可以添加以下步骤。 也就是说，在上述结构中，通过进行热氧化或化学沉积来沉积薄的氧化物层3，然后沉积多晶硅膜4。 然后通过进行选择性研磨使表面凹凸平滑。 或者可以添加以下步骤。 也就是说，异质膜2和单晶膜1的V槽部分填充有单晶膜，并且去除残余氧化物层3。 因此，可以生长应力效应最小化的异质结膜，并使位错浓度极低。

公开(公告)号：US10283667B1

公开(公告)日：2019-05-07

申请号：US15257348

申请日：2016-09-06

申请人： Steven R. J. Brueck ,  Sanjay Krishna ,  Seung-Chang Lee

发明人： Steven R. J. Brueck ,  Sanjay Krishna ,  Seung-Chang Lee

IPC分类号： G02B5/00 ,  G02B6/122 ,  H01L31/109 ,  H01L31/0236 ,  H01L31/0232 ,  H01L31/18 ,  H01L31/0304 ,  H01L31/0352 ,  H01L31/0224 ,  H01L31/105 ,  H01L31/0336

摘要： The present disclosure relates to an electromagnetic energy detector. The detector can include a substrate having a first refractive index; a metal layer; an absorber layer having a second refractive index and disposed between the substrate and the metal layer; a coupling structure to convert incident radiation to a surface plasma wave; additional conducting layers to provide for electrical contact to the electromagnetic energy detector, each conducting layer characterized by a conductivity and a refractive index; and a surface plasma wave (“SPW”) mode-confining layer having a third refractive index that is higher than the second refractive index disposed between the substrate and the metal layer.

公开(公告)号：US09685324B2

公开(公告)日：2017-06-20

申请号：US14610254

申请日：2015-01-30

申请人： Seung-Chang Lee ,  Steven R. J. Brueck

发明人： Seung-Chang Lee ,  Steven R. J. Brueck

IPC分类号： H01L21/20 ,  H01L21/02 ,  C30B25/04 ,  C30B25/18 ,  C30B29/40 ,  C30B23/02 ,  C30B29/42 ,  H01L29/06 ,  H01L29/267 ,  C30B7/00

CPC分类号： H01L21/02513 ,  C30B7/005 ,  C30B23/025 ,  C30B25/04 ,  C30B25/18 ,  C30B25/183 ,  C30B29/40 ,  C30B29/42 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02538 ,  H01L21/02546 ,  H01L21/02636 ,  H01L21/02642 ,  H01L21/02647 ,  H01L29/0665 ,  H01L29/0688 ,  H01L29/267

摘要： Exemplary embodiments provide materials and methods of forming high-quality semiconductor devices using lattice-mismatched materials. In one embodiment, a composite film including one or more substantially-single-particle-thick nanoparticle layers can be deposited over a substrate as a nanoscale selective growth mask for epitaxially growing lattice-mismatched materials over the substrate.

公开(公告)号：US09461112B1

公开(公告)日：2016-10-04

申请号：US14826925

申请日：2015-08-14

申请人： Seung-Chang Lee ,  Steven R. J. Brueck

发明人： Seung-Chang Lee ,  Steven R. J. Brueck

IPC分类号： H01L29/16 ,  H01L29/06 ,  H01L29/04 ,  H01L29/20

CPC分类号： C30B25/04 ,  C30B25/18 ,  C30B25/186 ,  C30B29/406 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/02639 ,  H01L21/02647 ,  H01L27/1222 ,  H01L29/045 ,  H01L29/06 ,  H01L29/0657 ,  H01L29/16 ,  H01L29/2003

摘要： A method of epitaxially growing nitrogen-based compound semiconductor thin films on a semiconductor substrate, which is periodically patterned with grooves. The method can provide an epitaxial growth of a first crystalline phase epitaxial film on the substrate, and block the growth of an initial crystalline phase with barrier materials prepared at the sides of the grooves. Semiconductor devices employing the epitaxial films are also disclosed.

公开(公告)号：US09257535B2

公开(公告)日：2016-02-09

申请号：US14725719

申请日：2015-05-29

申请人： Seung-Chang Lee ,  Steven Brueck ,  Daniel Feezell

发明人： Seung-Chang Lee ,  Steven Brueck ,  Daniel Feezell

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/16 ,  H01L29/20 ,  H01L21/02 ,  B82Y10/00

CPC分类号： H01L29/66742 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/02241 ,  H01L21/02603 ,  H01L21/30612 ,  H01L21/30635 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/7841 ,  H01L29/78696

摘要： A method and structure for a semiconductor transistor, including various embodiments. In embodiments, a transistor channel can be formed between a semiconductor source and a semiconductor drain, wherein a transistor gate oxide completely surrounds the transistor channel and a transistor gate metal that completely surrounds the transistor gate oxide. Related fabrication processes are presented for similar device embodiments based on a Group III-V semiconductor material and silicon-on-insulator materials.

公开(公告)号：US08980730B1

公开(公告)日：2015-03-17

申请号：US13232629

申请日：2011-09-14

申请人： Seung-Chang Lee ,  Steven R. J. Brueck

发明人： Seung-Chang Lee ,  Steven R. J. Brueck

IPC分类号： H01L21/20

CPC分类号： H01L21/02513 ,  C30B7/005 ,  C30B23/025 ,  C30B25/04 ,  C30B25/18 ,  C30B25/183 ,  C30B29/40 ,  C30B29/42 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02455 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02538 ,  H01L21/02546 ,  H01L21/02636 ,  H01L21/02642 ,  H01L21/02647 ,  H01L29/0665 ,  H01L29/0688 ,  H01L29/267

摘要： Exemplary embodiments provide materials and methods of forming high-quality semiconductor devices using lattice-mismatched materials. In one embodiment, a composite film including one or more substantially-single-particle-thick nanoparticle layers can be deposited over a substrate as a nanoscale selective growth mask for epitaxially growing lattice-mismatched materials over the substrate.

摘要翻译： 示例性实施例提供了使用晶格失配材料形成高质量半导体器件的材料和方法。 在一个实施方案中，包含一个或多个基本上单个颗粒的纳米颗粒层的复合膜可以沉积在衬底上作为纳米级选择性生长掩模，用于在衬底上外延生长晶格失配的材料。

公开(公告)号：US08835851B2

公开(公告)日：2014-09-16

申请号：US13502987

申请日：2010-10-21

申请人： Seung-Chang Lee ,  Sanjay Krishna ,  Steven Brueck

发明人： Seung-Chang Lee ,  Sanjay Krishna ,  Steven Brueck

IPC分类号： H01L27/14 ,  H01L31/0304 ,  B82Y20/00 ,  H01L27/144 ,  H01L31/103 ,  H01L31/0352 ,  G02B6/122 ,  G01J5/08

CPC分类号： H01L31/035236 ,  B82Y20/00 ,  G01J5/0853 ,  G02B6/1226 ,  H01L27/1446 ,  H01L31/03046 ,  H01L31/1035 ,  Y02E10/544 ,  Y02P70/521

摘要： A plasmonic detector is described which can resonantly enhance the performance of infrared detectors. More specifically, the disclosure is directed to enhancing the quantum efficiency of semiconductor infrared detectors by increasing coupling to the incident radiation field as a result of resonant coupling to surface plasma waves supported by the metal/semiconductor interface, without impacting the dark current of the device, resulting in an improved detectivity over the surface plasma wave spectral bandwidth.

摘要翻译： 描述了可以共振地增强红外检测器的性能的等离子体激元检测器。 更具体地，本公开涉及通过增加与入射辐射场的耦合来提高半导体红外检测器的量子效率，这是由于与由金属/半导体界面支撑的表面等离子体波的谐振耦合而不影响器件的暗电流 ，导致比表面等离子体波谱带宽更好的检测性。