公开(公告)号：US20140235017A1

公开(公告)日：2014-08-21

申请号：US14263385

申请日：2014-04-28

申请人： Tae-Joo HWANG ,  Tae-Gyeong CHUNG ,  Eun-Chul AHN

发明人： Tae-Joo HWANG ,  Tae-Gyeong CHUNG ,  Eun-Chul AHN

IPC分类号： H01L23/00

CPC分类号： H01L23/49811 ,  H01L23/481 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/31 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed on the second package substrate, wherein a first conductive terminal is disposed on a first surface of the semiconductor chip and a second conductive terminal is disposed on a first surface of the second package substrate, the first conductive terminal disposed on the second conductive terminal.

摘要翻译： 半导体封装包括第一封装衬底，设置在第一封装衬底上的第一半导体芯片，包括第一通孔通孔的半导体芯片和设置在第一半导体芯片上的芯片封装，芯片封装包括第二封装衬底和 设置在所述第二封装基板上的第二半导体芯片，其中，第一导电端子设置在所述半导体芯片的第一表面上，并且第二导电端子设置在所述第二封装基板的第一表面上，所述第一导电端子设置在所述第二封装基板的第二表面上 导电端子。

公开(公告)号：US20120326307A1

公开(公告)日：2012-12-27

申请号：US13534792

申请日：2012-06-27

申请人： Se-young JEONG ,  Sang-sick PARK ,  Tae-gyeong CHUNG ,  Tae-je CHO

发明人： Se-young JEONG ,  Sang-sick PARK ,  Tae-gyeong CHUNG ,  Tae-je CHO

IPC分类号： H01L23/538 ,  H01L25/07

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/03002 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0362 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05558 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/06155 ,  H01L2224/24145 ,  H01L2224/24146 ,  H01L2224/24226 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2224/03 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A stacked semiconductor device including a plurality of semiconductor chips stacked vertically, a plurality of scribe lane elements each forming a step with a semiconductor chip of the plurality of semiconductor chips and respectively formed on a side surface of each of the plurality of semiconductor chips, a redistribution element respectively formed on each of the plurality of semiconductor chips and the scribe lane elements, and a signal connection member formed on the side surface of each of the plurality of semiconductor chips and electrically connecting the redistribution elements.

摘要翻译： 包括垂直堆叠的多个半导体芯片的堆叠半导体器件，分别形成有多个半导体芯片的半导体芯片并且分别形成在所述多个半导体芯片中的每一个的侧表面上的步骤的多个划线通道元件， 分别形成在所述多个半导体芯片和划线路元件中的每一个上的再分配元件，以及形成在所述多个半导体芯片中的每一个的侧表面上并电连接所述再分配元件的信号连接元件。

公开(公告)号：US20110294260A1

公开(公告)日：2011-12-01

申请号：US13137260

申请日：2011-08-02

申请人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

发明人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

IPC分类号： H01L21/58

CPC分类号： H01L23/481 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments relate to semiconductor packages and methods of forming the same. A semiconductor package according to example embodiments may include a printed circuit board (PCB), a first semiconductor chip mounted on the PCB, and a chip package mounted on the first semiconductor chip. The chip package may be in direct contact with the first semiconductor chip.

公开(公告)号：US20100327439A1

公开(公告)日：2010-12-30

申请号：US12875551

申请日：2010-09-03

申请人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

发明人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

IPC分类号： H01L23/485 ,  H01L23/48

CPC分类号： H01L23/49811 ,  H01L23/481 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/31 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed on the second package substrate, wherein a first conductive terminal is disposed on a first surface of the semiconductor chip and a second conductive terminal is disposed on a first surface of the second package substrate, the first conductive terminal disposed on the second conductive terminal.

摘要翻译： 半导体封装包括第一封装衬底，设置在第一封装衬底上的第一半导体芯片，包括第一通孔通孔的半导体芯片和设置在第一半导体芯片上的芯片封装，芯片封装包括第二封装衬底和 设置在所述第二封装基板上的第二半导体芯片，其中，第一导电端子设置在所述半导体芯片的第一表面上，并且第二导电端子设置在所述第二封装基板的第一表面上，所述第一导电端子设置在所述第二封装基板的第二表面上 导电端子。

公开(公告)号：US20090278561A1

公开(公告)日：2009-11-12

申请号：US12330146

申请日：2008-12-08

申请人： Cha-jea Jo ,  Tae-gyeong Chung ,  Hoon-jung Kim ,  Nam-seog Kim ,  Chang-seong Jeon

发明人： Cha-jea Jo ,  Tae-gyeong Chung ,  Hoon-jung Kim ,  Nam-seog Kim ,  Chang-seong Jeon

IPC分类号： G01R1/073

CPC分类号： G01R31/2889 ,  G01R1/06716 ,  G01R1/06733

摘要： The probe card is comprised of a probe card wafer, a plurality of through via electrodes penetrating the probe card wafer; and a plurality of redistributed wiring probe needle structures, each being connected to the through via electrodes protruding from a surface of the probe card wafer.

摘要翻译： 探针卡由探针卡晶片，穿过探针卡晶片的多个通孔电极组成; 以及多个重新分布的布线探针针结构，每个连接到从探针卡晶片的表面突出的通孔电极。

公开(公告)号：US20080277800A1

公开(公告)日：2008-11-13

申请号：US12149741

申请日：2008-05-07

申请人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

发明人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

IPC分类号： H01L23/538 ,  H01L21/60

CPC分类号： H01L23/481 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Example embodiments relate to semiconductor packages and methods of forming the same. A semiconductor package according to example embodiments may include a printed circuit board (PCB), a first semiconductor chip mounted on the PCB, and a chip package mounted on the first semiconductor chip. The chip package may be in direct contact with the first semiconductor chip.

摘要翻译： 示例性实施例涉及半导体封装及其形成方法。 根据示例实施例的半导体封装可以包括印刷电路板（PCB），安装在PCB上的第一半导体芯片和安装在第一半导体芯片上的芯片封装。 芯片封装可以与第一半导体芯片直接接触。

公开(公告)号：US20080122084A1

公开(公告)日：2008-05-29

申请号：US11946750

申请日：2007-11-28

申请人： Tae-Joo HWANG ,  Eun-Chul AHN ,  Tae-Gyeong CHUNG

发明人： Tae-Joo HWANG ,  Eun-Chul AHN ,  Tae-Gyeong CHUNG

IPC分类号： H01L23/48 ,  H01L21/58

CPC分类号： H01L24/90 ,  H01L23/3171 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A flip-chip assembly comprises a semiconductor chip, a substrate, a first buffer layer, a second buffer layer and a conductive bump. The semiconductor chip includes a first region and a second region adjacent to the first region. The substrate is disposed under the semiconductor chip. The first buffer layer is disposed between the first region of the semiconductor chip and the substrate. The second buffer layer is disposed between the second region of the semiconductor chip and the substrate. The conductive bump is formed through the second buffer layer and electrically connects the semiconductor chip to the substrate.

摘要翻译： 倒装芯片组件包括半导体芯片，衬底，第一缓冲层，第二缓冲层和导电凸块。 半导体芯片包括与第一区域相邻的第一区域和第二区域。 衬底设置在半导体芯片下方。 第一缓冲层设置在半导体芯片的第一区域和基板之间。 第二缓冲层设置在半导体芯片的第二区域和基板之间。 导电凸块通过第二缓冲层形成并将半导体芯片电连接到基板。

公开(公告)号：US06943438B2

公开(公告)日：2005-09-13

申请号：US10355448

申请日：2003-01-31

申请人： Min-Young Son ,  Se-Yong Oh ,  Tae-Gyeong Chung

发明人： Min-Young Son ,  Se-Yong Oh ,  Tae-Gyeong Chung

IPC分类号： H01L23/50 ,  G06K19/077 ,  H01L23/538 ,  H01L25/065 ,  H01L25/18 ,  H01L23/28

CPC分类号： G06K19/072 ,  G06K19/07745 ,  H01L23/5388 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a memory card comprises a card substrate, at least one memory chip attached to the card substrate, a control chip mounted on the memory chip, bonding wires electrically connecting the chips with the card substrate, a passive device attached to the card substrate near the memory chip, and a molded body encapsulating the memory chip, the control chip, the bonding wires and the passive device. In addition, the memory card comprises an adhesive spacer interposed between the same-sized chips to secure a wire loop of the bonding wires.

摘要翻译： 在一个实施例中，存储卡包括卡片基板，附着到卡片基板的至少一个存储器芯片，安装在存储器芯片上的控制芯片，将芯片与卡片基板电连接的接合线，连接到卡片的无源器件 存储芯片附近的衬底，以及封装存储芯片，控制芯片，接合线和无源器件的成型体。 此外，存储卡包括插入在相同尺寸的芯片之间的粘合隔离物，以固定接合线的线环。

公开(公告)号：US06340838B1

公开(公告)日：2002-01-22

申请号：US09241655

申请日：1999-02-02

申请人： Tae Gyeong Chung ,  Nam Seog Kim

发明人： Tae Gyeong Chung ,  Nam Seog Kim

IPC分类号： G01R3102

CPC分类号： H01R4/5066 ,  G01R1/0483 ,  H01L2224/73253 ,  H01R13/22

摘要： An apparatus for identifying a known good die according to an embodiment of the present invention includes a carrier for containing a bare semiconductor chip, a lid for covering the carrier, and a stopper for sealing the apparatus. The carrier includes: a body, in which a chip mount cavity and multiple vacuum suction holes are formed; inner connection terminals formed on a bottom surface of the chip mount cavity to communicate electrically with the bare chip; and outer connection terminals extending from the inner connection terminals to outside the body. The apparatus has an outer configuration of a conventional semiconductor package, so that the apparatus can fit into conventional test equipment. Therefore, the carrier can have a configuration of a plastic package, such as the SOP or SOJ, without a semiconductor chip. Accordingly, the apparatus according to the present invention can use conventional handling and burn-in test equipment in identifying of known good dies and thereby reduce production cost of the known good dies.

摘要翻译： 根据本发明的实施例的用于识别已知的良好裸片的装置包括用于容纳裸半导体芯片的载体，用于覆盖载体的盖和用于密封该装置的止动件。 载体包括：其中形成有芯片安装腔和多个真空吸孔的主体; 内部连接端子形成在芯片安装腔的底表面上以与裸芯片电气连通; 以及从内部连接端子延伸到主体外部的外部连接端子。 该装置具有常规半导体封装的外部结构，使得该装置可以装配到常规的测试设备中。 因此，载体可以具有没有半导体芯片的诸如SOP或SOJ的塑料封装的构造。 因此，根据本发明的装置可以使用常规的处理和老化测试设备来识别已知的良好模具，从而降低已知的良好模具的生产成本。

公开(公告)号：US09685400B2

公开(公告)日：2017-06-20

申请号：US15010826

申请日：2016-01-29

申请人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

发明人： Tae-Joo Hwang ,  Tae-Gyeong Chung ,  Eun-Chul Ahn

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L25/03 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L25/18

CPC分类号： H01L23/49811 ,  H01L23/481 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/31 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed on the second package substrate, wherein a first conductive terminal is disposed on a first surface of the semiconductor chip and a second conductive terminal is disposed on a first surface of the second package substrate, the first conductive terminal disposed on the second conductive terminal.