公开(公告)号：US09412613B2

公开(公告)日：2016-08-09

申请号：US14574928

申请日：2014-12-18

Applicant: Applied Materials, Inc.

Inventor： Pramit Manna ,  Abhijit Basu Mallick ,  Ludovic Godet ,  Yongmei Chen ,  Jun Xue ,  Mukund Srinivasan ,  Ellie Y. Yieh ,  Srinivas D. Nemani

IPC: H01L21/308 ,  H01L21/311 ,  H01L21/3115

CPC classification number: H01L21/3086 ,  H01L21/31144 ,  H01L21/31155

Abstract: Embodiments described herein provide for a method of forming an etch selective hardmask. An amorphous carbon hardmask is implanted with various dopants to increase the hardness and density of the hardmask. The ion implantation of the amorphous carbon hardmask also maintains or reduces the internal stress of the hardmask. The etch selective hardmask generally provides for improved patterning in advanced NAND and DRAM devices.

Abstract translation: 本文描述的实施例提供了形成蚀刻选择性硬掩模的方法。 非晶碳硬掩模被植入各种掺杂剂以增加硬掩模的硬度和密度。 无定形碳硬掩模的离子注入还保持或减少硬掩模的内部应力。 蚀刻选择性硬掩模通常提供高级NAND和DRAM器件中的改进的图案化。

公开(公告)号：US10276369B2

公开(公告)日：2019-04-30

申请号：US15831342

申请日：2017-12-04

Applicant: APPLIED MATERIALS, INC.

Inventor： Jun Xue ,  Ludovic Godet ,  Martin A. Hilkene ,  Matthew D. Scotney-Castle

IPC: H01J37/32 ,  H01L21/02 ,  C23C14/04 ,  H01L21/033 ,  H01L21/67

Abstract: Ion species are supplied to a workpiece comprising a pattern layer over a substrate. A material layer is deposited on the pattern layer using an implantation process of the ion species. In one embodiment, the deposited material layer has an etch selectivity to the pattern layer. In one embodiment, a trench is formed on the pattern layer. The trench comprises a bottom and a sidewall. The material layer is deposited into the trench using the ion implantation process. The material layer is deposited on the bottom of the trench in a direction along the sidewall.

公开(公告)号：US09865464B2

公开(公告)日：2018-01-09

申请号：US15348170

申请日：2016-11-10

Applicant: Applied Materials, Inc.

Inventor： Yongmei Chen ,  Christopher S. Ngai ,  Jingjing Liu ,  Jun Xue ,  Chentsau Ying ,  Ludovic Godet

IPC: H01L21/033 ,  H01L29/49 ,  H01L27/115 ,  H01L27/11556 ,  H01L27/11582 ,  H01L29/51 ,  H01L21/02 ,  H01L21/311 ,  C23C16/27 ,  H01L27/11524 ,  H01L27/1157

CPC classification number: H01L21/0332 ,  C23C16/26 ,  C23C16/27 ,  C23C16/274 ,  C23C16/279 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/31111 ,  H01L21/31122 ,  H01L21/31144 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/49 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/51 ,  H01L29/518

Abstract: A nanocrystalline diamond layer for use in forming a semiconductor device and methods for using the same are disclosed herein. The device can include a substrate with a processing surface and a supporting surface, a device layer formed on the processing surface and a nanocrystalline diamond layer formed on the processing layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm. The method can include positioning a substrate in a process chamber, depositing a device layer on a processing surface, depositing a nanocrystalline diamond layer on the device layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm, patterning and etching the nanocrystalline diamond layer, etching the device layer to form a feature and ashing the nanocrystalline diamond layer from the surface of the device layer.

公开(公告)号：US09502262B2

公开(公告)日：2016-11-22

申请号：US14833858

申请日：2015-08-24

Applicant: Applied Materials, Inc.

Inventor： Yongmei Chen ,  Christopher S. Ngai ,  Jingjing Liu ,  Jun Xue ,  Chentsau Ying ,  Ludovic Godet

IPC: C23C16/27 ,  H01L21/31 ,  H01L21/311 ,  H01L29/49 ,  H01L29/51 ,  H01L21/02 ,  H01L27/115

CPC classification number: H01L21/0332 ,  C23C16/26 ,  C23C16/27 ,  C23C16/274 ,  C23C16/279 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/31111 ,  H01L21/31122 ,  H01L21/31144 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/49 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/51 ,  H01L29/518

Abstract: A nanocrystalline diamond layer for use in forming a semiconductor device and methods for using the same are disclosed herein. The device can include a substrate with a processing surface and a supporting surface, a device layer formed on the processing surface and a nanocrystalline diamond layer formed on the processing layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm. The method can include positioning a substrate in a process chamber, depositing a device layer on a processing surface, depositing a nanocrystalline diamond layer on the device layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm, patterning and etching the nanocrystalline diamond layer, etching the device layer to form a feature and ashing the nanocrystalline diamond layer from the surface of the device layer.

Abstract translation: 本文公开了用于形成半导体器件的纳米晶体金刚石层及其使用方法。 该器件可以包括具有处理表面和支撑表面的衬底，形成在处理表面上的器件层和形成在处理层上的纳米晶体金刚石层，该纳米晶体金刚石层的平均晶粒尺寸在2nm和5nm之间 。 该方法可以包括将衬底定位在处理室中，在处理表面上沉积器件层，在器件层上沉积纳米晶体金刚石层，平均晶粒尺寸在2nm和5nm之间的纳米晶体金刚石层，图案化和 蚀刻纳米晶体金刚石层，蚀刻器件层以形成特征并从器件层的表面灰化纳米晶体金刚石层。

公开(公告)号：US20160181112A1

公开(公告)日：2016-06-23

申请号：US14581332

申请日：2014-12-23

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ching-Mei Hsu ,  Zihui Li ,  Ludovic Godet ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L21/3065 ,  H01L21/265

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01J37/32366 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32954 ,  H01L21/2236 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/311 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/31155 ,  H01L21/32137 ,  H01L21/32155 ,  H01L21/3223

Abstract: A method of anisotropically dry-etching exposed substrate material on a patterned substrate is described. The patterned substrate has a gap formed in a single material made from, for example, a silicon-containing material or a metal-containing material. The method includes directionally ion-implanting the patterned structure to implant the bottom of the gap without implanting substantially the walls of the gap. Subsequently, a remote plasma is formed using a fluorine-containing precursor to etch the patterned substrate such that either (1) the walls are selectively etched relative to the floor of the gap, or (2) the floor is selectively etched relative to the walls of the gap. Without ion implantation, the etch operation would be isotropic owing to the remote nature of the plasma excitation during the etch process.

Abstract translation: 描述了在图案化衬底上各向异性地干蚀刻暴露的衬底材料的方法。 图案化衬底具有由例如含硅材料或含金属材料制成的单一材料形成的间隙。 该方法包括定向离子注入图案化结构以植入间隙的底部，而基本上不插入间隙的壁。 随后，使用含氟前体形成远程等离子体以蚀刻图案化衬底，使得（1）相对于间隙的底板选择性地蚀刻壁，或者（2）相对于壁选择性地蚀刻地板 的差距。 在没有离子注入的情况下，蚀刻操作将是各向同性的，这是由于在蚀刻过程期间等离子体激发的远程特性。

公开(公告)号：US20160079034A1

公开(公告)日：2016-03-17

申请号：US14485505

申请日：2014-09-12

Applicant: Applied Materials Inc.

Inventor： Ellie Y. Yieh ,  Ludovic Godet ,  Jun Xue ,  Srinivas D. Nemani ,  DongQing (Karen) Li ,  Erica Chen

IPC: H01J37/317

CPC classification number: H01L21/26506 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02321 ,  H01L21/02323 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/31155 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66795

Abstract: Species are supplied to a flowable layer over a substrate. A property of the flowable layer is modified by implanting the species to the flowable layer. The property comprises a density, a stress, a film shrinkage, an etch selectivity, or any combination thereof.

Abstract translation: 物质被提供到基底上的可流动层。 可流动层的性质通过将物种注入可流动层来改变。 该性质包括密度，应力，薄膜收缩率，蚀刻选择性或其任何组合。

公开(公告)号：US09777378B2

公开(公告)日：2017-10-03

申请号：US14635589

申请日：2015-03-02

Applicant: Applied Materials, Inc.

Inventor： Srinivas D. Nemani ,  Erica Chen ,  Ludovic Godet ,  Jun Xue ,  Ellie Y. Yieh

IPC: C23C16/56 ,  C23C16/32 ,  C23C14/48 ,  C23C16/40 ,  C23C16/04

CPC classification number: C23C16/56 ,  C23C16/045 ,  C23C16/401

Abstract: Embodiments described herein relate to methods for forming flowable chemical vapor deposition (FCVD) films suitable for high aspect ratio gap fill applications. Various process flows described include ion implantation processes utilized to treat a deposited FCVD film to improve dielectric film density and material composition. Ion implantation processes, curing processes, and annealing processes may be utilized in various sequence combinations to form dielectric films having improved densities at temperatures within the thermal budget of device materials. Improved film quality characteristics include reduced film stress and reduced film shrinkage when compared to conventional FCVD film formation processes.

公开(公告)号：US09595467B2

公开(公告)日：2017-03-14

申请号：US14597149

申请日：2015-01-14

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ludovic Godet ,  Erica Chen ,  Srinivas D. Nemani ,  Ellie Y. Yieh

IPC: H01L21/786 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/768 ,  H01L21/223 ,  H01J37/32 ,  H01L23/522

CPC classification number: H01L21/7682 ,  H01J37/32357 ,  H01J37/32366 ,  H01J37/32412 ,  H01J37/32422 ,  H01L21/2236 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31155 ,  H01L21/768 ,  H01L21/76825 ,  H01L23/5222

Abstract: Methods for forming air gaps in an interconnection structure with desired materials formed on different locations of the interconnection structure using an ion implantation process to define an etching boundary followed by an etching process for semiconductor devices are provided. In one embodiment, a method for forming air gaps in an interconnection structure on a substrate, the method includes implanting ions in a first region of an insulating material disposed on a substrate, leaving a second region without implanted ions, the second region having a first surface interfaced with the first region and a second surface interfaced with the substrate, and performing an etching process to selectively etch the second region away from the substrate, forming an air gap between the first region and the substrate.

Abstract translation: 提供了使用离子注入工艺形成在互连结构的不同位置上形成的所需材料的互连结构中的空气间隙以限定蚀刻边界，然后进行半导体器件的蚀刻工艺的方法。 在一个实施例中，一种用于在衬底上形成互连结构中的气隙的方法，所述方法包括将离子注入设置在衬底上的绝缘材料的第一区域中，留下没有注入离子的第二区域，第二区域具有第一 与第一区域接合的表面和与衬底接合的第二表面，以及执行蚀刻工艺以选择性地蚀刻第二区域远离衬底，在第一区域和衬底之间形成气隙。

公开(公告)号：US09534289B2

公开(公告)日：2017-01-03

申请号：US14657405

申请日：2015-03-13

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ludovic Godet ,  Qiwei Liang

IPC: C23F1/00 ,  C23C16/04 ,  H01J37/32

CPC classification number: C23C16/045 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/32449 ,  H01J37/32633

Abstract: Plasma process chambers employing distribution grids having focusing surfaces thereon enabling angled fluxes to reach a substrate, and associated methods are disclosed. A distribution grid is disposed in a chamber between the plasma and a substrate. The distribution grid includes a first surface facing the substrate and a focusing surface facing the plasma. A passageway extends through the distribution grid, and is sized with a width to prevent the plasma sheath from entering therein. By positioning the focusing surface at an angle other than parallel to the substrate, an ion flux from the plasma may be accelerated across the plasma sheath and particles of the flux pass through the passageway to be incident upon the substrate. In this manner, the angled ion flux may perform thin film deposition and etch processes on sidewalls of features extending orthogonally from or into the substrate, as well as angled implant and surface modification.

Abstract translation: 等离子体处理室采用其上具有聚焦表面的分配网格，其上形成有角度的焊剂以到达衬底，以及相关方法。 配电网布置在等离子体和基板之间的室中。 配电网包括面向衬底的第一表面和面向等离子体的聚焦表面。 通道延伸穿过配电网，并且具有宽度的尺寸以防止等离子体护套进入其中。 通过将聚焦表面定位在与衬底不同的角度处，来自等离子体的离子通量可以跨越等离子体鞘加速，并且助焊剂的颗粒通过通道入射到衬底上。 以这种方式，成角度的离子通量可以在从基底垂直延伸的特征的侧壁上进行薄膜沉积和蚀刻处理，以及成角度的植入物和表面改性。

公开(公告)号：US09502258B2

公开(公告)日：2016-11-22

申请号：US14581332

申请日：2014-12-23

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ching-Mei Hsu ,  Zihui Li ,  Ludovic Godet ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/3065 ,  H01L21/265 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/322

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01J37/32366 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32954 ,  H01L21/2236 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/311 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/31155 ,  H01L21/32137 ,  H01L21/32155 ,  H01L21/3223

Abstract: A method of anisotropically dry-etching exposed substrate material on a patterned substrate is described. The patterned substrate has a gap formed in a single material made from, for example, a silicon-containing material or a metal-containing material. The method includes directionally ion-implanting the patterned structure to implant the bottom of the gap without implanting substantially the walls of the gap. Subsequently, a remote plasma is formed using a fluorine-containing precursor to etch the patterned substrate such that either (1) the walls are selectively etched relative to the floor of the gap, or (2) the floor is selectively etched relative to the walls of the gap. Without ion implantation, the etch operation would be isotropic owing to the remote nature of the plasma excitation during the etch process.

Abstract translation: 描述了在图案化衬底上各向异性地干蚀刻暴露的衬底材料的方法。 图案化衬底具有由例如含硅材料或含金属材料制成的单一材料形成的间隙。 该方法包括定向离子注入图案化结构以植入间隙的底部，而基本上不插入间隙的壁。 随后，使用含氟前体形成远程等离子体以蚀刻图案化衬底，使得（1）相对于间隙的底板选择性地蚀刻壁，或者（2）相对于壁选择性地蚀刻地板 的差距。 在没有离子注入的情况下，蚀刻操作将是各向同性的，这是由于在蚀刻过程期间等离子体激发的远程特性。