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    METHODS OF EMBEDDING THIN-FILM CAPACITORS INTO SEMICONDUCTOR PACKAGES USING TEMPORARY CARRIER LAYERS
    3.
    发明申请
    METHODS OF EMBEDDING THIN-FILM CAPACITORS INTO SEMICONDUCTOR PACKAGES USING TEMPORARY CARRIER LAYERS 有权
    使用临时载波层将薄膜电容器嵌入半导体封装的方法

    公开(公告)号：US20100270644A1

    公开(公告)日：2010-10-28

    申请号：US12763412

    申请日：2010-04-20

    申请人： Lynne E. Dellis ,  Karl Hartmann Dietz ,  David Ross McGregor

    发明人： Lynne E. Dellis ,  Karl Hartmann Dietz ,  David Ross McGregor

    IPC分类号： H01L27/08 ,  H01L21/50

    CPC分类号： H05K1/162 ,  H01L2224/16225 ,  H05K3/025 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/083 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09718 ,  H05K2201/10674 ,  H05K2203/104

    摘要： Disclosed are methods of making a semiconductor package comprising at least one thin-film capacitor embedded into at least one build-up layer of said semiconductor package. A thin-film capacitor is provided wherein the thin-film capacitor has a first electrode and a second electrode separated by a dielectric. A temporary carrier layer is applied to the first electrode and the second electrode is patterned. A PWB core and a build-up material are provided, and the build-up material is placed between the PWB core and the patterned second electrode of said thin-film capacitor. The patterned electrode side of the thin-film capacitor is laminated to the PWB core by way of the build-up material, the temporary carrier layer is removed, and the first electrode is patterned.

    摘要翻译： 公开了制造半导体封装的方法，该半导体封装包括嵌入到所述半导体封装的至少一个堆积层中的至少一个薄膜电容器。 提供了一种薄膜电容器，其中薄膜电容器具有由电介质隔开的第一电极和第二电极。 临时载体层被施加到第一电极并且第二电极被图案化。 提供PWB芯和堆积材料，并且积聚材料被放置在PWB芯和所述薄膜电容器的图案化的第二电极之间。 薄膜电容器的图案化电极侧通过积聚材料层叠到PWB芯上，去除临时载体层，并对第一电极进行图案化。

    Methods of embedding thin-film capacitors into semiconductor packages using temporary carrier layers
    4.
    发明授权
    Methods of embedding thin-film capacitors into semiconductor packages using temporary carrier layers 有权
    使用临时载体层将薄膜电容器嵌入半导体封装的方法

    公开(公告)号：US08409963B2

    公开(公告)日：2013-04-02

    申请号：US12763412

    申请日：2010-04-20

    申请人： Lynne E. Dellis ,  Karl Hartmann Dietz ,  David Ross McGregor

    发明人： Lynne E. Dellis ,  Karl Hartmann Dietz ,  David Ross McGregor

    IPC分类号： H01L51/05 ,  H01L29/92

    CPC分类号： H05K1/162 ,  H01L2224/16225 ,  H05K3/025 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/083 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09718 ,  H05K2201/10674 ,  H05K2203/104

    摘要： Disclosed are methods of making a semiconductor package comprising at least one thin-film capacitor embedded into at least one build-up layer of said semiconductor package. A thin-film capacitor is provided wherein the thin-film capacitor has a first electrode and a second electrode separated by a dielectric. A temporary carrier layer is applied to the first electrode and the second electrode is patterned. A PWB core and a build-up material are provided, and the build-up material is placed between the PWB core and the patterned second electrode of said thin-film capacitor. The patterned electrode side of the thin-film capacitor is laminated to the PWB core by way of the build-up material, the temporary carrier layer is removed, and the first electrode is patterned.

    摘要翻译： 公开了制造半导体封装的方法，该半导体封装包括嵌入到所述半导体封装的至少一个堆积层中的至少一个薄膜电容器。 提供了一种薄膜电容器，其中薄膜电容器具有由电介质隔开的第一电极和第二电极。 临时载体层被施加到第一电极并且第二电极被图案化。 提供PWB芯和堆积材料，并且积聚材料被放置在PWB芯和所述薄膜电容器的图案化的第二电极之间。 薄膜电容器的图案化电极侧通过积聚材料层叠到PWB芯上，去除临时载体层，并对第一电极进行图案化。

    CAPACITIVE/RESISTIVE DEVICES, ORGANIC DIELECTRIC LAMINATES AND PRINTED WIRING BOARDS INCORPORATING SUCH DEVICES, AND METHODS OF MAKING THEREOF
    7.
    发明申请
    CAPACITIVE/RESISTIVE DEVICES, ORGANIC DIELECTRIC LAMINATES AND PRINTED WIRING BOARDS INCORPORATING SUCH DEVICES, AND METHODS OF MAKING THEREOF 有权
    电容/电阻器件，有机电介质层压板和印制这样的器件的布线板及其制造方法

    公开(公告)号：US20080297274A1

    公开(公告)日：2008-12-04

    申请号：US12188271

    申请日：2008-08-08

    申请人： WILLIAM J. BORLAND ,  G. Sidney Cox ,  David Ross McGregor

    发明人： WILLIAM J. BORLAND ,  G. Sidney Cox ,  David Ross McGregor

    IPC分类号： H03H7/00 ,  H01G4/00

    CPC分类号： H05K1/167 ,  H05K1/162 ,  H05K3/429 ,  H05K2201/0154 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09672 ,  H05K2201/09763 ,  H05K2203/0361 ,  H05K2203/1461 ,  Y10T29/435

    摘要： This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode; a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0.

    摘要翻译： 本发明涉及可以嵌入在印刷线路板的层内的电容/电阻装置。 嵌入器件节省了电路板表面的空间，并减少了焊接连接的数量，从而提高了可靠性。 更具体地，该装置包括第一金属箔; 第二金属箔; 由所述第一金属箔形成的第一电极; 设置在所述第一电极上的电介质; 形成在电介质上并与电介质相邻的电阻元件; 导电迹线 以及由所述第二金属箔形成并且设置在所述电介质上并与所述电阻元件电接触的第二电极，其中所述电介质设置在所述第一电极和所述第二电极之间，并且其中所述电介质包括介电常数小于 4.0。