利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

133 条记录 (耗时 0.049 秒)

    Low voltage DMOS transistor
    3.
    发明授权
    Low voltage DMOS transistor 失效
    低电压DMOS晶体管

    公开(公告)号：US5825065A

    公开(公告)日：1998-10-20

    申请号：US782875

    申请日：1997-01-14

    申请人： Marco Corsi ,  Louis N. Hutter ,  John P. Erdeljac

    发明人： Marco Corsi ,  Louis N. Hutter ,  John P. Erdeljac

    IPC分类号： H01L21/336 ,  H01L27/092 ,  H01L29/08 ,  H01L29/45 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94

    CPC分类号： H01L29/66681 ,  H01L27/0922 ,  H01L29/086 ,  H01L29/66659 ,  H01L29/66674 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/456

    摘要： A method of fabricating a semiconductor device containing a HVDMOS transistor and a LVDMOS transistor and the device which includes providing a region of semiconductor material of a first conductivity type and forming a high voltage DMOS transistor disposed in the region. A relatively low voltage DMOS transistor is also disposed in that region and electrically isolated from the high voltage DMOS transistor. The low voltage DMOS transistor has spaced apart source and drain regions disposed in the region of semiconductor material and a back gate region of the first conductivity type disposed in the region of semiconductor material between the source and drain regions. The back gate region is electrically coupled to the region of semiconductor material. The region of semiconductor material includes a surface, the source, drain and back gate regions extending to that surface. A well of second conductivity type opposite to the first conductivity type is provided in the region of semiconductor material and the high voltage DMOS transistor is disposed in that well. Optionally, one only of the source or drain regions of the low voltage DMOS transistor is disposed in the well. Also, optionally, a region of second conductivity type opposite to the first conductivity type can be provided between the back gate region and the drain region which is less highly doped than the drain region.

    摘要翻译： 一种制造包含HVDMOS晶体管和LVDMOS晶体管的半导体器件的方法，该器件包括提供第一导电类型的半导体材料的区域并形成设置在该区域中的高电压DMOS晶体管。 相对低压的DMOS晶体管也设置在该区域中，并与高电压DMOS晶体管电隔离。 低电压DMOS晶体管具有设置在半导体材料区域中的间隔开的源极和漏极区域以及设置在源极和漏极区域之间的半导体材料区域中的第一导电类型的背栅极区域。 背栅区电耦合到半导体材料的区域。 半导体材料的区域包括延伸到该表面的表面，源极，漏极和后栅极区域。 在半导体材料的区域中提供与第一导电类型相反的第二导电类型的阱，并且在该阱中设置高电压DMOS晶体管。 可选地，低压DMOS晶体管的源极或漏极区域中的仅一个设置在阱中。 此外，可选地，在背栅极区域和漏极区域之间可以提供与第一导电类型相反的第二导电类型的区域，该漏极区域和漏极区域的掺杂度比漏极区域低。

    Track-and-hold circuit with low distortion
    6.
    发明授权
    Track-and-hold circuit with low distortion 有权
    具有低失真的跟踪保持电路

    公开(公告)号：US08305114B2

    公开(公告)日：2012-11-06

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    System and method for implementing low-cost electronic gyroscopes and accelerometer
    7.
    发明授权
    System and method for implementing low-cost electronic gyroscopes and accelerometer 有权
    实现低成本电子陀螺仪和加速度计的系统和方法

    公开(公告)号：US08258774B2

    公开(公告)日：2012-09-04

    申请号：US12613049

    申请日：2009-11-05

    申请人： Chih-Ming Hung ,  Marco Corsi

    发明人： Chih-Ming Hung ,  Marco Corsi

    IPC分类号： G01R23/12 ,  G01P15/00

    CPC分类号： G01C19/64 ,  G01R25/00

    摘要： Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter wavelength accelerometers are provided which has the advantage of having the high accuracy of an optical accelerometer, while being compact. Additionally, because millimeter or sub-millimeter wavelength signals are employed, cumbersome and awkward on-chip optical devices and bulky optical mediums can be avoided.

    摘要翻译： 加速度计有许多广泛的用途，并且希望在减小尺寸的同时提高精度。 这里，提供毫米波或亚毫米波长的加速度计，其具有在紧凑的同时具有光学加速度计的高精度的优点。 此外，由于采用了毫米波或亚毫米波长的信号，因此可以避免繁琐笨重的片上光学器件和庞大的光学介质。

    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION
    9.
    发明申请
    TRACK-AND-HOLD CIRCUIT WITH LOW DISTORTION 有权
    具有低失真的跟踪和保持电路

    公开(公告)号：US20110043257A1

    公开(公告)日：2011-02-24

    申请号：US12862455

    申请日：2010-08-24

    申请人： Marco Corsi ,  Robert F. Payne

    发明人： Marco Corsi ,  Robert F. Payne

    IPC分类号： H03K5/00

    CPC分类号： G11C27/026 ,  H03M1/0624 ,  H03M1/1245

    摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.

    摘要翻译： 提供跟踪和保持电路。 该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。 优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点 电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。 然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到 差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

    Method and apparatus of SFDR enhancement
    10.
    发明授权
    Method and apparatus of SFDR enhancement 有权
    SFDR增强的方法和装置

    公开(公告)号：US07804337B2

    公开(公告)日：2010-09-28

    申请号：US12393182

    申请日：2009-02-26

    申请人： Robert F. Payne ,  Marco Corsi

    发明人： Robert F. Payne ,  Marco Corsi

    IPC分类号： H03K5/00

    CPC分类号： H03M1/0836 ,  G11C27/026 ,  H03M1/0682 ,  H03M1/069 ,  H03M1/1245 ,  H03M1/164

    摘要： A track-and-hold or sample-and-hold (S/H) circuit for an analog-to-digital converter (ADC) is provided. A difference between the disclosed S/H circuit and conventional S/H circuits is the use of a peaking circuit. This peaking circuit generally provides increased current to switching transistor when transitioning between track and hold which can increase the Spurious-Free Dynamic Range (SFDR) as low frequencies, by as much as 15dB.

    摘要翻译： 提供了用于模数转换器（ADC）的跟踪保持或采样保持（S / H）电路。 所公开的S / H电路和常规S / H电路之间的区别在于使用峰值电路。 该峰值电路通常在轨道和保持之间转换时向开关晶体管提供增加的电流，这可以将无杂散动态范围（SFDR）降低多达15dB。