公开(公告)号：US20110095436A1

公开(公告)日：2011-04-28

申请号：US12791978

申请日：2010-06-02

申请人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO ,  Wen-Wei SHEN

发明人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO ,  Wen-Wei SHEN

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A through silicon via structure includes a top pad and a vertical conductive post that is connected to the top pad. The top pad covers a wider area than the cross section of the vertical conductive post. An interconnect pad is formed at least partially below the top pad. An under layer is also formed at least partially below the top pad. At least one dummy structure connects the top pad and the under layer to fasten the top pad and the interconnect pad.

摘要翻译： 透硅通孔结构包括顶焊盘和连接到顶焊盘的垂直导电柱。 顶部焊盘覆盖比垂直导电柱的横截面更宽的区域。 互连焊盘至少部分地形成在顶部焊盘的下方。 底层也至少部分地形成在顶垫的下方。 至少一个虚拟结构连接顶部焊盘和下层以紧固顶部焊盘和互连焊盘。

公开(公告)号：US20110217841A1

公开(公告)日：2011-09-08

申请号：US13112347

申请日：2011-05-20

申请人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO ,  Wen-Wei SHEN

发明人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO ,  Wen-Wei SHEN

IPC分类号： H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a through silicon via (TSV) structure includes forming an interconnect pad over a substrate. An under layer is formed over the interconnect pad. A vertical conductive post is formed at least partially through the substrate. At least one dummy structure is formed at least partially through the under layer. A top pad is formed over the dummy structure and the vertical conductive post. The top pad covers a wider area than a cross section of the vertical conductive post. The interconnect pad is electrically connected to the top pad. The dummy structure connects the top pad and the under layer thereby fastening the top pad and the interconnect pad.

摘要翻译： 形成贯穿硅通孔（TSV）结构的方法包括在衬底上形成互连焊盘。 在互连焊盘上形成下层。 至少部分地穿过衬底形成垂直导电柱。 至少部分地通过底层形成至少一个虚拟结构。 顶部衬垫形成在虚拟结构和垂直导电柱上。 顶部焊盘覆盖比垂直导电柱的横截面更宽的区域。 互连焊盘电连接到顶部焊盘。 虚拟结构连接顶部焊盘和下层，从而紧固顶部焊盘和互连焊盘。

公开(公告)号：US20110193232A1

公开(公告)日：2011-08-11

申请号：US12701868

申请日：2010-02-08

申请人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO

发明人： Chih-Hua CHEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO

IPC分类号： H01L23/488 ,  H01L21/768 ,  H01L23/498

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13147 ,  H01L2224/81801 ,  H01L2224/81895 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A conductive pillar structure for a die includes a passivation layer having a metal contact opening over a substrate. A bond pad has a first portion inside the metal contact opening and a second portion overlying the passivation layer. The second portion of the bond pad has a first width. A buffer layer over the bond pad has a pillar contact opening with a second width to expose a portion of the bond pad. A conductive pillar has a first portion inside the pillar contact opening and a second portion over the buffer layer. The second portion of the conductive pillar has a third width. A ratio of the second width to the first width is between about 0.35 and about 0.65. A ratio of the second width to the third width is between about 0.35 and about 0.65.

摘要翻译： 用于管芯的导电柱结构包括在衬底上具有金属接触开口的钝化层。 接合焊盘在金属接触开口内部具有第一部分，第二部分覆盖钝化层。 接合焊盘的第二部分具有第一宽度。 接合焊盘上的缓冲层具有第二宽度的柱接触开口以暴露接合焊盘的一部分。 导电柱具有在柱接触开口内部的第一部分和缓冲层上的第二部分。 导电柱的第二部分具有第三宽度。 第二宽度与第一宽度的比率在约0.35和约0.65之间。 第二宽度与第三宽度的比率在约0.35和约0.65之间。

公开(公告)号：US20110006416A1

公开(公告)日：2011-01-13

申请号：US12791127

申请日：2010-06-01

申请人： Ming Hung TSENG ,  Young-Chang LIEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO

发明人： Ming Hung TSENG ,  Young-Chang LIEN ,  Chen-Shien CHEN ,  Chen-Cheng KUO

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/11462 ,  H01L2224/11472 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/11906 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A method for forming a metal pillar bump structure is provided. In one embodiment, a passivation layer is formed over a semiconductor substrate and a conductive layer is formed over the passivation layer. A patterned and etched photoresist layer is provided above the conductive layer, the photoresist layer defining at least one opening therein. A metal layer is deposited in the at least one opening. Portions of the photoresist layer are etched along one or more interfaces between the photoresist layer and the metal layer to form cavities. A solder material is deposited in the at least one opening, the solder material filling the cavities and a portion of the opening above the metal layer. The remaining photoresist layer and the conductive layer not formed under the copper layer are removed. The solder material is then reflown to encapsulate the metal layer.

摘要翻译： 提供一种用于形成金属柱凸块结构的方法。 在一个实施例中，在半导体衬底上形成钝化层，并且在钝化层上方形成导电层。 在导电层之上设置图案化和蚀刻的光致抗蚀剂层，光致抗蚀剂层在其中限定至少一个开口。 金属层沉积在至少一个开口中。 光致抗蚀剂层的一部分沿着光致抗蚀剂层和金属层之间的一个或多个界面被蚀刻以形成空腔。 焊料材料沉积在至少一个开口中，焊料材料填充空腔和金属层上方的开口的一部分。 去除残留的光致抗蚀剂层和未形成在铜层之下的导电层。 然后将焊料材料重新包覆以封装金属层。

公开(公告)号：US20110175220A1

公开(公告)日：2011-07-21

申请号：US12905276

申请日：2010-10-15

申请人： Chen-Cheng KUO ,  Tzuan-Horng LIU ,  Chen-Shien CHEN

发明人： Chen-Cheng KUO ,  Tzuan-Horng LIU ,  Chen-Shien CHEN

IPC分类号： H01L29/45 ,  H01L21/283

CPC分类号： H01L24/06 ,  H01L21/76838 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/0501 ,  H01L2224/0502 ,  H01L2224/05085 ,  H01L2224/05099 ,  H01L2224/0556 ,  H01L2224/05599 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device includes at least two conductive pads, one of the conductive pads being formed above another of the at least two conductive pads, and a redistribution layer extending from at least one of the conductive pads. The semiconductor device also includes a bump structure formed over the conductive pads and electrically coupled to the conductive pads.

摘要翻译： 半导体器件包括至少两个导电焊盘，其中一个导电焊盘形成在至少两个导电焊盘的另一个之上，以及从至少一个导电焊盘延伸的再分配层。 半导体器件还包括形成在导电焊盘上并且电耦合到导电焊盘的凸块结构。

公开(公告)号：US20130026622A1

公开(公告)日：2013-01-31

申请号：US13193969

申请日：2011-07-29

申请人： Chita CHUANG ,  Yao-Chun CHUANG ,  Tsung-Shu LIN ,  Chen-Cheng KUO ,  Chen-Shien CHEN

发明人： Chita CHUANG ,  Yao-Chun CHUANG ,  Tsung-Shu LIN ,  Chen-Cheng KUO ,  Chen-Shien CHEN

IPC分类号： H01L23/485

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01029 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/206 ,  H01L2924/381 ,  H01L2924/01047 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01073 ,  H01L2924/01049 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01022 ,  H01L2924/01032 ,  H01L2924/01078 ,  H01L2924/01013 ,  H01L2924/0104 ,  H01L2924/01082 ,  H01L2924/01046 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2924/00

摘要： A bump structure in a semiconductor device or a packing assembly includes an under-bump metallization (UBM) layer formed on a conductive pad of a semiconductor substrate. The UBM layer has a width greater than a width of the conductive pad.

摘要翻译： 半导体器件或封装组件中的凸块结构包括在半导体衬底的导电焊盘上形成的凸块下金属化（UBM）层。 UBM层的宽度大于导电焊盘的宽度。

公开(公告)号：US20120040524A1

公开(公告)日：2012-02-16

申请号：US12855360

申请日：2010-08-12

申请人： Chen-Cheng KUO ,  Chen-Shien CHEN

发明人： Chen-Cheng KUO ,  Chen-Shien CHEN

IPC分类号： H01L21/768

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13099 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/01083 ,  H01L2924/01051 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2224/05552

摘要： A process for making a copper post with footing profile employs dual photoresist films of different photosensitivities and thicknesses on an under-bump-metallurgy (UBM) layer. After an exposure lithography process, a first opening with a substantially vertical sidewall is formed in a first photoresist film, and a second opening with a sloped sidewall is formed in a second photoresist film. The second opening has a top diameter and a bottom diameter greater than the top diameter, and the bottom diameter is greater than the diameter of the first opening. A conductive layer is then formed in the first opening and the second opening followed by removing the dual photoresist films.

摘要翻译： 用于制造具有基脚轮廓的铜柱的方法使用在凸块下 - 冶金（UBM）层上具有不同光敏度和厚度的双光致抗蚀剂膜。 在曝光光刻工艺之后，在第一光致抗蚀剂膜中形成具有基本上垂直的侧壁的第一开口，并且在第二光致抗蚀剂膜中形成具有倾斜侧壁的第二开口。 第二开口具有大于顶部直径的顶部直径和底部直径，并且底部直径大于第一开口的直径。 然后在第一开口和第二开口中形成导电层，随后除去双光致抗蚀剂膜。