METHOD OF FORMING THROUGH SILICON VIA WITH DUMMY STRUCTURE
    5.
    发明申请
    METHOD OF FORMING THROUGH SILICON VIA WITH DUMMY STRUCTURE 有权
    通过多孔结构形成硅的方法

    公开(公告)号:US20110217841A1

    公开(公告)日:2011-09-08

    申请号:US13112347

    申请日:2011-05-20

    IPC分类号: H01L21/768

    摘要: A method of forming a through silicon via (TSV) structure includes forming an interconnect pad over a substrate. An under layer is formed over the interconnect pad. A vertical conductive post is formed at least partially through the substrate. At least one dummy structure is formed at least partially through the under layer. A top pad is formed over the dummy structure and the vertical conductive post. The top pad covers a wider area than a cross section of the vertical conductive post. The interconnect pad is electrically connected to the top pad. The dummy structure connects the top pad and the under layer thereby fastening the top pad and the interconnect pad.

    摘要翻译: 形成贯穿硅通孔(TSV)结构的方法包括在衬底上形成互连焊盘。 在互连焊盘上形成下层。 至少部分地穿过衬底形成垂直导电柱。 至少部分地通过底层形成至少一个虚拟结构。 顶部衬垫形成在虚拟结构和垂直导电柱上。 顶部焊盘覆盖比垂直导电柱的横截面更宽的区域。 互连焊盘电连接到顶部焊盘。 虚拟结构连接顶部焊盘和下层,从而紧固顶部焊盘和互连焊盘。

    THROUGH SILICON VIA WITH DUMMY STRUCTURE AND METHOD FOR FORMING THE SAME
    7.
    发明申请
    THROUGH SILICON VIA WITH DUMMY STRUCTURE AND METHOD FOR FORMING THE SAME 有权
    通过具有深度结构的硅和其形成方法

    公开(公告)号:US20110095436A1

    公开(公告)日:2011-04-28

    申请号:US12791978

    申请日:2010-06-02

    IPC分类号: H01L23/48 H01L21/768

    摘要: A through silicon via structure includes a top pad and a vertical conductive post that is connected to the top pad. The top pad covers a wider area than the cross section of the vertical conductive post. An interconnect pad is formed at least partially below the top pad. An under layer is also formed at least partially below the top pad. At least one dummy structure connects the top pad and the under layer to fasten the top pad and the interconnect pad.

    摘要翻译: 透硅通孔结构包括顶焊盘和连接到顶焊盘的垂直导电柱。 顶部焊盘覆盖比垂直导电柱的横截面更宽的区域。 互连焊盘至少部分地形成在顶部焊盘的下方。 底层也至少部分地形成在顶垫的下方。 至少一个虚拟结构连接顶部焊盘和下层以紧固顶部焊盘和互连焊盘。

    THIN WAFER HANDLING STRUCTURE AND METHOD
    9.
    发明申请
    THIN WAFER HANDLING STRUCTURE AND METHOD 有权
    薄波处理结构与方法

    公开(公告)号:US20100330788A1

    公开(公告)日:2010-12-30

    申请号:US12818362

    申请日:2010-06-18

    摘要: A thin wafer handling structure includes a semiconductor wafer, a release layer that can be released by applying energy, an adhesive layer that can be removed by a solvent, and a carrier, where the release layer is applied on the carrier by coating or laminating, the adhesive layer is applied on the semiconductor wafer by coating or laminating, and the semiconductor wafer and the carrier is bonded together with the release layer and the adhesive layer in between. The method includes applying a release layer on a carrier, applying an adhesive layer on a semiconductor wafer, bonding the carrier and the semiconductor wafer, releasing the carrier by applying energy on the release layer, e.g. UV or laser, and cleaning the semiconductor's surface by a solvent to remove any residue of the adhesive layer.

    摘要翻译: 薄晶片处理结构包括半导体晶片,可通过施加能量释放的释放层,可通过溶剂除去的粘合剂层和载体,其中通过涂覆或层压将剥离层施加在载体上, 通过涂布或层压将粘合剂层施加在半导体晶片上,半导体晶片和载体与剥离层和粘合剂层粘合在一起。 该方法包括在载体上施加剥离层,在半导体晶片上施加粘合剂层,粘合载体和半导体晶片,通过在释放层上施加能量来释放载体,例如, UV或激光,并且通过溶剂清洁半导体的表面以除去粘合剂层的任何残余物。