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公开(公告)号：US09905524B2
公开(公告)日：2018-02-27
申请号：US13193969
申请日：2011-07-29
CPC分类号： H01L24/11 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05022 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05541 , H01L2224/05552 , H01L2224/05562 , H01L2224/05572 , H01L2224/05647 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/13005 , H01L2224/13022 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/16237 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/206 , H01L2924/381 , H01L2924/01047 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/01073 , H01L2924/01049 , H01L2924/0103 , H01L2924/01025 , H01L2924/01022 , H01L2924/01032 , H01L2924/01078 , H01L2924/01013 , H01L2924/0104 , H01L2924/01082 , H01L2924/01046 , H01L2924/01083 , H01L2924/01051 , H01L2924/00
摘要： A bump structure in a semiconductor device or a packing assembly includes an under-bump metallization (UBM) layer formed on a conductive pad of a semiconductor substrate. The UBM layer has a width greater than a width of the conductive pad.
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公开(公告)号：US09257412B2
公开(公告)日：2016-02-09
申请号：US13611226
申请日：2012-09-12
申请人： Yao-Chun Chuang , Yu-Chen Hsu , Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
发明人： Yao-Chun Chuang , Yu-Chen Hsu , Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
CPC分类号： H01L25/50 , H01L21/563 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/10125 , H01L2224/13022 , H01L2224/13111 , H01L2224/13147 , H01L2224/14133 , H01L2224/14135 , H01L2224/16145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06582 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552
摘要： A structure comprises a plurality of connectors formed on a top surface of a first semiconductor die, a second semiconductor die formed on the first semiconductor die and coupled to the first semiconductor die through the plurality of connectors and a first dummy conductive plane formed between an edge of the first semiconductor die and the plurality of connectors, wherein an edge of the first dummy conductive plane and a first distance to neutral point (DNP) direction form a first angle, and wherein the first angle is less than or equal to 45 degrees.
摘要翻译： 一种结构包括形成在第一半导体管芯的顶表面上的多个连接器，形成在第一半导体管芯上并通过多个连接器耦合到第一半导体管芯的第二半导体管芯，以及形成在第一半导体管芯的边缘 的第一半导体管芯和多个连接器，其中第一虚拟导电平面的边缘和中性点（DNP）方向的第一距离形成第一角度，并且其中第一角度小于或等于45度。
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公开(公告)号：US20140070402A1
公开(公告)日：2014-03-13
申请号：US13611226
申请日：2012-09-12
申请人： Yao-Chun Chuang , Yu-Chen Hsu , Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
发明人： Yao-Chun Chuang , Yu-Chen Hsu , Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
CPC分类号： H01L25/50 , H01L21/563 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2224/0401 , H01L2224/05022 , H01L2224/05572 , H01L2224/10125 , H01L2224/13022 , H01L2224/13111 , H01L2224/13147 , H01L2224/14133 , H01L2224/14135 , H01L2224/16145 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06582 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552
摘要： A structure comprises a plurality of connectors formed on a top surface of a first semiconductor die, a second semiconductor die formed on the first semiconductor die and coupled to the first semiconductor die through the plurality of connectors and a first dummy conductive plane formed between an edge of the first semiconductor die and the plurality of connectors, wherein an edge of the first dummy conductive plane and a first distance to neutral point (DNP) direction form a first angle, and wherein the first angle is less than or equal to 45 degrees.
摘要翻译： 一种结构包括形成在第一半导体管芯的顶表面上的多个连接器，形成在第一半导体管芯上并通过多个连接器耦合到第一半导体管芯的第二半导体管芯，以及形成在第一半导体管芯的边缘 的第一半导体管芯和多个连接器，其中第一虚拟导电平面的边缘和中性点（DNP）方向的第一距离形成第一角度，并且其中第一角度小于或等于45度。
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公开(公告)号：US08659123B2
公开(公告)日：2014-02-25
申请号：US13247616
申请日：2011-09-28
申请人： Yao-Chun Chuang , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
发明人： Yao-Chun Chuang , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
IPC分类号： H01L23/58
CPC分类号： H01L24/05 , H01L23/291 , H01L23/293 , H01L23/3192 , H01L24/06 , H01L24/13 , H01L2224/02235 , H01L2224/0401 , H01L2224/05012 , H01L2224/05022 , H01L2224/05124 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/06051 , H01L2224/06179 , H01L2224/13012 , H01L2224/13022 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/01047 , H01L2924/00012 , H01L2224/05552
摘要： A die includes a substrate, a metal pad over the substrate, and a passivation layer that has a portion over the metal pad. A dummy pattern is disposed adjacent to the metal pad. The dummy pattern is level with, and is formed of a same material as, the metal pad. The dummy pattern forms at least a partial ring surrounding at least a third of the metal pad.
摘要翻译： 芯片包括衬底，衬底上的金属焊盘以及在金属焊盘上方具有一部分的钝化层。 伪图案邻近金属垫设置。 虚拟图案与金属垫相同并且由与金属垫相同的材料形成。 虚设图案至少形成围绕金属垫的至少三分之一的部分环。
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公开(公告)号：US20130075872A1
公开(公告)日：2013-03-28
申请号：US13247616
申请日：2011-09-28
申请人： Yao-Chun Chuang , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
发明人： Yao-Chun Chuang , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
IPC分类号： H01L23/58
CPC分类号： H01L24/05 , H01L23/291 , H01L23/293 , H01L23/3192 , H01L24/06 , H01L24/13 , H01L2224/02235 , H01L2224/0401 , H01L2224/05012 , H01L2224/05022 , H01L2224/05124 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/06051 , H01L2224/06179 , H01L2224/13012 , H01L2224/13022 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/01047 , H01L2924/00012 , H01L2224/05552
摘要： A die includes a substrate, a metal pad over the substrate, and a passivation layer that has a portion over the metal pad. A dummy pattern is disposed adjacent to the metal pad. The dummy pattern is level with, and is formed of a same material as, the metal pad. The dummy pattern forms at least a partial ring surrounding at least a third of the metal pad.
摘要翻译： 芯片包括衬底，衬底上的金属焊盘以及在金属焊盘上方具有一部分的钝化层。 伪图案邻近金属垫设置。 虚拟图案与金属垫相同并且由与金属垫相同的材料形成。 虚设图案至少形成围绕金属垫的至少三分之一的部分环。
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公开(公告)号：US09053989B2
公开(公告)日：2015-06-09
申请号：US13228094
申请日：2011-09-08
申请人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
发明人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
CPC分类号： H01L24/13 , H01L24/11 , H01L24/14 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05026 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/13005 , H01L2224/13013 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/1312 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/141 , H01L2224/14135 , H01L2224/16059 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01073 , H01L2924/01049 , H01L2924/0105 , H01L2924/0103 , H01L2924/01025 , H01L2924/01024 , H01L2924/01022 , H01L2924/01032 , H01L2924/01038 , H01L2924/01078 , H01L2924/0104 , H01L2924/206 , H01L2924/01082 , H01L2924/01046 , H01L2924/01079 , H01L2924/01047 , H01L2924/01083 , H01L2924/01051 , H01L2224/13012 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A device includes a chip attached to a substrate. The chip includes a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar. The substrate includes a conductive trace and a mask layer overlying the conductive trace, wherein the mask layer has an opening exposing a portion of the conductive trace. An interconnection is formed between the conductive pillar and the exposed portion of the conductive trace. The opening has a first dimension (d1) measured along the long axis of the conductive pillar and a second dimension (d2) measured along the short axis of the conductive pillar. A ratio of L to d1 is greater than a ratio of W to d2.
摘要翻译： 一种器件包括附接到衬底的芯片。 该芯片包括具有沿着导电柱的长轴测量的长度（L）和沿导电柱的短轴测量的宽度（W）的导电柱。 衬底包括覆盖导电迹线的导电迹线和掩模层，其中掩模层具有暴露导电迹线的一部分的开口。 在导电柱和导电迹线的暴露部分之间形成互连。 开口具有沿着导电柱的长轴测量的第一尺寸（d1）和沿着导电柱的短轴测量的第二尺寸（d2）。 L与d1的比值大于W与d2的比。
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公开(公告)号：US08476759B2
公开(公告)日：2013-07-02
申请号：US13308249
申请日：2011-11-30
IPC分类号： H01L23/48
CPC分类号： H01L24/11 , H01L23/293 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03462 , H01L2224/0401 , H01L2224/05005 , H01L2224/05022 , H01L2224/05086 , H01L2224/05091 , H01L2224/05124 , H01L2224/05541 , H01L2224/05572 , H01L2224/1145 , H01L2224/11462 , H01L2224/13022 , H01L2224/13111 , H01L2224/13147 , H01L2924/00014 , H01L2924/206 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552
摘要： A structure comprises a top metal connector formed underneath a bond pad. The bond pad is enclosed by a first passivation layer and a second passivation layer. A polymer layer is further formed on the second passivation layer. The dimension of an opening in the first passivation layer is less than the dimension of the top metal connector. The dimension of the top metal connector is less than the dimensions of an opening in the second passivation layer and an opening in the polymer layer.
摘要翻译： 结构包括形成在接合焊盘下方的顶部金属连接器。 接合焊盘由第一钝化层和第二钝化层包围。 聚合物层进一步形成在第二钝化层上。 第一钝化层中的开口的尺寸小于顶部金属连接器的尺寸。 顶部金属连接器的尺寸小于第二钝化层中的开口的尺寸和聚合物层中的开口的尺寸。
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公开(公告)号：US20130134563A1
公开(公告)日：2013-05-30
申请号：US13308249
申请日：2011-11-30
CPC分类号： H01L24/11 , H01L23/293 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/03462 , H01L2224/0401 , H01L2224/05005 , H01L2224/05022 , H01L2224/05086 , H01L2224/05091 , H01L2224/05124 , H01L2224/05541 , H01L2224/05572 , H01L2224/1145 , H01L2224/11462 , H01L2224/13022 , H01L2224/13111 , H01L2224/13147 , H01L2924/00014 , H01L2924/206 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2224/05552
摘要： A structure comprises a top metal connector formed underneath a bond pad. The bond pad is enclosed by a first passivation layer and a second passivation layer. A polymer layer is further formed on the second passivation layer. The dimension of an opening in the first passivation layer is less than the dimension of the top metal connector. The dimension of the top metal connector is less than the dimensions of an opening in the second passivation layer and an opening in the polymer layer.
摘要翻译： 结构包括形成在接合焊盘下方的顶部金属连接器。 接合焊盘由第一钝化层和第二钝化层包围。 聚合物层进一步形成在第二钝化层上。 第一钝化层中的开口的尺寸小于顶部金属连接器的尺寸。 顶部金属连接器的尺寸小于第二钝化层中的开口的尺寸和聚合物层中的开口的尺寸。
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公开(公告)号：US20130062755A1
公开(公告)日：2013-03-14
申请号：US13228094
申请日：2011-09-08
申请人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
发明人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
IPC分类号： H01L23/485
CPC分类号： H01L24/13 , H01L24/11 , H01L24/14 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05026 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/13005 , H01L2224/13013 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/1312 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/141 , H01L2224/14135 , H01L2224/16059 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01073 , H01L2924/01049 , H01L2924/0105 , H01L2924/0103 , H01L2924/01025 , H01L2924/01024 , H01L2924/01022 , H01L2924/01032 , H01L2924/01038 , H01L2924/01078 , H01L2924/0104 , H01L2924/206 , H01L2924/01082 , H01L2924/01046 , H01L2924/01079 , H01L2924/01047 , H01L2924/01083 , H01L2924/01051 , H01L2224/13012 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A device includes a chip attached to a substrate. The chip includes a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar. The substrate includes a conductive trace and a mask layer overlying the conductive trace, wherein the mask layer has an opening exposing a portion of the conductive trace. An interconnection is formed between the conductive pillar and the exposed portion of the conductive trace. The opening has a first dimension (d1) measured along the long axis of the conductive pillar and a second dimension (d2) measured along the short axis of the conductive pillar. A ratio of L to d1 is greater than a ratio of W to d2.
摘要翻译： 一种器件包括附接到衬底的芯片。 该芯片包括具有沿着导电柱的长轴测量的长度（L）和沿导电柱的短轴测量的宽度（W）的导电柱。 衬底包括覆盖导电迹线的导电迹线和掩模层，其中掩模层具有暴露导电迹线的一部分的开口。 在导电柱和导电迹线的暴露部分之间形成互连。 开口具有沿着导电柱的长轴测量的第一尺寸（d1）和沿着导电柱的短轴测量的第二尺寸（d2）。 L与d1的比值大于W与d2的比。
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公开(公告)号：US09287191B2
公开(公告)日：2016-03-15
申请号：US13271766
申请日：2011-10-12
申请人： Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
发明人： Hao-Juin Liu , Chita Chuang , Chen-Cheng Kuo , Chen-Shien Chen
CPC分类号： H01L23/3114 , H01L21/563 , H01L23/3142 , H01L23/36 , H01L23/42 , H01L23/49838 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16225 , H01L2224/26175 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/29344 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/81815 , H01L2224/83104 , H01L2224/83191 , H01L2224/83385 , H01L2224/94 , H01L2924/01322 , H01L2924/12042 , H01L2924/16251 , H01L2924/181 , H01L2924/00 , H01L2924/00014 , H01L2224/27 , H01L2924/0665 , H01L2924/01047 , H01L2924/01029
摘要： An embodiment is a structure. The structure comprises a substrate, a chip, and a reinforcement component. The substrate has a first surface, and the first surface comprises depressions. The chip is over and attached to the first surface of the substrate. The reinforcement component is over a first area of the first surface of the substrate. The first area is not under the chip. The reinforcement component has a portion disposed in at least some of the depressions in the first area.
摘要翻译： 一个实施例是一种结构。 该结构包括基底，芯片和增强部件。 衬底具有第一表面，并且第一表面包括凹陷。 芯片结束并附着到基板的第一表面。 加强部件在基板的第一表面的第一区域之上。 第一个区域不在芯片之下。 加强部件具有设置在第一区域中的至少一些凹部中的部分。
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