Abstract:
One illustrative pillar disclosed herein includes a bond pad conductively coupled to an integrated circuit and a pillar comprising a base that is conductively coupled to the bond pad, wherein the base has a first lateral dimension, and an upper portion that is conductively coupled to the base, wherein the upper portion has a second lateral dimension that is less than the first lateral dimension. A method disclosed herein of forming a pillar includes forming a base such that it is conductively coupled to a bond pad on an integrated circuit product and, after forming the base, forming an upper portion such that it is conductively coupled to the base.
Abstract:
Articles including bonded metal structures and methods of preparing the same are provided herein. In an embodiment, a method of preparing an article that includes bonded metal structures includes providing a first substrate. A first metal structure and a second metal structure are formed on the first substrate. The first metal structure and the second metal structure each include an exposed contact surface. A bond mask is formed over the contact surface of the first metal structure. A second substrate is bonded to the first substrate through the exposed contact surface of the second metal structure. The bond mask remains disposed over the exposed contact surface of the second metal structure during bonding of the second substrate to the first substrate. A wire is bonded to the exposed contact surface of the first metal structure.
Abstract:
Disclosed herein is a device that includes first and second spaced-apart conductive pads positioned in a layer of insulating material, first and second under-bump metallization layers that are conductively coupled to the first and second conductive pads, respectively, and first and second spaced-apart conductive bumps that are conductively coupled to the first and second under-bump metallization layers, respectively. Additionally, the device includes, among other things, a passivation layer positioned above the layer of insulating material between the first and second spaced-apart conductive bumps, and a protective layer positioned on the passivation layer, wherein the protective layer extends between and contacts the first and second under-bump metallization layers, the material of the protective layer being one of silicon dioxide, silicon oxyfluoride (SiOF), silicon nitride (SiN), and silicone carbon nitride (SiCN).
Abstract:
The width of scribe lines may be reduced in semiconductor devices by applying a process technique in which trenches may be formed first from the rear side on the basis of a required width of the corresponding trenches, while subsequently it may be cut into the substrate from the front side on the basis of a reduced thickness of the corresponding saw blades, thereby also enabling a reduction of the scribe line width. Furthermore, contamination of the front side, i.e., of the metallization system, may be reduced, for instance, by performing an optional intermediate cleaning process.
Abstract:
Articles including bonded metal structures and methods of preparing the same are provided herein. In an embodiment, a method of preparing an article that includes bonded metal structures includes providing a first substrate. A first metal structure and a second metal structure are formed on the first substrate. The first metal structure and the second metal structure each include an exposed contact surface. A bond mask is formed over the contact surface of the first metal structure. A second substrate is bonded to the first substrate through the exposed contact surface of the second metal structure. The bond mask remains disposed over the exposed contact surface of the second metal structure during bonding of the second substrate to the first substrate. A wire is bonded to the exposed contact surface of the first metal structure.
Abstract:
One illustrative pillar disclosed herein includes a bond pad conductively coupled to an integrated circuit and a pillar comprising a base that is conductively coupled to the bond pad, wherein the base has a first lateral dimension, and an upper portion that is conductively coupled to the base, wherein the upper portion has a second lateral dimension that is less than the first lateral dimension. A method disclosed herein of forming a pillar includes forming a base such that it is conductively coupled to a bond pad on an integrated circuit product and, after forming the base, forming an upper portion such that it is conductively coupled to the base.
Abstract:
The width of scribe lines may be reduced in semiconductor devices by applying a process technique in which trenches may be formed first from the rear side on the basis of a required width of the corresponding trenches, while subsequently it may be cut into the substrate from the front side on the basis of a reduced thickness of the corresponding saw blades, thereby also enabling a reduction of the scribe line width. Furthermore, contamination of the front side, i.e., of the metallization system, may be reduced, for instance, by performing an optional intermediate cleaning process.