Insulated gate semiconductor device
    1.
    发明授权
    Insulated gate semiconductor device 失效
    绝缘栅半导体器件

    公开(公告)号:US5432471A

    公开(公告)日:1995-07-11

    申请号:US113896

    申请日:1993-08-31

    摘要: In order to prevent a malfunction caused by an electrical noise and limit an excessive main current at a high speed while cutting off the same to a value close to zero, the main current is regulated by an IGBT (1) which is connected with a load. A part of this main current is shunted to another IGBT (2). The as-shunted current flows through a resistor (3), to be converted to a voltage across the resistor (3). When the main current is excessively increased by shorting of the load or the like, this voltage exceeds a prescribed value so that a transistor (5) and a thyristor (7) enter conducting states. Consequently, a voltage across a gate (G) and an emitter (E) of the IGBT (1) is so reduced as to cut off the main current. The transistor (5) prevents the main current from excessive increase since the same has a high speed of response, while the thyristor (7) cuts off the main current to zero since the same has lower resistance in conduction.

    摘要翻译: 为了防止由电噪声引起的故障,并且在将其截止到接近零的值的同时将高电流限制在过大的主电流,主电流由与负载连接的IGBT(1) 。 该主电流的一部分被分流到另一个IGBT(2)。 分流电流流过电阻器(3),以转换成电阻器(3)两端的电压。 当通过负载等的短路使主电流过度增加时,该电压超过规定值,使得晶体管(5)和晶闸管(7)进入导通状态。 因此,IGBT(1)的栅极(G)和发射极(E)之间的电压被减小以截断主电流。 由于晶体管(5)具有较高的响应速度,所以晶体管(5)防止主电流过度增加,而晶闸管(7)将主电流切断为零,因为该电流具有较低的导通电阻。

    Semiconductor power module and compound power module
    2.
    发明授权
    Semiconductor power module and compound power module 失效
    半导体电源模块和复合电源模块

    公开(公告)号:US5786973A

    公开(公告)日:1998-07-28

    申请号:US629756

    申请日:1996-04-09

    摘要: A semiconductor power module is configured to prevent concentration of load in a certain semiconductor power switching element. A diagnosis circuit (PC) of a module (10a or 10b) compares a sensing signal (SSE) for example, which is sent out from a sensing circuit (Se) and is proportional to the collector current of an IGBT element, with a reference voltage, and judges presence or absence of abnormality in the collector current. If abnormal, a shutdown signal (S.sub.SD) is sent out to a shutdown circuit (SD), and the IGBT element is cut off, and simultaneously an abnormality detection signal (S.sub.F01 or S.sub.F02) is sent out to the other module (10b or 10a). The diagnosis circuit (PC of the module (10b or 10a) receives the abnormality detection signal (S.sub.F01 or S.sub.F02), and sends out the shutdown signal (S.sub.SD) to the shutdown circuit (SD), thereby shutting down the IGBT element. Since the transmission timing of both shutdown signals (S.sub.SD) coincides, the both IGBT elements are cut off at the same time. Therefore, due to earlier shutdown of one IGBT element, concentration of load in the other delayed IGBT element may be avoided.

    摘要翻译: 半导体功率模块被配置为防止某个半导体功率开关元件中的负载集中。 模块(10a或10b)的诊断电路(PC)比较例如从感测电路(Se)发送并与IGBT元件的集电极电流成比例的感测信号(SSE)与参考 电压,判断集电极电流的有无异常。 如果异常,则关闭信号(SSD)发送到关闭电路(SD),IGBT元件被切断,同时将异常检测信号(SF01或SF02)发送到另一个模块(10b或10a) )。 诊断电路(模块(10b或10a)的PC接收到异常检测信号(SF01或SF02),并向关闭电路(SD)发送关机信号(SSD),从而关闭IGBT元件,由于 两个关断信号(SSD)的发送定时一致,两个IGBT元件同时被切断,因此由于一个IGBT元件的更早的停止,可以避免另一个延迟IGBT元件的负载集中。

    Power semiconductor device, power arm and inverter circuit
    3.
    发明授权
    Power semiconductor device, power arm and inverter circuit 失效
    功率半导体器件,电源臂及逆变电路

    公开(公告)号:US06643155B2

    公开(公告)日:2003-11-04

    申请号:US09880919

    申请日:2001-06-15

    IPC分类号: H02M75387

    CPC分类号: H02M7/003

    摘要: It is an object of the present invention to provide an inverter circuit including a power arm ensuring a high breakdown voltage and having low probability of malfunction. In a power arm element consisting of a switching element and a diode connected in inverse-parallel connection thereto, n free wheeling diodes (n≧2) connected in series are connected in inverse-parallel connection to a switching element (1b). A breakdown voltage between an anode and a cathode of each free wheeling diode is defined to be 1/n of a breakdown voltage of the switching element (1b). That is, the breakdown voltage of each free wheeling diode is reduced to 1/n to reduce a thickness of a n− drift region. A transient voltage characteristic during flow of a free wheeling current can be thereby kept low. The drop in the breakdown voltage is compensated with the n free wheeling diodes connected in series, to thereby ensure breakdown voltage of a degree approximately the same as that of the switching element.

    摘要翻译: 本发明的目的是提供一种包括确保高击穿电压并且故障概率低的电源臂的逆变器电路。 在由开关元件和与其并联连接的二极管组成的功率臂元件中,串联连接的n个续流二极管(n> = 2)与开关元件(1b)反并联连接。 每个续流二极管的阳极和阴极之间的击穿电压被定义为开关元件(1b)的击穿电压的1 / n。 也就是说,每个续流二极管的击穿电压降低到1 / n,以减小n漂移区域的厚度。 因此,可以保持在续流电流的流动期间的瞬时电压特性。 通过串联连接的n个续流二极管来补偿击穿电压的下降,从而确保与开关元件大致相同程度的击穿电压。

    Semiconductor device having increased current capacity
    6.
    发明授权
    Semiconductor device having increased current capacity 失效
    具有增加的电流容量的半导体器件

    公开(公告)号:US5389801A

    公开(公告)日:1995-02-14

    申请号:US972290

    申请日:1992-11-05

    摘要: A general object of the present invention is to make a maximum controllable current large without exerting adverse effect on other characteristics. In a surface of an n.sup.- layer 2 formed on a p.sup.+ substrate 1, p diffusion regions 3a, 3b and 3c are formed separated by n.sup.+ diffusion regions 4a, 4b and an oxidation film 9. Above the p diffusion regions 3b and 3c, gate electrodes 5a and 5b are formed insulated from the surrounding by an oxidation film 6. An Al-Si electrode 7 is in contact with the p diffusion region 3a and the n.sup.+ diffusion region 4a while a metal electrode 8 is in contact with the p.sup.+ substrate 1. By virtue of interposition of the oxidation film 9, a thyristor consisting of the n.sup.+ diffusion region 4a, p diffusion region 3a, n.sup.- layer 2 and p.sup.+ substrate 1 is prevented from being actuated.

    摘要翻译: 本发明的一般目的是使最大可控电流大,而不会对其它特性产生不利影响。 在p +衬底1上形成的n层2的表面中,由n +扩散区域4a,4b和氧化膜9隔开形成p扩散区域3a,3b和3c。在p扩散区域3b和3c上方, 电极5a和5b通过氧化膜6与周围形成绝缘.Al-Si电极7与p扩散区域3a和n +扩散区域4a接触,而金属电极8与p +衬底1接触 通过插入氧化膜9,防止由n +扩散区域4a,p扩散区域3a,n-层2和p +衬底1组成的晶闸管被致动。

    Electrically isolated MOSFET drive circuit
    8.
    发明授权
    Electrically isolated MOSFET drive circuit 失效
    电隔离MOSFET驱动电路

    公开(公告)号:US4880995A

    公开(公告)日:1989-11-14

    申请号:US233855

    申请日:1988-08-18

    CPC分类号: H03K17/04126 H03K17/567

    摘要: A driver circuit for driving a switching element in response to a driving signal from a driving signal generator includes an electrical isolation circuit for generating an electrically isolated signal from the driving signal in response to the driving signal; a first signal generator which receives the electrically isolated signal, and generates a first signal which level-changes from a second level to a third level in response to the level change of the electrically isolated signal from a first level to the second level; a second signal generator which receives the electrically isolated signal, and generates a second signal synchronous with the electrically isolated signal; a third signal generator which receives the signal from the first signal generator, and generates a third signal synchronous with the first signal; a fourth signal generator which receives the signals from the second and the third signal generators, and generates a fourth signal having a signal level equal to the sum of the second and the third signal levels, the generator including a metal oxide semiconductor field effect transistor.

    摘要翻译: 用于响应于来自驱动信号发生器的驱动信号驱动开关元件的驱动器电路包括电隔离电路,用于响应驱动信号从驱动信号产生电隔离信号; 第一信号发生器,其接收电隔离信号,并且响应于电隔离信号从第一电平到第二电平的电平变化而产生电平从第二电平变化到第三电平的第一信号; 第二信号发生器,其接收所述电隔离信号,并产生与所述电隔离信号同步的第二信号; 第三信号发生器,其接收来自第一信号发生器的信号,并产生与第一信号同步的第三信号; 第四信号发生器,其接收来自第二和第三信号发生器的信号,并产生具有等于第二和第三信号电平之和的信号电平的第四信号,发生器包括金属氧化物半导体场效应晶体管。

    Power semiconductor device
    10.
    发明授权
    Power semiconductor device 有权
    功率半导体器件

    公开(公告)号:US07235857B2

    公开(公告)日:2007-06-26

    申请号:US10467344

    申请日:2001-05-25

    IPC分类号: H01L29/00 H01L27/01

    摘要: A semiconductor device is provided in which a plurality of MOSFETs including a vertical MOSFET is formed on a substrate. The device includes a silicon carbide substrate having front and back surfaces facing each other, an isolating region formed in the substrate to extend from the front surface to the back surface of the substrate, and first and second MOSFETs formed on opposite sides of the isolating region, respectively.

    摘要翻译: 提供一种半导体器件,其中在衬底上形成包括垂直MOSFET的多个MOSFET。 该装置包括具有彼此面对的前表面和后表面的碳化硅衬底,形成在衬底中的从衬底的前表面延伸到背表面的隔离区域,以及形成在隔离区域的相对侧上的第一和第二MOSFET , 分别。