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    Water-laden solid matter of vapor-phase processed inorganic oxide particles and slurry for polishing and manufacturing method of semiconductor devices
    1.
    发明授权
    Water-laden solid matter of vapor-phase processed inorganic oxide particles and slurry for polishing and manufacturing method of semiconductor devices 有权
    气相处理无机氧化物颗粒的含水固体物质和用于半导体器件的抛光和制造方法的浆料

    公开(公告)号：US06409780B1

    公开(公告)日：2002-06-25

    申请号：US09482937

    申请日：2000-01-14

    申请人： Hiroyuki Yano ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Akira Iio ,  Masayuki Hattori ,  Kiyonobu Kubota

    发明人： Hiroyuki Yano ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Akira Iio ,  Masayuki Hattori ,  Kiyonobu Kubota

    IPC分类号： C09K314

    CPC分类号： C09G1/02 ,  C09K3/1463

    摘要： Water-laden solid matter is provided which is obtained by adding 40 to 300 weight parts of water to 100 weight parts of inorganic oxide particles synthesized by fumed process or metal evaporation oxidation process, slurry for polishing is provided which is manufactured by using the water-laden solid matter, and a method for manufacturing a semiconductor device using the above slurry. Said water-laden solid matter is within a range of 0.3 to 3 g/cm3 in bulk density and within a range of 0.5 to 100 mm&phgr; in average particle size when manufactured granular. Said slurry for polishing is manufactured from the water-laden solid matter, and the average particle size thereof after being dispersed in water is within a range of 0.05 to 1.0 &mgr;m.

    摘要翻译： 提供含水固体物质，其通过向通过热解法或金属蒸发氧化法合成的100重量份的无机氧化物颗粒中加入40至300重量份的水而获得，提供了通过使用水 - 负载固体物质，以及使用上述浆料制造半导体器件的方法。 所述含水固体物质的体积密度为0.3〜3g / cm 3，制粒时的平均粒径为0.5〜100mmφ的范围。 用于抛光的所述浆料由含水固体物质制成，其在分散在水中的平均粒径在0.05-1.0μm的范围内。

    Chemical mechanical method of polishing wafer surfaces
    2.
    发明授权
    Chemical mechanical method of polishing wafer surfaces 有权
    抛光晶圆表面的化学机械方法

    公开(公告)号：US06375545B1

    公开(公告)日：2002-04-23

    申请号：US09484252

    申请日：2000-01-18

    申请人： Hiroyuki Yano ,  Gaku Minamihaba ,  Yukiteru Matsui ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Akira Iio ,  Masayuki Hattori ,  Masayuki Motonari

    发明人： Hiroyuki Yano ,  Gaku Minamihaba ,  Yukiteru Matsui ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Akira Iio ,  Masayuki Hattori ,  Masayuki Motonari

    IPC分类号： B24B100

    CPC分类号： H01L21/3212 ,  C09G1/02 ,  C09K3/1463 ,  H01L21/31053 ,  Y10S977/775 ,  Y10S977/888

    摘要： It is an object of the present invention to provide an aqueous dispersion and CMP slurry that can achieve polishing at an adequate rate without producing scratches in the polishing surfaces of wafer working films, and a polishing process for wafer surfaces and a process for manufacture of a semiconductor device using them. A CMP slurry and the like of the present invention contains polymer particles with a crosslinked structure and a mean particle size of 0.13-0.8 &mgr;m. The CMP slurry may contain no surfactant, and may contain the surfactant of not greater than 0.15 wt %. A CMP slurry and the like of another present invention contains polymer particles and inorganic particles of silica, aluminum and the like. A mean particle size of the polymer particles may be not greater than a mean particle size of the inorganic particles. And the mean particle size of the inorganic coagulated particles may be 0.1-1.0 &mgr;m, and may be smaller than the mean particle size of the polymer particles. The CMP slurry is used as a polishing agent and a working film of a silicon oxide film, an aluminum film, a tungsten film or a copper film formed on a wafer is polished. And a semiconductor device is manufactured by using the CMP slurry.

    摘要翻译： 本发明的目的是提供一种水分散体和CMP浆料，其可以以足够的速率实现抛光，而不会在晶片工作薄膜的抛光表面中产生划痕，以及用于晶片表面的抛光工艺和制造 半导体器件使用它们。 本发明的CMP浆料等含有交联结构，平均粒径为0.13〜0.8μm的聚合物粒子。 CMP浆料可以不含表面活性剂，并且可以含有不大于0.15重量％的表面活性剂。 另一个本发明的CMP浆料等含有聚合物颗粒和二氧化硅，铝等的无机颗粒。 聚合物颗粒的平均粒径可以不大于无机颗粒的平均粒度。 无机凝结粒子的平均粒径可以为0.1〜1.0μm，并且可以小于聚合物粒子的平均粒径。 将CMP浆料用作抛光剂，并且研磨在晶片上形成的氧化硅膜，铝膜，钨膜或铜膜的工作膜。 并且通过使用CMP浆料制造半导体器件。

    Semiconductor device using damascene technique and manufacturing method therefor
    9.
    发明申请
    Semiconductor device using damascene technique and manufacturing method therefor 审中-公开
    使用镶嵌技术的半导体器件及其制造方法

    公开(公告)号：US20060084273A1

    公开(公告)日：2006-04-20

    申请号：US11270505

    申请日：2005-11-10

    申请人： Yusuke Kohyama ,  Nobuo Hayasaka ,  Katsuya Okumura

    发明人： Yusuke Kohyama ,  Nobuo Hayasaka ,  Katsuya Okumura

    IPC分类号： H01L21/311

    CPC分类号： H01L27/10873 ,  H01L21/28061 ,  H01L21/76897 ,  H01L21/823425 ,  H01L21/823437 ,  H01L27/10861 ,  H01L27/10885 ,  H01L27/10888 ,  H01L29/4941 ,  H01L29/66545 ,  H01L29/6656

    摘要： A gate insulation film is formed on a semiconductor substrate, gate electrodes are formed on the gate insulation film, and source/drain diffusion layers are formed. A silicon nitride films is formed on a side wall of the gate electrodes, a silicon oxide film is formed on the overall surface, and the silicon oxide film is etched back to have the same height as that of the gate electrodes so that the surface is flattened, and then the surface of the gate electrodes are etched by a predetermined thickness to form a first stepped portion from the silicon oxide film, the first stepped portion is filled up by a tungsten film, the surface of the tungsten film is etched by a predetermined thick ness so that a second stepped portion is formed, and then the second stepped portion is filled by a silicon nitride films.

    摘要翻译： 在半导体基板上形成栅极绝缘膜，在栅极绝缘膜上形成栅电极，形成源极/漏极扩散层。 在栅电极的侧壁上形成氮化硅膜，在整个表面上形成氧化硅膜，并将氧化硅膜回蚀刻成具有与栅电极相同的高度，使得表面为 然后将栅电极的表面蚀刻预定厚度，从氧化硅膜形成第一台阶部分，第一台阶部分被钨膜填充，钨膜的表面被 形成预定的厚度，从而形成第二台阶部分，然后用氮化硅膜填充第二台阶部分。