利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

22 条记录 (耗时 0.03 秒)

    Semiconductor device having through silicon via (TSV)
    6.
    发明授权
    Semiconductor device having through silicon via (TSV) 有权
    具有硅通孔（TSV）的半导体器件

    公开(公告)号：US08564102B2

    公开(公告)日：2013-10-22

    申请号：US13108231

    申请日：2011-05-16

    申请人： Ju-il Choi ,  Jae-hyun Phee ,  Kyu-ha Lee ,  Ho-jin Lee ,  Son-kwan Hwang

    发明人： Ju-il Choi ,  Jae-hyun Phee ,  Kyu-ha Lee ,  Ho-jin Lee ,  Son-kwan Hwang

    IPC分类号： H01L29/40 ,  H01L23/48 ,  H01L23/52

    CPC分类号： H01L21/76879 ,  H01L21/76844 ,  H01L21/76873 ,  H01L21/76898 ,  H01L24/05 ,  H01L24/06 ,  H01L2224/05009 ,  H01L2224/06181

    摘要： A semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes an interlayer insulation layer pattern, a metal wire pattern exposed by a passage formed by a via hole formed in the interlayer insulation layer pattern to input and output an electrical signal, and a plated layer pattern directly contacting the metal wire pattern and filling the via hole. The method includes forming an interlayer insulation layer having a metal wire pattern to input and output an electrical signal formed therein, forming a via hole to define a passage that extends through the interlayer insulation layer until at least a part of the metal wire pattern is exposed, and forming a plated layer pattern to fill the via hole and to directly contact the metal wire pattern by using the metal wire pattern exposed through the via hole as a seed metal layer.

    摘要翻译： 半导体器件和半导体器件的制造方法。 半导体器件包括层间绝缘层图案，由形成在层间绝缘层图案中的通孔形成的通道暴露的金属线图案，以输入和输出电信号，以及直接接触金属线图案的镀层图案和 填充通孔。 该方法包括形成具有金属线图案的层间绝缘层，以输入和输出其中形成的电信号，形成通孔以限定延伸穿过层间绝缘层的通道，直到金属线图案的至少一部分露出 并且形成镀层图案以填充通孔并且通过使用通过通孔露出的金属线图案作为种子金属层直接接触金属线图案。

    Multi-Chip Package Having Semiconductor Chips Of Different Thicknesses From Each Other And Related Device
    8.
    发明申请
    Multi-Chip Package Having Semiconductor Chips Of Different Thicknesses From Each Other And Related Device 有权
    具有彼此不同厚度的半导体芯片和相关器件的多芯片封装

    公开(公告)号：US20110193229A1

    公开(公告)日：2011-08-11

    申请号：US13013290

    申请日：2011-01-25

    申请人： Keum-Hee Ma ,  Woo-Dong Lee ,  Min-Seung Yoon ,  Ju-il Choi ,  Sang-Sick Park ,  Son-Kwan Hwang

    发明人： Keum-Hee Ma ,  Woo-Dong Lee ,  Min-Seung Yoon ,  Ju-il Choi ,  Sang-Sick Park ,  Son-Kwan Hwang

    IPC分类号： H01L23/48

    CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L21/563 ,  H01L23/481 ,  H01L23/49816 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555

    摘要： A semiconductor device having semiconductor chips of different thicknesses is provided. The semiconductor device may include a first semiconductor chip, a sub-board on a first side of the first semiconductor chip, at least one second semiconductor chip on a second side of the first semiconductor chip, at least one external contact terminal on the at least one second semiconductor chip. In example embodiments the at least one second semiconductor chip may include a plurality of through silicon vias and the at least one external contact terminal may be in electrical contact with the first semiconductor chip and the at least one second semiconductor chip via the plurality of through silicon vias. In example embodiments, the at least one second semiconductor chip may be thinner than the first semiconductor chip.

    摘要翻译： 提供具有不同厚度的半导体芯片的半导体器件。 半导体器件可以包括第一半导体芯片，在第一半导体芯片的第一侧上的子板，在第一半导体芯片的第二侧上的至少一个第二半导体芯片，至少一个外部接触端子 一秒钟的半导体芯片。 在示例实施例中，所述至少一个第二半导体芯片可以包括多个通孔硅通孔，并且所述至少一个外部接触端子可以经由多个通孔与第一半导体芯片和至少一个第二半导体芯片电接触 通孔 在示例实施例中，至少一个第二半导体芯片可以比第一半导体芯片更薄。