公开(公告)号：US20150126009A1

公开(公告)日：2015-05-07

申请号：US14590327

申请日：2015-01-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KANGGUO CHENG ,  BRUCE B. DORIS ,  POUYA HASHEMI ,  ALI KHAKIFIROOZ

IPC: H01L29/66 ,  H01L21/02

CPC classification number: H01L29/66795 ,  H01L21/02494 ,  H01L21/02587 ,  H01L29/7853

Abstract: A method for forming a U-shaped semiconductor device includes growing a U-shaped semiconductor material along sidewalls and bottoms of trenches, which are formed in a crystalline layer. The U-shaped semiconductor material is anchored, and the crystalline layer is removed. Backfilling is formed underneath the U-shaped semiconductor material with a dielectric material for support. A semiconductor device is formed with the U-shaped semiconductor material.

Abstract translation: 形成U型半导体器件的方法包括沿形成在晶体层中的沟槽的侧壁和底部生长U形半导体材料。 U型半导体材料被锚固，并且去除晶体层。 在具有用于支撑的电介质材料的U形半导体材料下形成回填。 半导体器件由U形半导体材料形成。

公开(公告)号：US20150303251A1

公开(公告)日：2015-10-22

申请号：US14732705

申请日：2015-06-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KANGGUO CHENG ,  POUYA HASHEMI ,  ALI KHAKIFIROOZ ,  ALEXANDER REZNICEK

IPC: H01L29/06 ,  H01L29/22 ,  H01L29/267 ,  H01L29/205

CPC classification number: H01L29/0649 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02463 ,  H01L21/0251 ,  H01L21/02546 ,  H01L21/02565 ,  H01L21/76251 ,  H01L21/76254 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/22 ,  H01L29/267

Abstract: A structure includes a handle substrate and an epitaxial oxide layer. The epitaxial oxide layer is bonded directly or indirectly to the handle substrate. Also included is a compound semiconductor layer adjoining and lattice matched to the epitaxial oxide layer.

Abstract translation: 一种结构包括手柄基板和外延氧化物层。 外延氧化物层直接或间接地结合到处理衬底上。 还包括与外延氧化物层相邻并晶格匹配的化合物半导体层。

公开(公告)号：US20190341314A1

公开(公告)日：2019-11-07

申请号：US15969252

申请日：2018-05-02

Applicant: International Business Machines Corporation

Inventor： TAKASHI ANDO ,  CHOONGHYUN LEE ,  JINGYUN ZHANG ,  POUYA HASHEMI

IPC: H01L21/8238 ,  H01L21/28 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78

Abstract: A method of fabricating a semiconductor device includes providing a high-k dielectric layer arranged on a channel region including a first transistor area and a second transistor area. The method further includes depositing a multivalent oxide layer directly on the high-k dielectric layer of the first transistor area. The method includes depositing a first work function metal on the multivalent oxide layer of the first transistor area and directly on the high-k dielectric layer of the second transistor area.

公开(公告)号：US20170154961A1

公开(公告)日：2017-06-01

申请号：US15154606

申请日：2016-05-13

Applicant: International Business Machines Corporation

Inventor： KARTHIK BALAKRISHNAN ,  KANGGUO CHENG ,  POUYA HASHEMI ,  ALEXANDER REZNICEK

IPC: H01L29/06 ,  H01L21/308 ,  H01L21/324 ,  H01L29/165 ,  H01L21/02

CPC classification number: H01L21/02694 ,  H01L21/02164 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/28255 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/32055 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76283 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267 ,  H01L29/7378 ,  H01L29/7848 ,  H01L29/785 ,  H01L31/1816 ,  H01L2924/10271

Abstract: A semiconductor device comprising a substrate having a region protruding from the substrate surface; a relaxed semiconductor disposed on the region; an additional semiconductor disposed on the relaxed semiconductor; and low density dielectric disposed next to and at least partially underneath the relaxed semiconductor and adjacent to the protruding region of the substrate.

公开(公告)号：US20170154775A1

公开(公告)日：2017-06-01

申请号：US15258144

申请日：2016-09-07

Applicant: International Business Machines Corporation

Inventor： KARTHIK BALAKRISHNAN ,  KANGGUO CHENG ,  POUYA HASHEMI ,  ALEXANDER REZNICEK

IPC: H01L21/02 ,  H01L21/3105 ,  H01L21/324 ,  H01L21/3065 ,  H01L21/308

CPC classification number: H01L21/02694 ,  H01L21/02164 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/28255 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/32055 ,  H01L21/324 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76283 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/267 ,  H01L29/7378 ,  H01L29/7848 ,  H01L29/785 ,  H01L31/1816 ,  H01L2924/10271

Abstract: A semiconductor device comprising a substrate having a region protruding from the substrate surface; a relaxed semiconductor disposed on the region; an additional semiconductor disposed on the relaxed semiconductor; and low density dielectric disposed next to and at least partially underneath the relaxed semiconductor and adjacent to the protruding region of the substrate.

公开(公告)号：US20160379981A1

公开(公告)日：2016-12-29

申请号：US14750455

申请日：2015-06-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KARTHIK BALAKRISHNAN ,  KANGGUO CHENG ,  POUYA HASHEMI ,  ALEXANDER REZNICEK

IPC: H01L27/092 ,  H01L21/8238

CPC classification number: H01L27/0924 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823892 ,  H01L27/0928 ,  H01L29/66795 ,  H01L29/7849

Abstract: A finned structure is fabricated using a bulk silicon substrate having a carbon-doped epitaxial silicon germanium layer. A pFET region of the structure includes fins having silicon germanium top portions and an epitaxial carbon-doped silicon germanium diffusion barrier that suppresses dopant diffusion from the underlying n-well into the silicon germanium fin region during device fabrication. The structure further includes an nFET region including silicon fins formed from the substrate. The carbon-doped silicon germanium diffusion barrier has the same or higher germanium content than the silicon germanium fins.

Abstract translation: 使用具有碳掺杂外延硅锗层的体硅衬底制造翅片结构。 该结构的pFET区域包括具有硅锗顶部部分的散热片和外延碳掺杂硅锗扩散势垒，其在器件制造期间抑制掺杂剂从底层n阱扩散到硅锗鳍区域。 该结构还包括nFET区域，其包括从该衬底形成的硅散热片。 碳掺杂硅锗扩散阻挡层具有与硅锗鳍相同或更高的锗含量。

公开(公告)号：US20200083113A1

公开(公告)日：2020-03-12

申请号：US16680682

申请日：2019-11-12

Applicant: International Business Machines Corporation

Inventor： Takashi Ando ,  Choonghyun Lee ,  Jingyun Zhang ,  POUYA HASHEMI

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/51 ,  H01L29/49 ,  H01L29/78 ,  H01L21/28

Abstract: A method of fabricating a semiconductor device includes providing a high-k dielectric layer arranged on a channel region including a first transistor area and a second transistor area. The method further includes depositing a multivalent oxide layer directly on the high-k dielectric layer of the first transistor area. The method includes depositing a first work function metal on the multivalent oxide layer of the first transistor area and directly on the high-k dielectric layer of the second transistor area.

公开(公告)号：US20170179251A1

公开(公告)日：2017-06-22

申请号：US15293572

申请日：2016-10-14

Applicant: International Business Machines Corporation

Inventor： KARTHIK BALAKRISHNAN ,  POUYA HASHEMI ,  SANGHOON LEE

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L29/06

CPC classification number: H01L21/845 ,  H01L21/02381 ,  H01L21/02428 ,  H01L21/02433 ,  H01L21/02538 ,  H01L21/02639 ,  H01L21/30604 ,  H01L21/30612 ,  H01L21/3081 ,  H01L21/31056 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/66522 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/6681 ,  H01L29/7853 ,  H01L29/78654 ,  H01L29/78681 ,  H01L29/78696

Abstract: A method for forming a nanowire device comprises depositing a hard mask on portions of a silicon substrate having a orientation wherein the hard mask is oriented in the direction, etching the silicon substrate to form a mandrel having (111) faceted sidewalls; forming a layer of insulator material on the substrate; forming a sacrificial stack comprising alternating layers of sacrificial material and dielectric material disposed on the layer of insulator material and adjacent to the mandrel; patterning and etching the sacrificial stack to form a modified sacrificial stack adjacent to the mandrel and extending from the mandrel; removing the sacrificial material from the modified sacrificial stack to form growth channels; epitaxially forming semiconductor in the growth channels; and etching the semiconductor to align with the end of the growth channels and form a semiconductor stack comprising alternating layers of dielectric material and semiconductor material.

公开(公告)号：US20170170277A1

公开(公告)日：2017-06-15

申请号：US15175609

申请日：2016-06-07

Applicant: International Business Machines Corporation

Inventor： KARTHIK BALAKRISHNAN ,  KANGGUO CHENG ,  POUYA HASHEMI ,  ALEXANDER REZNICEK

IPC: H01L29/10 ,  H01L29/78 ,  H01L29/16 ,  H01L21/02 ,  H01L29/20 ,  H01L29/66 ,  H01L21/311 ,  H01L29/06 ,  H01L29/161

CPC classification number: H01L29/1037 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02647 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/845 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device comprising a substrate, an base layer disposed on the substrate having a thickness C in first area and a thickness B in a second area and a hole extending to the substrate filled with semiconductor, a first semiconductor fin disposed on the first area and having a height A, and a second semiconductor fin disposed on the second area and having a height D, wherein (A+C)=(B+D).

公开(公告)号：US20150041853A1

公开(公告)日：2015-02-12

申请号：US13965178

申请日：2013-08-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KANGGUO CHENG ,  POUYA HASHEMI ,  ALI KHAKIFIROOZ ,  ALEXANDER REZNICEK

IPC: H01L29/20 ,  H01L21/02 ,  H01L29/22 ,  H01L21/762

CPC classification number: H01L29/0649 ,  H01L21/02002 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02463 ,  H01L21/0251 ,  H01L21/02546 ,  H01L21/02565 ,  H01L21/76251 ,  H01L21/76254 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/22 ,  H01L29/267

Abstract: A structure including a compound semiconductor layer epitaxially grown on an epitaxial oxide layer is provided wherein the lattice constant of the epitaxial oxide layer may be different from the semiconductor substrate on which it is grown. Fabrication of one structure includes growing a graded semiconductor layer stack to engineer a desired lattice parameter on a semiconductor substrate or layer. The desired compound semiconductor layer is formed on the graded layer. The epitaxial oxide layer is grown on and lattice matched to the desired layer. Fabrication of an alternative structure includes growing a layer of desired compound semiconductor material directly on a germanium substrate or a germanium layer formed on a silicon substrate and growing an epitaxial oxide layer on the layer of the desired material. Following implantation of a cleavage layer and wafer bonding to a handle wafer, the layer of desired compound semiconductor material is fractured along the cleavage layer and the residual portion thereof removed. A layer of the desired compound semiconductor material is then regrown on the epitaxial oxide layer.

Abstract translation: 提供包括在外延氧化物层上外延生长的化合物半导体层的结构，其中外延氧化物层的晶格常数可以不同于其生长的半导体衬底。 一种结构的制造包括生长渐变半导体层堆叠以在半导体衬底或层上工程化所需的晶格参数。 所需的化合物半导体层形成在渐变层上。 外延氧化物层生长并与所需层晶格匹配。 替代结构的制造包括直接在锗衬底或形成在硅衬底上的锗层上生长所需化合物半导体材料层，并在所需材料层上生长外延氧化物层。 在将切割层和晶片结合植入到处理晶片之后，期望的化合物半导体材料层沿着切割层断裂，并且其残留部分被去除。 然后将所需化合物半导体材料的层再生长在外延氧化物层上。