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    Method of planarizing thin film layers deposited over a common circuit base
    2.
    发明授权
    Method of planarizing thin film layers deposited over a common circuit base 失效
    在公共电路基底上沉积薄膜层的平面化方法

    公开(公告)号：US6165892A

    公开(公告)日：2000-12-26

    申请号：US127580

    申请日：1998-07-31

    申请人： David J. Chazan ,  Ted T. Chen ,  Todd S. Kaplan ,  James L. Lykins ,  Michael P. Skinner ,  Jan I. Strandberg

    发明人： David J. Chazan ,  Ted T. Chen ,  Todd S. Kaplan ,  James L. Lykins ,  Michael P. Skinner ,  Jan I. Strandberg

    IPC分类号： H01L21/48 ,  H01L23/538 ,  H05K1/02 ,  H05K3/00 ,  H05K3/46 ,  H01L21/4763

    CPC分类号： H05K3/4673 ,  H01L21/481 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K3/0023 ,  H05K3/0032 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0585 ,  H05K2203/0759 ,  H05K2203/1476 ,  H01L2924/00

    摘要： A method for forming a planarized thin film dielectric film on a surface of a common circuit base upon which one or more integrated circuits are to be attached. The common circuit base includes raised features formed over its surface such that the raised features define a trench area between them. The method includes the steps of forming a first layer of the dielectric film over the common circuit base and over the raised features and the trench, then patterning the newly formed layer to remove portions of the layer formed over the raised features and expose the raised features. After the layer is patterned, formation of the dielectric film is completed by forming a second layer of the dielectric film over the patterned first layer. Additional film deposition and film patterning steps are performed to complete the layout of a thin film interconnect structure over said common circuit base, and an integrated circuit die is attached to the common circuit base and electrically connecting to the thin film interconnect structure. In a preferred embodiment, the first and second layers of the dielectric film are both formed from a photo-definable material and the patterning step includes exposing the first layer to light through a patterned mask corresponding to the raised features and developing the exposed layer with a developing solution to etch away portions of the first layer formed over the raised features.

    摘要翻译： 一种用于在公共电路基底的表面上形成平坦化的薄膜电介质膜的方法，一个或多个集成电路将安装在该公共电路基底上。 公共电路基座包括在其表面上形成的凸起特征，使得凸起特征在它们之间限定沟槽区域。 该方法包括以下步骤：在公共电路基底上方和凸起的特征​​和沟槽上形成电介质膜的第一层，然后对新形成的层进行图案化以去除在凸起特征上形成的层的部分，并暴露凸起特征 。 在层被图案化之后，通过在图案化的第一层上形成电介质膜的第二层来完成电介质膜的形成。 执行附加的膜沉积和膜图案化步骤以在所述公共电路基底上完成薄膜互连结构的布局，并且集成电路管芯附接到公共电路基座并电连接到薄膜互连结构。 在优选实施例中，电介质膜的第一和第二层都由光可定义材料形成，并且图案化步骤包括通过对应于凸起特征的图案化掩模将第一层暴露于光，并将曝光层用 显影溶液以蚀刻形成在凸起特征上的第一层的部分。

    Wiring substrate features having controlled sidewall profiles
    3.
    发明授权
    Wiring substrate features having controlled sidewall profiles 失效
    具有受控侧壁轮廓的布线基板特征

    公开(公告)号：US06548224B1

    公开(公告)日：2003-04-15

    申请号：US09519961

    申请日：2000-03-07

    申请人： Ted T. Chen ,  Michael P. Skinner

    发明人： Ted T. Chen ,  Michael P. Skinner

    IPC分类号： G03F900

    CPC分类号： G03F1/36 ,  H05K3/0023 ,  H05K3/0082 ,  H05K3/4602 ,  H05K2201/09827 ,  H05K2203/056

    摘要： A dielectric layer in a wiring substrate having a sloped sidewall. A photomask used to pattern the dielectric layer includes optical proximity features. The size and spacing of the optical proximity features are generally less than the resolution limit of the exposure tool used and do not print out on the layer. The optical proximity features provide a transition region between fully exposed material and un-exposed material, which results in a sloped sidewall of the photo-sensitive material after development. The sloped sidewall provides a more reliable thin film metal layer to contact through vias, and may be used to conserve wiring board area by allowing smaller via spacing.

    摘要翻译： 具有倾斜侧壁的布线基板中的介电层。 用于图案化电介质层的光掩模包括光学邻近特征。 光学接近特征的尺寸和间距通常小于使用的曝光工具的分辨率极限，并且不会在层上打印出来。 光学接近特征提供在完全暴露的材料和未暴露的材料之间的过渡区域，这导致显影后光敏材料的倾斜的侧壁。 倾斜的侧壁提供了更可靠的薄膜金属层以通过通孔接触，并且可以通过允许更小的通孔间隔来用于节省布线板面积。

    Polycarbonate-containing liquid chemical formulation and methods for making and using polycarbonate film
    4.
    发明授权
    Polycarbonate-containing liquid chemical formulation and methods for making and using polycarbonate film 失效
    含聚碳酸酯的液体化学配方及制造和使用聚碳酸酯膜的方法

    公开(公告)号：US06500885B1

    公开(公告)日：2002-12-31

    申请号：US09430799

    申请日：1999-10-29

    申请人： John D. Porter ,  Michael P. Skinner ,  Stephanie Simmons

    发明人： John D. Porter ,  Michael P. Skinner ,  Stephanie Simmons

    IPC分类号： C08K534

    CPC分类号： C08J3/096 ,  C08J3/09 ,  C08J3/091 ,  C08J5/18 ,  C08J2369/00 ,  C08K5/3415 ,  H01J9/025 ,  H01J2329/00 ,  C08L69/00

    摘要： A liquid chemical formulation suitable for making a thin solid polycarbonate film contains polycarbonate material and a liquid typically capable of dissolving the polycarbonate material to a concentration of at least 1%. The polycarbonate material may consist of homopolycarbonate or/and copolycarbonate. Examples of the liquid include pyridine, a ring-substituted pyridine derivative, pyrrole, a ring-substituted pyrrole derivative, pyrrolidine, a pyrrolidine derativive, chlorobenzene, and cyclohexanone. A liquid film (36A) of the formulation is formed over a substructure (30) and processed to remove the liquid. The resultant solid polycarbonate film can later serve as a track layer through which charged particles (70) are passed to form charged-particle tracks (72). Apertures (74) are created through the track layer by a process that entails etching along the tracks. The aperture-containing polycarbonate track layer is typically used in fabricating a gated electron-emitting device.

    摘要翻译： 适用于制备薄固体聚碳酸酯薄膜的液体化学制剂含有聚碳酸酯材料和通常能够将聚碳酸酯材料溶解至少1％浓度的液体。 聚碳酸酯材料可以由均聚碳酸酯或/和共聚碳酸酯组成。 液体的实例包括吡啶，环取代的吡啶衍生物，吡咯，环取代的吡咯衍生物，吡咯烷，吡咯烷衍生物，氯苯和环己酮。 制剂的液体膜（36A）形成在子结构（30）上并被处理以除去液体。 所得的固体聚碳酸酯膜随后可以用作通过带电粒子（70）形成带电粒子轨迹（72）的轨道层。 通过沿着轨道进行蚀刻的过程，通过轨道层创建孔径（74）。 含孔聚碳酸酯轨道层通常用于制造门控电子发射器件。