公开(公告)号：US20110108993A1

公开(公告)日：2011-05-12

申请号：US12805334

申请日：2010-07-26

申请人： Joon Seok Kang ,  Young Do Kweon ,  Seung Wook Park ,  Jong Yun Lee ,  Kyung Seob Oh

发明人： Joon Seok Kang ,  Young Do Kweon ,  Seung Wook Park ,  Jong Yun Lee ,  Kyung Seob Oh

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/0231 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K1/185 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2924/00

摘要： There is provided a semiconductor package including: a circuit board having a receiving space formed therein; a semiconductor chip inserted into the receiving space of the circuit board; and an electrode pattern portion having a pattern shape on one surface of the semiconductor chip, and directly contacting a via portion of the circuit board so as to be electrically connected thereto.

摘要翻译： 提供一种半导体封装，包括：电路板，其中形成有容纳空间; 插入电路板的接收空间中的半导体芯片; 以及在半导体芯片的一个表面上具有图案形状的电极图形部分，并且与电路板的通孔部分直接接触以与其电连接。

公开(公告)号：US20090166859A1

公开(公告)日：2009-07-02

申请号：US12078049

申请日：2008-03-26

申请人： Jingli Yuan ,  Young Do Kweon ,  Jong Hwan Baek ,  Joon Seok Kang ,  Seung Wook Park ,  Jong Yun Lee

发明人： Jingli Yuan ,  Young Do Kweon ,  Jong Hwan Baek ,  Joon Seok Kang ,  Seung Wook Park ,  Jong Yun Lee

IPC分类号： H01L23/488 ,  H01L21/44

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02313 ,  H01L2224/02351 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0332 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/0579 ,  H01L2224/058 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

摘要： Provided is a semiconductor device including a wafer having an electrode pad; an insulating layer that is formed on the wafer and has an exposure hole formed in one side thereof, the exposure layer exposing the electrode pad, and a support post formed in the other side, the support post having a buffer groove; a redistribution layer that is formed on the top surface of the insulating layer and has one end connected to the electrode pad and the other end extending to the support post; an encapsulation layer that is formed on the redistribution layer and the insulating layer and exposes the redistribution layer formed on the support post; and a solder bump that is provided on the exposed portion of the redistribution layer.

摘要翻译： 提供一种半导体器件，其包括具有电极焊盘的晶片; 绝缘层，其形成在所述晶片上并且具有形成在其一侧的曝光孔，所述曝光层暴露所述电极焊盘;以及支撑柱，形成在所述另一侧，所述支撑柱具有缓冲槽; 形成在所述绝缘层的顶表面上并且一端连接到所述电极焊盘并且另一端延伸到所述支撑柱的再分布层; 形成在再分配层和绝缘层上并且暴露形成在支撑柱上的再分布层的封装层; 以及设置在再分配层的暴露部分上的焊料凸块。

公开(公告)号：US20090302468A1

公开(公告)日：2009-12-10

申请号：US12232252

申请日：2008-09-12

申请人： Jong Hwan Baek ,  Sung Yi ,  Young Do Kweon ,  Jong Yun Lee ,  Hyung Jin Jeon ,  Joon Seok Kang

发明人： Jong Hwan Baek ,  Sung Yi ,  Young Do Kweon ,  Jong Yun Lee ,  Hyung Jin Jeon ,  Joon Seok Kang

IPC分类号： H01L23/488 ,  H01L21/56

CPC分类号： H05K3/3436 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/3463 ,  H05K2201/10992 ,  Y02P70/613 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00 ,  H01L2924/00014

摘要： Disclosed is a printed circuit board including a semiconductor chip, which includes a semiconductor chip having a connection pad, which is exposed, on the upper surface thereof, a first solder ball formed on the connection pad and having a first melting point, a printed circuit board having an external connection terminal formed at the outermost circuit layer thereof, and a second solder ball formed on the external connection terminal, connected to the first solder ball, and having a second melting point higher than the first melting point. In the printed circuit board including a semiconductor chip, the distance between the printed circuit board and the semiconductor chip is increased, thus realizing high resistance to flexure due to the difference in thermal expansion coefficient between the printed circuit board and the semiconductor chip.

摘要翻译： 公开了一种印刷电路板，其包括半导体芯片，该半导体芯片包括具有连接焊盘的半导体芯片，该连接焊盘在其上表面上露出形成在连接焊盘上并具有第一熔点的第一焊球，印刷电路 板上具有形成在其最外侧电路层的外部连接端子，和形成在外部连接端子上的第二焊球，与第一焊球相连，并具有高于第一熔点的第二熔点。 在包括半导体芯片的印刷电路板中，印刷电路板和半导体芯片之间的距离增加，由于印刷电路板和半导体芯片之间的热膨胀系数的差异，实现了高抗弯曲性。

公开(公告)号：US08334602B2

公开(公告)日：2012-12-18

申请号：US12547284

申请日：2009-08-25

申请人： Joon Seok Kang ,  Young Do Kweon ,  Hong Won Kim ,  Jingli Yuan

发明人： Joon Seok Kang ,  Young Do Kweon ,  Hong Won Kim ,  Jingli Yuan

IPC分类号： H01L29/72

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3171 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00

摘要： Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized.

摘要翻译： 本文公开了一种包括封装模具的模具封装，包括：一个模具，其在其一侧包括焊盘; 覆盖所述管芯的侧面的封装层; 覆盖该封装层和该芯片的一侧的支撑层; 钝化层，形成在所述管芯的另一侧上，使得所述焊盘暴露在其中; 以及形成在钝化层上的再分配层，使得其一部分与焊盘连接。 这里，由于模具的一侧由支撑层支撑，并且仅在模具的侧面形成封装层，所以能够将由于热膨胀系数的差异导致的模具封装的翘曲最小化。

公开(公告)号：US08110914B2

公开(公告)日：2012-02-07

申请号：US12318752

申请日：2009-01-07

申请人： Joon Seok Kang ,  Sung Yi ,  Young Do Kweon

发明人： Joon Seok Kang ,  Sung Yi ,  Young Do Kweon

IPC分类号： H01L23/498 ,  H01L21/78

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L21/568 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/00

摘要： A wafer level package includes a chip, a removable resin layer, a molding material, a dielectric layer, redistribution lines and a solder resist. The removable resin layer is formed to surround side surfaces and a lower surface of the chip. The molding material is formed on the lower surface of the removable resin layer. The dielectric layer is formed over the removable resin layer including the chip and having via holes to expose portions of the chip. The redistribution lines are formed on the dielectric layer including insides of the via holes to be connected to the chip. The solder resist layer is formed on the dielectric layer to expose portions of the redistribution lines.

摘要翻译： 晶片级封装包括芯片，可移除树脂层，成型材料，电介质层，再分布线和阻焊剂。 可移除树脂层形成为围绕芯片的侧表面和下表面。 成型材料形成在可移除树脂层的下表面上。 电介质层形成在包括芯片的可移除树脂层上，并且具有通孔以暴露芯片的部分。 再分配线形成在包括要连接到芯片的通孔的内部的电介质层上。 在电介质层上形成阻焊层以暴露再分布线的部分。

公开(公告)号：US08283768B2

公开(公告)日：2012-10-09

申请号：US12424514

申请日：2009-04-15

申请人： Joon Seok Kang ,  Sung Yi ,  Young Do Kweon

发明人： Joon Seok Kang ,  Sung Yi ,  Young Do Kweon

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/4334 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01073 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.

摘要翻译： 这里公开了用于散热的晶片级封装及其制造方法。 晶片级封装包括包括空腔和孔的散热板，包括以面朝上的方式设置在散热板的空腔中的焊盘的模具，设置在模具和内壁之间的导热粘合剂 空腔并设置在孔中，并且再分配层在一端连接到垫并且在另一端延伸。 晶圆级封装保护模具免受外部环境的影响，使模具能够轻松地与散热板齐平。

公开(公告)号：US08026590B2

公开(公告)日：2011-09-27

申请号：US12581131

申请日：2009-10-17

申请人： Joon Seok Kang ,  Young Ho Kim ,  Young Do Kweon ,  Jin Gu Kim ,  Sung Yi

发明人： Joon Seok Kang ,  Young Ho Kim ,  Young Do Kweon ,  Jin Gu Kim ,  Sung Yi

IPC分类号： H01L23/488 ,  H01L21/58

CPC分类号： H01L21/561 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2924/00

摘要： Disclosed herein are a die package and a method of manufacturing the die package. A solder layer is formed on a lower surface of a die. The die is self-aligned and attached to a support plate using surface tension between the solder layer and a metal layer of the support plate, thus reducing attachment lead time of the die.

摘要翻译： 这里公开了一种管芯封装和制造该封装的方法。 在模具的下表面上形成焊料层。 使用焊料层和支撑板的金属层之间的表面张力将模具自对准并附接到支撑板，从而减少模具的附着时间。

公开(公告)号：US08351215B2

公开(公告)日：2013-01-08

申请号：US12320523

申请日：2009-01-28

申请人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

发明人： Hong Won Kim ,  Sung Yi ,  Tae Sung Jeong ,  Joon Seok Kang

IPC分类号： H05K3/00

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/10674 ,  H05K2203/1469 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49155

摘要： The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

摘要翻译： 芯片嵌入式印刷电路板及其制造方法技术领域本发明涉及一种嵌入式芯片的印刷电路板及其制造方法。 本发明提供了一种芯片嵌入式印刷电路板，其包括嵌入在上部设置有柱的芯片的绝缘层，通过绝缘层形成的通孔，形成在要连接到柱的绝缘层的上部的上部图案， 形成在绝缘层的与通孔连接的下部的通孔和下部图案及其制造方法。

公开(公告)号：US20090321118A1

公开(公告)日：2009-12-31

申请号：US12230874

申请日：2008-09-05

申请人： Woon Chun Kim ,  Soon Gyu Yim ,  Joon Seok Kang

发明人： Woon Chun Kim ,  Soon Gyu Yim ,  Joon Seok Kang

IPC分类号： H05K1/16 ,  H05K3/30

CPC分类号： H05K1/0203 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/92144 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H05K3/284 ,  H05K2201/1056 ,  H05K2201/10674 ,  Y10T29/4913 ,  Y10T29/49139 ,  H01L2924/00

摘要： An electronic component embedded printed circuit board and a manufacturing method thereof. The electronic component embedded printed circuit board includes an insulating layer forming a core layer; an electronic component inserted to project a part thereof on an upper part of the insulating layer; a metallic seed layer formed on the insulating layer including a projected surface of the electronic component; a plating layer formed on the metallic seed layer; circuit patterns electrically connected to pads of the electronic component through via-holes formed on the insulating layer; and a solder resist layer which is formed on the insulating layer and has solder balls attached onto the via-holes electrically connected to the circuit patterns. In the electronic component embedded printed circuit board, a heat radiation characteristic can be maximized and a thickness of the printed circuit board can be minimized. In case that the insulating is made of a thermoplastic resin, the electronic component can be reutilized, thereby saving product cost.

摘要翻译： 一种电子部件嵌入式印刷电路板及其制造方法。 电子部件嵌入式印刷电路板包括形成芯层的绝缘层; 被插入以将其部分投影在绝缘层的上部上的电子部件; 形成在绝缘层上的金属种子层，包括电子部件的投影表面; 形成在所述金属种子层上的镀层; 电路图案通过形成在绝缘层上的通孔电连接到电子部件的焊盘; 以及阻焊层，其形成在绝缘层上并且具有附着到电连接到电路图案的通孔上的焊球。 在电子部件嵌入式印刷电路板中，可以使热辐射特性最大化，并且可以使印刷电路板的厚度最小化。 在绝热材料由热塑性树脂制成的情况下，电子部件可以再利用，从而节省产品成本。

公开(公告)号：US07113689B2

公开(公告)日：2006-09-26

申请号：US10606348

申请日：2003-06-26

申请人： Yoon Shik Hong ,  Young Gyu Lee ,  Sung Cheon Jung ,  Sang Kee Yoon ,  Hyun Kee Lee ,  Suk Kee Hong ,  Joon Seok Kang ,  Jung Hyun Lee

发明人： Yoon Shik Hong ,  Young Gyu Lee ,  Sung Cheon Jung ,  Sang Kee Yoon ,  Hyun Kee Lee ,  Suk Kee Hong ,  Joon Seok Kang ,  Jung Hyun Lee

IPC分类号： G02B6/00

CPC分类号： G02B6/353 ,  G02B6/266 ,  G02B6/35 ,  G02B6/3552 ,  G02B6/356 ,  G02B6/357 ,  G02B6/358 ,  G02B6/3582 ,  G02B6/3592 ,  G02B6/3594

摘要： An MEMS variable optical attenuator includes a substrate having a planar surface, a micro-electric actuator arranged on the planar surface of the substrate, a pair of coaxially aligned optical waveguides having a receiving end and a transmitting end, respectively, and an optical shutter movable to a predetermined position between the receiving end and the transmitting end of the optical waveguides, and driven by the micro-electric actuator. A surface layer is formed on the optical shutter, has reflectivity less than 80% so as to allow incident light beams to partially transmit thereinto, and further has a sufficient light extinction ratio, thereby extinguishing the partially transmitted light beams therein.

摘要翻译： MEMS可变光衰减器包括具有平面表面的基板，布置在基板的平面表面上的微电致动器，分别具有接收端和发射端的一对同轴对准的光波导，以及可移动的光闸 到光波导的接收端和发送端之间的预定位置，并由微电动致动器驱动。 表面层形成在光学快门上，具有小于80％的反射率，以便使入射光束部分地透射，并且还具有足够的消光比，由此熄灭其中部分透射的光束。