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    Silicon precursors to make ultra low-K films with high mechanical properties by plasma enhanced chemical vapor deposition
    7.
    发明授权
    Silicon precursors to make ultra low-K films with high mechanical properties by plasma enhanced chemical vapor deposition 有权
    通过等离子体增强化学气相沉积制备具有高机械性能的超低K膜的硅前体

    公开(公告)号：US07989033B2

    公开(公告)日：2011-08-02

    申请号：US12183915

    申请日：2008-07-31

    申请人： Kang Sub Yim ,  Alexandros T. Demos

    发明人： Kang Sub Yim ,  Alexandros T. Demos

    IPC分类号： C23C16/00 ,  B05D3/00 ,  B29C71/02 ,  B29C71/04 ,  C04B41/00 ,  C08J7/18

    CPC分类号： C23C16/401 ,  C23C16/56

    摘要： A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.

    摘要翻译： 提供了一种在基片上沉积低介电常数膜的方法。 低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积，然后对膜进行后处理以在膜中产生孔。 一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-（CH2）n-O-Si-的化合物。 本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。 低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

    Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay
    8.
    发明授权
    Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay 有权
    在电介质层中产生气隙以减少RC延迟的方法和装置

    公开(公告)号：US07879683B2

    公开(公告)日：2011-02-01

    申请号：US11869396

    申请日：2007-10-09

    申请人： Amir Al-Bayati ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang “David” Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

    发明人： Amir Al-Bayati ,  Alexandros T. Demos ,  Kang Sub Yim ,  Mehul Naik ,  Zhenjiang “David” Cui ,  Mihaela Balseanu ,  Meiyee (Maggie Le) Shek ,  Li-Qun Xia

    IPC分类号： H01L21/76

    CPC分类号： H01L21/7682 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/76825 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/76885

    摘要： A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

    摘要翻译： 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法，包括在衬底上沉积第一介电层，在第一介电层中形成沟槽，用导电材料填充沟槽，平坦化导电材料以暴露第一介电层， 在导电材料和暴露的第一电介质层上的阻挡膜，在介电阻挡膜上沉积硬掩模层，在介电阻挡膜和硬掩模层中形成图案，以暴露衬底的选定区域，氧化至少一部分 在衬底的选定区域中的第一介电层，去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽，以及在反向沟槽中形成气隙，同时在反向沟槽中沉积第二电介质材料。