公开(公告)号：US6128459A

公开(公告)日：2000-10-03

申请号：US972413

申请日：1997-11-18

申请人： Nobuo Iwata ,  Mitsugu Sugiyama ,  Toshiya Satoh ,  Tadashi Shinohara ,  Yutaka Shio ,  Tomonori Yabuta

发明人： Nobuo Iwata ,  Mitsugu Sugiyama ,  Toshiya Satoh ,  Tadashi Shinohara ,  Yutaka Shio ,  Tomonori Yabuta

IPC分类号： G03G15/01

CPC分类号： G03G15/0194 ,  G03G2215/0119 ,  G03G2215/0141 ,  G03G2215/0161

摘要： An apparatus and method of forming a color image on a recording sheet by transferring respective images onto a single recording sheet conveyed by a conveying belt, where the combination of the respective images form the color image. The respective color images are formed with a plurality of electrophotographic processing sections disposed along the conveying belt such that the respective color images are superimposed on one another to make the color image. The electrophotographic processing sections also form more than two colors, of a same pattern, of image positional deviation detecting marks. The image positional deviation detecting marks include a line in a main scanning direction and another line positioned at an incline with respect to the former line in order on the conveying belt. A detector is included that detects the image positional deviation detecting mark with a single detecting device composed of a light source, a slit, and a light accepting element.

摘要翻译： 通过将各图像转印到由传送带传送的单个记录纸上，其中各个图像的组合形成彩色图像，在记录纸上形成彩色图像的装置和方法。 各个彩色图像形成有沿着输送带布置的多个电子照相处理部分，使得各个彩色图像彼此叠加以制成彩色图像。 电子照相处理部分还形成图像位置偏差检测标记的相同图案的两种以上的颜色。 图像位置偏差检测标记包括在主扫描方向上的线和在输送带上依次位于相对于前一行倾斜的另一条线。 包括利用由光源，狭缝和受光元件组成的单个检测装置来检测图像位置偏差检测标记的检测器。

公开(公告)号：US06282396B1

公开(公告)日：2001-08-28

申请号：US09617243

申请日：2000-07-14

申请人： Nobuo Iwata ,  Mitsugu Sugiyama ,  Toshiya Satoh ,  Tadashi Shinohara ,  Yutaka Shio ,  Tomonori Yabuta

发明人： Nobuo Iwata ,  Mitsugu Sugiyama ,  Toshiya Satoh ,  Tadashi Shinohara ,  Yutaka Shio ,  Tomonori Yabuta

IPC分类号： G03G1501

CPC分类号： G03G15/0194 ,  G03G2215/0119 ,  G03G2215/0141 ,  G03G2215/0161

摘要： An apparatus and method of forming a color image on a recording sheet by transferring respective images onto a single recording sheet conveyed by a conveying belt, where the combination of the respective images form the color image. The respective color images are formed with a plurality of electrophotographic processing sections disposed along the conveying belt such that the respective color images are superimposed on one another to make the color image. The electrophotographic processing sections also form more than two colors, of a same pattern, of image positional deviation detecting marks. The image positional deviation detecting marks include a line in a main scanning direction and another line positioned at an incline with respect to the former line in order on the conveying belt. A detector is included that detects the image positional deviation detecting mark with a single detecting device composed of a light source, a slit, and a light accepting element.

摘要翻译： 通过将各图像转印到由传送带传送的单个记录纸上，其中各个图像的组合形成彩色图像，在记录纸上形成彩色图像的装置和方法。 各个彩色图像形成有沿着输送带布置的多个电子照相处理部分，使得各个彩色图像彼此叠加以制成彩色图像。 电子照相处理部分还形成图像位置偏差检测标记的相同图案的两种以上的颜色。 图像位置偏差检测标记包括在主扫描方向上的线和在输送带上依次位于相对于前一行倾斜的另一条线。 包括利用由光源，狭缝和受光元件组成的单个检测装置来检测图像位置偏差检测标记的检测器。

公开(公告)号：USD651170S1

公开(公告)日：2011-12-27

申请号：US29354621

申请日：2010-01-27

申请人： Masashi Yura ,  Shinichi Fujino ,  Yusuke Takagi ,  Toshiya Satoh ,  Kinya Nakatsu ,  Takeshi Tokuyama

设计人： Masashi Yura ,  Shinichi Fujino ,  Yusuke Takagi ,  Toshiya Satoh ,  Kinya Nakatsu ,  Takeshi Tokuyama

公开(公告)号：US20110299265A1

公开(公告)日：2011-12-08

申请号：US12920296

申请日：2009-10-30

申请人： Kinya Nakatsu ,  Hiroshi Hozoji ,  Takeshi Tokuyama ,  Yusuke Takagi ,  Toshiya Satoh ,  Taku Oyama ,  Takanori Ninomiya

发明人： Kinya Nakatsu ,  Hiroshi Hozoji ,  Takeshi Tokuyama ,  Yusuke Takagi ,  Toshiya Satoh ,  Taku Oyama ,  Takanori Ninomiya

IPC分类号： H05K7/00

CPC分类号： H02M7/003 ,  B60L11/14 ,  B60L11/18 ,  B60L11/1803 ,  B60L2200/26 ,  B60L2210/40 ,  H01L21/4882 ,  H01L23/36 ,  H01L23/473 ,  H01L24/33 ,  H01L25/072 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H02M7/44 ,  H02M7/5395 ,  H02M2001/327 ,  H02P27/08 ,  H05K7/20409 ,  H05K7/205 ,  H05K7/209 ,  H05K7/20927 ,  Y02T10/70 ,  Y02T10/7005 ,  Y02T10/7077 ,  H01L2924/00 ,  H01L2924/00012

摘要： A power module and a power converter device including the power module include: two base plates with their main surfaces facing each other; a semiconductor circuit unit disposed between the two base plates; a connecting member that is connected to the two base plates and forms a housing region in which the semiconductor circuit unit is housed; and an insulating member that is placed between the base plate and the semiconductor circuit unit and secures electrical insulation of the base plate and the semiconductor circuit unit. A rigidity or thickness of the connecting member is less than a rigidity or thickness of the base plate.

摘要翻译： 包括功率模块的功率模块和功率转换器装置包括：两个基板，它们的主表面相互面对; 设置在所述两个基板之间的半导体电路单元; 连接构件，其连接到所述两个基板并形成容纳所述半导体电路单元的壳体区域; 以及绝缘构件，其设置在所述基板和所述半导体电路单元之间，并且确保所述基板和所述半导体电路单元的电绝缘。 连接构件的刚性或厚度小于基板的刚度或厚度。

公开(公告)号：US07542317B2

公开(公告)日：2009-06-02

申请号：US11501784

申请日：2006-08-10

申请人： Katsunori Azuma ,  Toshiaki Morita ,  Hiroshi Hozoji ,  Kazuhiro Suzuki ,  Toshiya Satoh ,  Osamu Otsuka

发明人： Katsunori Azuma ,  Toshiaki Morita ,  Hiroshi Hozoji ,  Kazuhiro Suzuki ,  Toshiya Satoh ,  Osamu Otsuka

IPC分类号： H02M7/537

CPC分类号： H05K7/1432 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/40091 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/45124 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2224/48 ,  H01L2924/00 ,  H01L2224/37099

摘要： The power conversion apparatus uses the semiconductor device. Said semiconductor device includes a first group of power semiconductor elements at least one of which is electrically connected between a first potential and a third potential, a second group of power semiconductor elements at least one of which is electrically connected between a second potential and the third potential, and a third group of power semiconductor elements at least one of which is electrically connected between the first potential and the third potential. The second group is disposed between the first group and third group.Thereby, a low-loss semiconductor device having both inductance reducibility and heat generation balancing capability and also an electric power conversion apparatus using the same is provided.

摘要翻译： 电力转换装置使用半导体装置。 所述半导体器件包括第一组功率半导体元件，其中至少一个功率半导体元件电连接在第一电位和第三电位之间，第二组功率半导体元件，其中至少一个功率半导体元件电连接在第二电位与第三电位之间 电位和第三组功率半导体元件，其中至少一个功率半导体元件电连接在第一电位和第三电位之间。 第二组置于第一组和第三组之间。 因此，提供了具有电感还原性和发热平衡能力的低损耗半导体器件以及使用其的电力转换装置。

公开(公告)号：US07217992B2

公开(公告)日：2007-05-15

申请号：US10861523

申请日：2004-06-07

申请人： Masahiko Ogino ,  Takumi Ueno ,  Shuji Eguchi ,  Akira Nagai ,  Toshiya Satoh ,  Toshiaki Ishii ,  Hiroyoshi Kokaku ,  Tadanori Segawa ,  Nobutake Tsuyuno ,  Asao Nishimura ,  Ichiro Anjoh

发明人： Masahiko Ogino ,  Takumi Ueno ,  Shuji Eguchi ,  Akira Nagai ,  Toshiya Satoh ,  Toshiaki Ishii ,  Hiroyoshi Kokaku ,  Tadanori Segawa ,  Nobutake Tsuyuno ,  Asao Nishimura ,  Ichiro Anjoh

IPC分类号： H01L23/02 ,  H01L23/28 ,  H01L21/00

CPC分类号： H01L23/3171 ,  H01L23/3114 ,  H01L23/3164 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/1147 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2924/00012

摘要： Semiconductor devices,-semiconductor wafers, and semiconductor modules are provided: wherein the semiconductor device has a small warp; damages at chip edge and cracks in a dropping test are scarcely generated; and the semiconductor device is superior in mounting reliability and mass producibility.The semiconductor device 17 comprising: a semiconductor chip 64; a porous stress relaxing layer 3 provided on the plane, whereon circuits and electrodes are formed, of the semiconductor chip; a circuit layer 2 provided on the stress relaxing layer and connected to the electrodes; and external terminals 10 provided on the circuit layer; wherein an organic protecting film 7 is formed on the plane, opposite to the stress relaxing layer, of the semiconductor chip, and respective side planes of the stress relaxing layer, the semiconductor chip 6, and the protecting film 7 are exposed outside on a same plane.

摘要翻译： 提供半导体器件，半导体晶片和半导体模块：其中半导体器件具有小的翘曲; 几乎不产生芯片边缘的损坏和跌落试验中的裂纹; 半导体装置的安装可靠性和大规模生产性优异。 半导体器件17包括：半导体芯片64; 设置在半导体芯片的形成有电路和电极的平面上的多孔应力缓和层3; 设置在应力缓和层上并与电极连接的电路层2; 和设置在电路层上的外部端子10; 其中在半导体芯片的与应力缓和层相反的平面上形成有机保护膜7，并且应力缓和层，半导体芯片6和保护膜7的各个侧面在外部暴露在外部 飞机

公开(公告)号：US20070051974A1

公开(公告)日：2007-03-08

申请号：US11501784

申请日：2006-08-10

申请人： Katsunori Azuma ,  Toshiaki Morita ,  Hiroshi Hozoji ,  Kazuhiro Suzuki ,  Toshiya Satoh ,  Osamu Otsuka

发明人： Katsunori Azuma ,  Toshiaki Morita ,  Hiroshi Hozoji ,  Kazuhiro Suzuki ,  Toshiya Satoh ,  Osamu Otsuka

IPC分类号： H01L31/111

CPC分类号： H05K7/1432 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/40091 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/45124 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2224/48 ,  H01L2924/00 ,  H01L2224/37099

摘要： The power conversion apparatus uses the semiconductor device. Said semiconductor device includes a first group of power semiconductor elements at least one of which is electrically connected between a first potential and a third potential, a second group of power semiconductor elements at least one of which is electrically connected between a second potential and the third potential, and a third group of power semiconductor elements at least one of which is electrically connected between the first potential and the third potential. The second group is disposed between the first group and third group. Thereby, a low-loss semiconductor device having both inductance reducibility and heat generation balancing capability and also an electric power conversion apparatus using the same is provided.

摘要翻译： 电力转换装置使用半导体装置。 所述半导体器件包括第一组功率半导体元件，其中至少一个功率半导体元件电连接在第一电位和第三电位之间，第二组功率半导体元件，其中至少一个功率半导体元件电连接在第二电位与第三电位之间 电位和第三组功率半导体元件，其中至少一个功率半导体元件电连接在第一电位和第三电位之间。 第二组置于第一组和第三组之间。 因此，提供了具有电感还原性和发热平衡能力的低损耗半导体器件以及使用其的电力转换装置。

公开(公告)号：US06946723B2

公开(公告)日：2005-09-20

申请号：US09809181

申请日：2001-03-16

申请人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

发明人： Toshiya Satoh ,  Masahiko Ogino ,  Tadanori Segawa ,  Yoshihide Yamaguchi ,  Hiroyuki Tenmei ,  Atsushi Kazama ,  Ichiro Anjo ,  Asao Nishimura

IPC分类号： H01L23/29 ,  H01L21/301 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L23/31 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L23/495

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05171 ,  H01L2224/05548 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014

摘要： A semiconductor device having a semiconductor element is obtained by cutting a semiconductor wafer, having an electrode pad formed on one side thereof, along a scribe line. The semiconductor device has a semiconductor element protective layer on the semiconductor element so as to form an opening above the pad, a stress cushioning layer on the layer so as to form an opening on the pad, a lead wire portion reaching the layer from the electrode pad via the openings, external electrodes on the lead wire portion, and a conductor protective layer on the layer. The layer, the layer, and the conductor protective layer form respective end faces on the end surface of the semiconductor element inside the scribe line and expose a surface of the semiconductor element from the end face of the end surface to a point inside of the scribe line, thereby to expose the scribe line.

摘要翻译： 具有半导体元件的半导体器件通过沿着划线切割具有在其一侧形成的电极焊盘的半导体晶片来获得。 半导体器件在半导体元件上具有半导体元件保护层，以便在焊盘上形成开口，该层上的应力缓冲层在焊盘上形成开口，从电极到达该层的引线部分 通过开口焊盘，引线部分上的外部电极以及该层上的导体保护层。 层，层和导体保护层在划线内部的半导体元件的端面上形成相应的端面，并将半导体元件的表面从端表面的端面暴露于刻痕内侧 线，从而暴露划线。

公开(公告)号：US06784541B2

公开(公告)日：2004-08-31

申请号：US10302986

申请日：2002-11-25

申请人： Shuji Eguchi ,  Akira Nagai ,  Haruo Akahoshi ,  Takumi Ueno ,  Toshiya Satoh ,  Masahiko Ogino ,  Asao Nishimura ,  Ichiro Anjo ,  Hideki Tanaka

发明人： Shuji Eguchi ,  Akira Nagai ,  Haruo Akahoshi ,  Takumi Ueno ,  Toshiya Satoh ,  Masahiko Ogino ,  Asao Nishimura ,  Ichiro Anjo ,  Hideki Tanaka

IPC分类号： H01L2334

CPC分类号： H01L23/42 ,  H01L21/56 ,  H01L21/565 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/0102 ,  H01L2924/01322 ,  H01L2924/16152 ,  H01L2924/16153 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/20752

摘要： In a multi-chip module, a plurality of semiconductor chips are mounted on a single wiring board. Upper surfaces of the chips are covered with a single heat spread plate, and the whole space around the chips sandwiched between the wiring board and the heat spread plate is filled with resin. The semiconductor chips are interconnected through the resin so that any stress exerted on any chips is dispersed. This diminishes the occurrence of cracks caused by stress concentration. Since the chips and the heat spread plate are bonded together with resin, even if there are variations in size of the chips, both can be bonded easily. Further, the bonding of all the chips and the heat spread plate can be done in a single process.

摘要翻译： 在多芯片模块中，多个半导体芯片安装在单个布线板上。 芯片的上表面被单个散热板覆盖，并且夹在布线板和扩散板之间的芯片周围的整个空间填充有树脂。 半导体芯片通过树脂相互连接，从而分散施加在任何芯片上的任何应力。 这减少了由应力集中引起的裂纹的发生。 由于芯片和扩散板与树脂粘合在一起，即使芯片的尺寸有变化，两者也可以容易地结合。 此外，所有芯片和散热板的接合可以在单个工艺中完成。

公开(公告)号：US06710446B2

公开(公告)日：2004-03-23

申请号：US10136305

申请日：2002-05-02

申请人： Akira Nagai ,  Takumi Ueno ,  Haruo Akahoshi ,  Syuji Eguchi ,  Masahiko Ogino ,  Toshiya Satoh ,  Asao Nishimura ,  Ichiro Anjoh

发明人： Akira Nagai ,  Takumi Ueno ,  Haruo Akahoshi ,  Syuji Eguchi ,  Masahiko Ogino ,  Toshiya Satoh ,  Asao Nishimura ,  Ichiro Anjoh

IPC分类号： H01L2348

CPC分类号： H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/02145 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/02377 ,  H01L2224/0401 ,  H01L2224/08225 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： A semiconductor device and a manufacturing method thereof, which device includes a semiconductor element arranged to form integrated circuitry, a plurality of electrode pads formed on the side of the integrated circuitry formation surface of the semiconductor element, bump electrodes for electrically connecting to the electrode pads through a conductive layer, and a stress relaxation layer formed between the integrated circuitry formation surface and electrode pads on one hand and the bump electrodes and conductive layer on the other hand, the stress relaxation layer being adhered thereto, wherein more than one third of the stress relaxation layer from a surface thereof is cut away for removal and wherein the stress relaxation layer is subdivided into a plurality of regions. Accordingly, it is possible to provide a semiconductor device capable of offering high density mounting schemes with increased reliability while reducing production costs.

摘要翻译： 一种半导体器件及其制造方法，该器件包括布置成形成集成电路的半导体元件，形成在半导体元件的集成电路形成表面侧的多个电极焊盘，用于电连接到电极焊盘的凸起电极 通过导电层和在集成电路形成表面和电极焊盘之间形成的应力松弛层，另一方面，凸块电极和导电层，应力松弛层粘附到其上，其中超过三分之一 将其表面的应力松弛层切除以除去，其中应力松弛层被细分成多个区域。 因此，可以提供能够提供可靠性高的高密度安装方案的半导体器件，同时降低生产成本。