摘要:
A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.
摘要:
A multilayer capable electrically conductive adhesive (ECA) mixture for connecting multilevel Z-axis interconnects and a method of forming the ECA for connecting multilevel Z-axis interconnects. The multilayer capable ECA contains a mixture of constituent components that allow the paste to be adapted to specific requirements wherein the method of making a circuitized substrate assembly in which two or more subassemblies having potentially disparate coefficients of thermal expansion (CTE) are aligned and Z-axis interconnection are created during bonding. The metallurgies of the conductors, and those of a multilayer capable conductive paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies flows to engage and surround the conductor coupling.
摘要:
A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a binder component and at least one metallic component including microparticles. In another embodiment, the paste includes the binder and a plurality of nano-wires. Selected ones of the microparticles or nano-wires include a layer of solder thereon. A method of making such a substrate is also provided, as are an electrical assembly and information handling system adapter for having such a substrate as part thereof.
摘要:
A low loss capacitance and low loss insulating dielectric material consisting of a thermosetting resin, thermoplastic resin, a cross-linker, and containing a quantity of ferroelectric ceramic nano-particles of barium titanate within. The combined low loss insulating dielectric layer and a low loss capacitive layer resulting from the material allows one continuous layer that can form internal capacitors and permit the modifying the dielectric thickness between signal layers for impedance matching within a layer of substrate. More significantly, the applied layer of low loss capacitive materials can simultaneously act as a capacitor as well as a dielectric for separation of signal layers.
摘要:
A method of forming a circuitized substrate for use in electronic packages. A substrate layer is provided that has a copper pad on a surface. A conductive seed layer and a photoresist layer are placed on the surface. The photoresist is developed and conductive material is placed within the developed features and a second conductive material placed on the first conductive material. The photoresist and conductive seed layer are removed to leave a micro-pillar array. The joining and lamination of two circuitized substrate layers utilizes the micro-pillar array for the electrical connection of the circuitized substrate layers.
摘要:
A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
摘要:
A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.
摘要:
A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
摘要:
A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.
摘要:
A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.