公开(公告)号：US07151014B2

公开(公告)日：2006-12-19

申请号：US10774155

申请日：2004-02-05

申请人： Rahul N. Manepalli ,  Saravanan Krishnan ,  Choong Kooi Chee

发明人： Rahul N. Manepalli ,  Saravanan Krishnan ,  Choong Kooi Chee

IPC分类号： H01L23/31

CPC分类号： H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H05K3/3452 ,  H01L2924/00 ,  H01L2224/0401

摘要： Placing a flow modifier on a package substrate to create two flow fronts on a molded matrix array package. A flow modifier may be laid on a package substrate to a height that blocks off the bottom of other substrates (e.g., dice) coupled to the package substrate. By separating the top flow front and the bottom flow front, this process prevents the top flow front from wrapping around the sides of the substrates and trapping air below each substrate and in front of the bottom flow front.

摘要翻译： 将流动调节器放置在封装衬底上，以在模制的矩阵阵列封装上创建两个流动前沿。 流动改性剂可以铺设在封装衬底上，以阻止耦合到封装衬底的其它衬底（例如，裸片）的底部的高度。 通过分离顶部流动前部和底部流动前部，该过程防止顶部流动前部围绕基底的侧面包裹并且在每个基底之下并在底部流动前部的前方捕获空气。

公开(公告)号：US07339276B2

公开(公告)日：2008-03-04

申请号：US10287318

申请日：2002-11-04

申请人： Rahul N. Manepalli ,  Saravanan Krishnan ,  Choong Kooi Chee

发明人： Rahul N. Manepalli ,  Saravanan Krishnan ,  Choong Kooi Chee

IPC分类号： H01L23/38 ,  H01L23/58 ,  H05K7/00

CPC分类号： H01L21/563 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H05K3/3452 ,  H01L2924/00 ,  H01L2224/0401

摘要： Placing a flow modifier on a package substrate to create two flow fronts on a molded matrix array package. A flow modifier may be laid on a package substrate to a height that blocks off the bottom of other substrates (e.g., dice) coupled to the package substrate. By separating the top flow front and the bottom flow front, this process prevents the top flow front from wrapping around the sides of the substrates and trapping air below each substrate and in front of the bottom flow front.

摘要翻译： 将流动调节器放置在封装衬底上，以在模制的矩阵阵列封装上创建两个流动前沿。 流动改性剂可以铺设在封装衬底上，以阻止耦合到封装衬底的其它衬底（例如，裸片）的底部的高度。 通过分离顶部流动前部和底部流动前部，该过程防止顶部流动前部围绕基底的侧面包裹并且在每个基底之下并在底部流动前部的前方捕获空气。

公开(公告)号：US08384223B2

公开(公告)日：2013-02-26

申请号：US12164390

申请日：2008-06-30

申请人： Huay Huay Sim ,  Choong Kooi Chee ,  Kein Fee Liew

发明人： Huay Huay Sim ,  Choong Kooi Chee ,  Kein Fee Liew

IPC分类号： H01L23/498

CPC分类号： H01L21/565 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/20641 ,  H01L2924/3511 ,  H01L2924/401 ,  Y10T29/49002 ,  Y10T29/49124 ,  H01L2924/00 ,  H01L2924/00012

摘要： In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, forming a stiffening mold on a backside of the coreless substrate strip adjacent to sites where solder balls are to be attached, and attaching solder balls to the backside of the coreless substrate strip amongst the stiffening mold. Other embodiments are also disclosed and claimed.

摘要翻译： 在一些实施例中，提出了用于电子基板的选择性无电镀。 在这方面，引入了一种方法，包括接收无芯基板条，在与无焊基板条的背面相邻的无芯基板条的背面上形成加强模，并将焊球附着到无芯基板条的背面 在加强模具之间。 还公开并要求保护其他实施例。

公开(公告)号：US20150091180A1

公开(公告)日：2015-04-02

申请号：US14040642

申请日：2013-09-28

申请人： Jenny Shio Yin ONG ,  Choong Kooi Chee ,  Seok Ling Lim

发明人： Jenny Shio Yin ONG ,  Choong Kooi Chee ,  Seok Ling Lim

IPC分类号： H01L25/18 ,  H01L23/538 ,  H01L25/00

CPC分类号： H01L25/18 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/538 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/25 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/06183 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/2518 ,  H01L2224/73259 ,  H01L2224/9222 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/014

摘要： An apparatus including a die including a device side and an opposite backside, first contacts on the backside and a through vias from the device side to the first contacts and second contacts on the backside of the die or on at least two opposing sidewalls of the die; a secondary die coupled to the first plurality of contacts; and a carrier including carrier contact points operable for mounting the carrier to a substrate. A method including forming a first portion of a carrier adjacent a device side of a die and including carrier contact points operable for mounting the carrier to a substrate; and forming a second portion including second carrier contact points connected to contacts on the backside of the die or on at least two opposing sidewalls of the die; and coupling a secondary die to the second carrier contact points.

摘要翻译： 一种包括模具的设备，包括器件侧和相对的后侧，在后侧上的第一接触和从器件侧到第一接触件的通孔和在管芯的背面上的第二接触件或在管芯的至少两个相对的侧壁上 ; 耦合到所述第一多个触点的次模; 以及载体，其包括可操作用于将载体安装到基底的载体接触点。 一种方法，包括在模具的装置侧附近形成载体的第一部分，并且包括可操作以将载体安装到基底的载体接触点; 以及形成第二部分，所述第二部分包括连接到所述管芯的背面上的接触点或所述管芯的至少两个相对的侧壁上的第二载体接触点; 以及将次级管芯耦合到第二载体接触点。

公开(公告)号：US06774471B2

公开(公告)日：2004-08-10

申请号：US10135547

申请日：2002-04-30

申请人： Choong Kooi Chee

发明人： Choong Kooi Chee

IPC分类号： H01I2302

CPC分类号： H01L24/32 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83102 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06593 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/19042 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2924/00

摘要： A package substrate having a finger projection that is either an elevated or removably covered bond finger. The finger portion includes a portion to remain uncovered by a die and an underfill material when the package substrate is coupled to the die. A second portion of the finger projection may allow the first portion to remain uncovered as indicated.

摘要翻译： 具有手指突起的封装基板，其是升高的或可移除地覆盖的粘结指状物。 手指部分包括当封装衬底耦合到裸片时由裸片和底部填充材料保持未被覆盖的部分。 手指突起的第二部分可以允许第一部分保持未被覆盖，如所示。

公开(公告)号：US07088010B2

公开(公告)日：2006-08-08

申请号：US10740283

申请日：2003-12-18

申请人： Sheau Hooi Lim ,  Choong Kooi Chee

发明人： Sheau Hooi Lim ,  Choong Kooi Chee

IPC分类号： H01L23/14 ,  H01L23/29

CPC分类号： H01L23/293 ,  H01L21/563 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/48 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A system for chip packaging includes an adamantoid packaging composition. The adamantoid composition ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In an embodiment, the system includes a packaging composition that alone exhibits a CTE that is characteristic of an inorganic-filled underfill composite previously known. An embodiment is also directed to the assembly of a chip package that uses an adamantoid packaging composition.

摘要翻译： 用于芯片封装的系统包括adamantoid包装组合物。 adamantoid组合物改善了通常在包装的模具和浸渍树脂的玻璃纤维安装基板之间存在的CTE失配。 在一个实施方案中，该系统包括单独显示作为先前已知的无机填充的底部填充复合材料特征的CTE的包装组合物。 一个实施例还涉及使用Adamantoid包装组合物的芯片封装的组装。

公开(公告)号：US20210098375A1

公开(公告)日：2021-04-01

申请号：US16912638

申请日：2020-06-25

申请人： Loke Yip Foo ,  Teong Guan Yew ,  Choong Kooi Chee

发明人： Loke Yip Foo ,  Teong Guan Yew ,  Choong Kooi Chee

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

摘要： A dual-sided embedded multi-die interconnect bridge provides power and source conduits from the bridge bottom at a silicon portion, in short paths to dice on a die side of an integrated-circuit package substrate. Signal traces are in a metallization on the silicon portion of the dual-sided EMIB. Power, ground and signal vias all emanate from the dual-sided embedded multi-die interconnect bridge, with power and ground entering the bridge from central regions of the silicon portion.

公开(公告)号：US20200091040A1

公开(公告)日：2020-03-19

申请号：US16451521

申请日：2019-06-25

申请人： Bok Eng Cheah ,  Choong Kooi Chee ,  Jackson Chung Peng Kong ,  Tat Hin Tan ,  Wai Ling Lee

发明人： Bok Eng Cheah ,  Choong Kooi Chee ,  Jackson Chung Peng Kong ,  Tat Hin Tan ,  Wai Ling Lee

IPC分类号： H01L23/48 ,  H01L23/528

摘要： Disclosed embodiments include a multi-chip package that includes a stacked through-silicon via in a first semiconductive device, and the first semiconductive device is face-to-face coupled to a second semiconductive device by the stacked through-silicon via. The stacked through-silicon via includes a first portion that contacts a second portion, and the first portion emerges from an active semiconductive region of the first semiconductive device adjacent a keep-out region.

公开(公告)号：US09699904B2

公开(公告)日：2017-07-04

申请号：US13993343

申请日：2012-03-13

申请人： Howe Yin Loo ,  Choong Kooi Chee

发明人： Howe Yin Loo ,  Choong Kooi Chee

IPC分类号： H05K7/10 ,  H05K1/18 ,  H01L23/13 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065 ,  H05K3/30 ,  H01L23/427 ,  H05K1/14 ,  H05K3/34

CPC分类号： H05K1/181 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/427 ,  H01L23/49827 ,  H01L25/0652 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H05K1/141 ,  H05K1/144 ,  H05K3/30 ,  H05K3/3415 ,  H05K2201/10378 ,  Y10T29/4913

摘要： The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the microelectronic package may include an interposer having a first surface and an opposing second surface. A microelectronic device may be attached to the interposer first surface and the interposer may be attached to the microelectronic substrate by the interposer first surface such that the microelectronic device extends into the opening. At least one secondary microelectronic device may be attached to the interposer second surface.

公开(公告)号：US20140293563A1

公开(公告)日：2014-10-02

申请号：US13993343

申请日：2012-03-13

申请人： Howe Yin Loo ,  Choong Kooi Chee

发明人： Howe Yin Loo ,  Choong Kooi Chee

IPC分类号： H05K1/18 ,  H05K3/30

CPC分类号： H05K1/181 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/427 ,  H01L23/49827 ,  H01L25/0652 ,  H01L2224/16 ,  H01L2225/06517 ,  H01L2225/0652 ,  H05K1/141 ,  H05K1/144 ,  H05K3/30 ,  H05K3/3415 ,  H05K2201/10378 ,  Y10T29/4913

摘要： The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the microelectronic package may include an interposer having a first surface and an opposing second surface. A microelectronic device may be attached to the interposer first surface and the interposer may be attached to the microelectronic substrate by the interposer first surface such that the microelectronic device extends into the opening. At least one secondary microelectronic device may be attached to the interposer second surface.

摘要翻译： 本说明书涉及制造微电子结构的领域。 微电子结构可以包括具有开口的微电子衬底，其中开口可以通过微电子衬底形成，或者可以是在微电子衬底中形成的凹部。 微电子封装可以附接到微电子衬底，其中微电子封装可以包括具有第一表面和相对的第二表面的插入件。 微电子器件可以附接到插入器第一表面，并且插入器可以通过插入器第一表面附接到微电子衬底，使得微电子器件延伸到开口中。 至少一个次级微电子器件可以附接到插入件第二表面。