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    Method and apparatus for backside illumination sensor
    2.
    发明授权
    Method and apparatus for backside illumination sensor 有权

    公开(公告)号：US10340303B2

    公开(公告)日：2019-07-02

    申请号：US15922514

    申请日：2018-03-15

    申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION ,  SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION

    发明人： Dekui Qi ,  Fucheng Chen

    IPC分类号： H01L27/146 ,  H01L21/28 ,  H01L21/768 ,  H01L21/3213

    摘要： A semiconductor device includes a device substrate having a dielectric layer and a metal wire in the dielectric layer, a first opening on the metal wire and having a bottom at a depth the same as an upper surface of the metal wire, a first insulation layer including a first color filter material on sidewalls of the first opening, a second opening disposed at opposite ends of the semiconductor device and having a bottom at a depth the same as the depth of the bottom of the first opening, and a second insulation layer including a second color filter material on sidewalls of the second opening. The first opening is for leading out the metal wire to a pad. The second opening is disposed along scribe lines. The semiconductor device simplifies the process of drawing out and isolating the pads and satisfies technical requirements of a back seal ring.

    Method for forming deep trench isolation for RF devices on SOI
    6.
    发明授权
    Method for forming deep trench isolation for RF devices on SOI 有权
    在SOI上形成RF器件深沟槽隔离的方法

    公开(公告)号：US09349748B2

    公开(公告)日：2016-05-24

    申请号：US14564081

    申请日：2014-12-08

    申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

    发明人： Herb He Huang ,  Haiting Li ,  Xingcheng Jin ,  Xinxue Wang ,  Hongbo Zhao ,  Fucheng Chen ,  Yanghui Xiang

    IPC分类号： H01L21/84 ,  H01L21/762 ,  H01L27/12 ,  H01L29/06

    CPC分类号： H01L27/088 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/167 ,  H01L29/4975

    摘要： A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.

    摘要翻译： 半导体器件包括具有第一半导体衬底，掩埋绝缘层和形成在第一区域中的第二半导体衬底和设置在第二区域中的深沟槽隔离的堆叠的绝缘体上硅（SOI）衬底。 形成半导体器件的方法包括提供分别形成在第二半导体衬底内和第二半导体衬底上的浅沟槽隔离（STI）和晶体管的SOI衬底。 该方法还包括在第一区域上形成硬掩模，并使用硬掩模作为掩模去除第二区域中的STI，晶体管，第二半导体衬底和埋入绝缘层，并且形成覆盖深沟槽的覆盖层 隔离和包括晶体管的第二半导体衬底。

    METHOD FOR FORMING DEEP TRENCH ISOLATION FOR RF DEVICES ON SOI
    9.
    发明申请
    METHOD FOR FORMING DEEP TRENCH ISOLATION FOR RF DEVICES ON SOI 有权
    用于在SOI上形成RF器件的深度分离隔离的方法

    公开(公告)号：US20150187794A1

    公开(公告)日：2015-07-02

    申请号：US14564081

    申请日：2014-12-08

    申请人： SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION

    发明人： Herb He Huang ,  Haiting Li ,  Xingcheng Jin ,  Xinxue Wang ,  Hongbo Zhao ,  Fucheng Chen ,  Yanghui Xiang

    IPC分类号： H01L27/12 ,  H01L21/84 ,  H01L21/762 ,  H01L29/06

    CPC分类号： H01L27/088 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/167 ,  H01L29/4975

    摘要： A semiconductor device includes a silicon-on-insulator (SOI) substrate having a stack of a first semiconductor substrate, a buried insulating layer and a second semiconductor substrate formed in a first region and a deep trench isolation disposed in a second region. The method of forming the semiconductor device includes providing a SOI substrate having shallow trench isolations (STIs) and transistors formed within and on the second semiconductor substrate, respectively. The method also includes forming a hard mask over the first region and removing the STIs, the transistors, the second semiconductor substrate and the buried insulating layer in the second region using the hard mask as a mask, and forming a capping layer covering the deep trench isolation and the second semiconductor substrate including the transistors.

    摘要翻译： 半导体器件包括具有第一半导体衬底，掩埋绝缘层和形成在第一区域中的第二半导体衬底和设置在第二区域中的深沟槽隔离的堆叠的绝缘体上硅（SOI）衬底。 形成半导体器件的方法包括提供分别形成在第二半导体衬底内和第二半导体衬底上的浅沟槽隔离（STI）和晶体管的SOI衬底。 该方法还包括在第一区域上形成硬掩模，并使用硬掩模作为掩模去除第二区域中的STI，晶体管，第二半导体衬底和埋入绝缘层，并且形成覆盖深沟槽的覆盖层 隔离和包括晶体管的第二半导体衬底。