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公开(公告)号：US09769554B2
公开(公告)日：2017-09-19
申请号：US14943848
申请日：2015-11-17
Applicant: STMICROELECTRONICS S.R.L. , STMICROELECTRONICS (MALTA) LTD
Inventor： Roberto Brioschi , Silvia Adorno , Kenneth Fonk
CPC classification number: H04R1/086 , B81B7/0058 , B81B7/0061 , B81B2201/0257 , B81B2203/0127 , B81B2207/012 , B81B2207/07 , B81C1/00309 , B81C2203/0785 , H01L2224/48137 , H01L2224/48227 , H04R19/005 , H04R19/04 , H04R31/00 , H04R31/006
Abstract: A semiconductor integrated device, comprising: a package defining an internal space and having an acoustic-access opening in acoustic communication with an environment external to the package; a MEMS acoustic transducer, housed in the internal space and provided with an acoustic chamber facing the acoustic-access opening; and a filtering module, which is designed to inhibit passage of contaminating particles having dimensions larger than a filtering dimension and is set between the MEMS acoustic transducer and the acoustic-access opening. The filtering module defines at least one direct acoustic path between the acoustic-access opening and the acoustic chamber.
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公开(公告)号：US09401349B2
公开(公告)日：2016-07-26
申请号：US14723893
申请日：2015-05-28
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Malta) Ltd , STMicroelectronics S.r.l.
Inventor： Angelo Crobu , Kenneth Fonk , Romain Coffy
CPC classification number: H01L25/18 , G01L19/0084 , G01L19/147 , G01L19/148 , H01L23/24 , H01L23/3157 , H01L24/10 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L2224/10135 , H01L2224/10165 , H01L2224/1319 , H01L2224/16145 , H01L2224/26122 , H01L2224/26135 , H01L2224/29007 , H01L2224/29021 , H01L2224/29036 , H01L2224/32014 , H01L2224/32111 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48106 , H01L2224/48145 , H01L2224/48225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73207 , H01L2224/73257 , H01L2224/73265 , H01L2224/83192 , H01L2224/83855 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2225/06575 , H01L2924/00014 , H01L2924/14 , H01L2924/146 , H01L2924/16151 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
Abstract: A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each other by an interposed spacer. The spacer is fastened by adhesion to only one of the opposing faces. The opposing faces are fastened to each other by a local adhesive which is separate from spacer.
Abstract translation: 一堆芯片由第一集成电路芯片和第二集成电路芯片形成。 芯片具有通过插入的间隔件彼此分离的相对面。 间隔件通过粘合固定到只有一个相对的面。 相对的面通过与间隔物分离的局部粘合剂彼此紧固。
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公开(公告)号：US20150364455A1
公开(公告)日：2015-12-17
申请号：US14723893
申请日：2015-05-28
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Malta) Ltd , STMicroelectronics S.r.l.
Inventor： Angelo Crobu , Kenneth Fonk , Romain Coffy
CPC classification number: H01L25/18 , G01L19/0084 , G01L19/147 , G01L19/148 , H01L23/24 , H01L23/3157 , H01L24/10 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L2224/10135 , H01L2224/10165 , H01L2224/1319 , H01L2224/16145 , H01L2224/26122 , H01L2224/26135 , H01L2224/29007 , H01L2224/29021 , H01L2224/29036 , H01L2224/32014 , H01L2224/32111 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48106 , H01L2224/48145 , H01L2224/48225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73207 , H01L2224/73257 , H01L2224/73265 , H01L2224/83192 , H01L2224/83855 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2225/06575 , H01L2924/00014 , H01L2924/14 , H01L2924/146 , H01L2924/16151 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
Abstract: A stack of chips is formed by a first integrated-circuit chip and a second integrated-circuit chip. The chips have opposing faces which are separated from each other by an interposed spacer. The spacer is fastened by adhesion to only one of the opposing faces. The opposing faces are fastened to each other by a local adhesive which is separate from spacer.
Abstract translation: 一堆芯片由第一集成电路芯片和第二集成电路芯片形成。 芯片具有通过插入的间隔件彼此分离的相对面。 间隔件通过粘合固定到只有一个相对的面。 相对的面通过与间隔物分离的局部粘合剂彼此紧固。
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Patent Agency Ranking
4.发明申请METHOD OF MANUFACTURING ELECTRONIC COMPONENTS AND CORRESPONDING ELECTRONIC COMPONENT 审中-公开电子元件制造方法与电子元件的对应公开(公告)号：US20160368098A1
公开(公告)日：2016-12-22
申请号：US15135047
申请日：2016-04-21
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Kenneth Fonk , Kevin Formosa
IPC: B23K26/359 , B23K26/351 , B23K26/00
CPC classification number: B23K26/359 , B23K26/0006 , B23K26/351 , H01L23/3121 , H01L23/544 , H01L23/552 , H01L2223/54406 , H01L2223/54433 , H01L2223/54486 , H01L2224/04042 , H01L2224/291 , H01L2224/2919 , H01L2224/32225 , H01L2224/32245 , H01L2224/73215 , H01L2224/73265 , H01L2924/1433 , H01L2924/1461 , H01L2924/37001 , H01L2924/014 , H01L2224/48227 , H01L2924/00012
Abstract: An electronic component includes one or more circuits having a front surface and a light-permeable package material. A lid member is attached to a front surface of the circuit. The lid member is made, for example, of a light-blocking material such as a semiconductor or metal material. A laser marking is applied onto the lid member.
Abstract translation: 电子部件包括具有前表面和透光包装材料的一个或多个电路。 盖构件附接到电路的前表面。 盖构件例如由诸如半导体或金属材料的遮光材料制成。 激光打标被施加到盖部件上。
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5.发明授权Method of stacking a plurality of dies to form a stacked semiconductor device, and stacked semiconductor device 有权堆叠多个管芯以形成堆叠的半导体器件的方法和堆叠的半导体器件公开(公告)号：US09290377B2
公开(公告)日：2016-03-22
申请号：US14554473
申请日：2014-11-26
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Conrad Cachia , Kenneth Fonk
IPC: H01L21/00 , B81B7/00 , B81C1/00 , B81C3/00 , H01L21/683 , H01L25/065 , H01L25/00 , H01L23/00
CPC classification number: B81B7/0074 , B81C1/0023 , B81C3/001 , H01L21/6836 , H01L24/05 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/04026 , H01L2224/04042 , H01L2224/05624 , H01L2224/05638 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/27005 , H01L2224/2732 , H01L2224/27334 , H01L2224/27848 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48105 , H01L2224/48229 , H01L2224/73215 , H01L2224/73265 , H01L2224/83191 , H01L2224/83211 , H01L2224/83856 , H01L2224/83862 , H01L2224/92 , H01L2224/92147 , H01L2224/92247 , H01L2224/97 , H01L2225/0651 , H01L2924/00014 , H01L2924/10157 , H01L2924/12042 , H01L2924/1461 , H01L2924/15192 , H01L2924/161 , H01L2924/01014 , H01L2924/0665 , H01L2924/00012 , H01L2224/83 , H01L2224/85 , H01L2224/27 , H01L21/78 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A method of stacking a plurality of first dies to a respective plurality of second dies, each one of the first dies having a surface including a surface coupling region which is substantially flat, each one of the second dies having a respective surface including a respective surface coupling region which is substantially flat, the method comprising the steps of: forming, by means of a screen printing technique, an adhesive layer on the first dies at the respective surface coupling regions; and arranging the surface coupling region of each second die in direct physical contact with a respective adhesive layer of a respective first die among said plurality of first dies.
Abstract translation: 一种将多个第一管芯堆叠到相应的多个第二管芯的方法，每个第一管芯具有包括基本平坦的表面结合区域的表面，每个第二管芯具有包括相应表面的相应表面 该方法包括以下步骤：通过丝网印刷技术在相应的表面耦合区域上形成在第一裸片上的粘合剂层; 并且每个第二管芯的表面耦合区域与所述多个第一管芯中相应的第一管芯的相应的粘合剂层直接物理接触。
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6.发明申请METHOD OF STACKING A PLURALITY OF DIES TO FORM A STACKED SEMICONDUCTOR DEVICE, AND STACKED SEMICONDUCTOR DEVICE 有权堆叠形成堆叠的半导体器件的多个重叠的方法和堆叠的半导体器件公开(公告)号：US20150145077A1
公开(公告)日：2015-05-28
申请号：US14554473
申请日：2014-11-26
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Conrad Cachia , Kenneth Fonk
CPC classification number: B81B7/0074 , B81C1/0023 , B81C3/001 , H01L21/6836 , H01L24/05 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/04026 , H01L2224/04042 , H01L2224/05624 , H01L2224/05638 , H01L2224/05644 , H01L2224/05647 , H01L2224/0603 , H01L2224/27005 , H01L2224/2732 , H01L2224/27334 , H01L2224/27848 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/48091 , H01L2224/48105 , H01L2224/48229 , H01L2224/73215 , H01L2224/73265 , H01L2224/83191 , H01L2224/83211 , H01L2224/83856 , H01L2224/83862 , H01L2224/92 , H01L2224/92147 , H01L2224/92247 , H01L2224/97 , H01L2225/0651 , H01L2924/00014 , H01L2924/10157 , H01L2924/12042 , H01L2924/1461 , H01L2924/15192 , H01L2924/161 , H01L2924/01014 , H01L2924/0665 , H01L2924/00012 , H01L2224/83 , H01L2224/85 , H01L2224/27 , H01L21/78 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A method of stacking a plurality of first dies to a respective plurality of second dies, each one of the first dies having a surface including a surface coupling region which is substantially flat, each one of the second dies having a respective surface including a respective surface coupling region which is substantially flat, the method comprising the steps of: forming, by means of a screen printing technique, an adhesive layer on the first dies at the respective surface coupling regions; and arranging the surface coupling region of each second die in direct physical contact with a respective adhesive layer of a respective first die among said plurality of first dies.
Abstract translation: 一种将多个第一管芯堆叠到相应的多个第二管芯的方法，每个第一管芯具有包括基本平坦的表面结合区域的表面，每个第二管芯具有包括相应表面的相应表面 该方法包括以下步骤：通过丝网印刷技术在相应的表面耦合区域上形成在第一裸片上的粘合剂层; 并且每个第二管芯的表面耦合区域与所述多个第一管芯中相应的第一管芯的相应的粘合剂层直接物理接触。
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公开(公告)号：US20130214368A1
公开(公告)日：2013-08-22
申请号：US13772210
申请日：2013-02-20
Applicant: STMicroelectronics Ltd (Malta) , STMicroelectronics S.r.l.
Inventor： Kenneth Fonk , Luca Maggi , Jeremy Spiteri
CPC classification number: B81B7/0045 , B81B2201/0264 , B81B2207/012 , B81C1/00238 , B81C1/00325 , B81C2203/0785 , B81C2203/0792 , H01L2224/27013 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83192 , H01L2224/83385 , H01L2924/00014 , H01L2924/00
Abstract: A process for assembly of an integrated device, envisages: providing a first body of semiconductor material integrating at least one electronic circuit and having a top surface; providing a second body of semiconductor material integrating at least one microelectromechanical structure and having a bottom surface; and stacking the second body on the first body with the interposition, between the top surface of the first body and the bottom surface of the second body, of an elastic spacer material. Prior to the stacking step, the step is envisaged of providing, in an integrated manner, at the top surface of the first body a confinement and spacing structure that confines inside it the elastic spacer material and supports the second body at a distance from the first body during the stacking step.
Abstract translation: 集成装置的组装方法设想：提供集成至少一个电子电路并具有顶表面的第一半导体材料体; 提供集成至少一个微机电结构并具有底表面的第二半导体材料; 并且在所述第一主体的顶表面和所述第二主体的所述底表面之间插入所述第一主体上的所述第二主体的弹性间隔件材料。 在层叠步骤之前，该步骤被设想为以第一体积的方式在第一体的顶表面处提供约束和间隔结构，该限制和间隔结构在其内部限定弹性间隔物材料，并且将第二体与第一体 身体在堆叠步骤。
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公开(公告)号：US08921164B2
公开(公告)日：2014-12-30
申请号：US13772210
申请日：2013-02-20
Applicant: STMicroelectronics Ltd (Malta) , STMicroelectronics S.r.l.
Inventor： Kenneth Fonk , Luca Maggi , Jeremy Spiteri
IPC: H01L21/00 , H01L23/495
CPC classification number: B81B7/0045 , B81B2201/0264 , B81B2207/012 , B81C1/00238 , B81C1/00325 , B81C2203/0785 , B81C2203/0792 , H01L2224/27013 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83192 , H01L2224/83385 , H01L2924/00014 , H01L2924/00
Abstract: A process for assembly of an integrated device, envisages: providing a first body of semiconductor material integrating at least one electronic circuit and having a top surface; providing a second body of semiconductor material integrating at least one microelectromechanical structure and having a bottom surface; and stacking the second body on the first body with the interposition, between the top surface of the first body and the bottom surface of the second body, of an elastic spacer material. Prior to the stacking step, the step is envisaged of providing, in an integrated manner, at the top surface of the first body a confinement and spacing structure that confines inside it the elastic spacer material and supports the second body at a distance from the first body during the stacking step.
Abstract translation: 集成装置的组装方法设想：提供集成至少一个电子电路并具有顶表面的第一半导体材料体; 提供集成至少一个微机电结构并具有底表面的第二半导体材料; 并且在所述第一主体的顶表面和所述第二主体的所述底表面之间插入所述第一主体上的所述第二主体的弹性间隔件材料。 在层叠步骤之前，该步骤被设想为以第一体积的方式在第一体的顶表面处提供约束和间隔结构，该限制和间隔结构在其内部限定弹性间隔物材料，并且将第二体与第一体 身体在堆叠步骤。
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