公开(公告)号：US20070200257A1

公开(公告)日：2007-08-30

申请号：US11307862

申请日：2006-02-25

申请人： Seng Guan Chow ,  Heap Hoe Kuan ,  Dioscoro Merilo ,  Antonio Dimaano

发明人： Seng Guan Chow ,  Heap Hoe Kuan ,  Dioscoro Merilo ,  Antonio Dimaano

IPC分类号： H01L23/28

CPC分类号： H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49551 ,  H01L24/14 ,  H01L24/17 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16245 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06558 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stackable integrated circuit package system is provided forming a first integrated circuit die having an interconnect provided thereon, forming an external interconnect, having an upper tip and a lower tip, from a lead frame, mounting the first integrated circuit die on the external interconnect with the interconnect on the lower tip and below the upper tip, and encapsulating around the interconnect with an exposed surface.

摘要翻译： 提供一种可堆叠的集成电路封装系统，其形成具有设置在其上的互连的第一集成电路管芯，从引线框架形成具有上端和下端的外部互连件，将第一集成电路管芯安装在外部互连上， 在下端部和下端部之间的互连，并且在互连件周围用暴露的表面封装。

公开(公告)号：US20070209834A1

公开(公告)日：2007-09-13

申请号：US11276645

申请日：2006-03-08

申请人： Heap Hoe Kuan ,  Tsz Yin Ho ,  Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano

发明人： Heap Hoe Kuan ,  Tsz Yin Ho ,  Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano

IPC分类号： H01R13/46 ,  H05K5/00

CPC分类号： H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： An integrated circuit leaded stacked package system including forming an no-lead integrated circuit package having a mold cap, and attaching a mold cap of an extended-lead integrated circuit package facing the mold cap of the no-lead integrated circuit package.

摘要翻译： 一种集成电路引线堆叠封装系统，包括形成具有模具帽的无引线集成电路封装，以及附接面向无引线集成电路封装的模具帽的延伸引线集成电路封装的模具盖。

公开(公告)号：US20070200230A1

公开(公告)日：2007-08-30

申请号：US11307906

申请日：2006-02-27

申请人： Seng Guan Chow ,  Heap Hoe Kuan ,  Dioscoro Merilo ,  Antonio Dimaano

发明人： Seng Guan Chow ,  Heap Hoe Kuan ,  Dioscoro Merilo ,  Antonio Dimaano

IPC分类号： H01L23/34

CPC分类号： H01L24/73 ,  H01L24/91 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/32225 ,  H01L2924/00

摘要： A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated circuit die to the first integrated circuit die, and encapsulating the second integrated circuit die along a second side of the substrate.

摘要翻译： 提供了一种可堆叠的集成电路封装系统，其将具有设置在其上的互连的第一集成电路管芯放置在具有空腔的衬底中，所述衬底具有空腔，将具有互连的第一集成电路管芯在空腔中并沿着衬底的第一侧封装， 将第二集成电路管芯安装到第一集成电路管芯上，并沿着衬底的第二侧封装第二集成电路管芯。

公开(公告)号：US20070210443A1

公开(公告)日：2007-09-13

申请号：US11276646

申请日：2006-03-08

申请人： Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano ,  Heap Hoe Kuan ,  Tsz Yin Ho

发明人： Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano ,  Heap Hoe Kuan ,  Tsz Yin Ho

IPC分类号： H01L23/12

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19104 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package on package system including forming an interconnect integrated circuit package and attaching an extended-lead integrated circuit package on the interconnect integrated circuit package wherein a mold cap of the extended-lead integrated circuit package faces a mold cap of the interconnect integrated circuit package.

摘要翻译： 一种集成电路封装在封装系统上，包括形成互连集成电路封装并将互连集成电路封装上的扩展引线集成电路封装，其中延伸引线集成电路封装的模帽面向互连集成电路的模具盖 包。

公开(公告)号：US20070210424A1

公开(公告)日：2007-09-13

申请号：US11276647

申请日：2006-03-08

申请人： Tsz Yin Ho ,  Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano ,  Heap Hoe Kuan

发明人： Tsz Yin Ho ,  Dioscoro Merilo ,  Seng Guan Chow ,  Antonio Dimaano ,  Heap Hoe Kuan

IPC分类号： H01L23/02

CPC分类号： H01L25/105 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit package in package system including forming a base integrated circuit package with a base lead having a portion with a substantially planar base surface, forming an extended-lead integrated circuit package with an extended lead having a portion with a substantially planar lead-end surface, and stacking the extended-lead integrated circuit package over the base integrated circuit package with the substantially planar lead-end surface coplanar with the substantially planar base surface.

摘要翻译： 一种封装系统中的集成电路封装，包括形成具有基部引线的基极集成电路封装，所述基极引线具有基本平坦的基面的部分，形成具有延伸引线的延伸引线集成电路封装，所述延伸引线具有基本平坦的引线端部分 表面，并且在基本集成电路封装上堆叠延伸引线集成电路封装，其中基本平坦的引出端表面与基本平坦的基面共面。

公开(公告)号：US09524955B2

公开(公告)日：2016-12-20

申请号：US13423782

申请日：2012-03-19

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L23/02 ,  H01L25/10 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L25/03 ,  H01L23/00

CPC分类号： H01L25/105 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/81 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/92 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03

摘要： A semiconductor device is made by forming a conductive layer over a first sacrificial carrier. A solder bump is formed over the conductive layer. A no-flow underfill material is deposited over the first carrier, conductive layer, and solder bump. A semiconductor die or component is compressed into the no-flow underfill material to electrically contact the conductive layer. A surface of the no-flow underfill material and first solder bump is planarized. A first interconnect structure is formed over a first surface of the no-flow underfill material. The first interconnect structure is electrically connected to the solder bump. A second sacrificial carrier is mounted over the first interconnect structure. A second interconnect structure is formed over a second side of the no-flow underfill material. The second interconnect structure is electrically connected to the first solder bump. The semiconductor devices can be stacked and electrically connected through the solder bump.

摘要翻译： 通过在第一牺牲载体上形成导电层制成半导体器件。 在导电层上形成焊料凸块。 在第一载体，导电层和焊料凸块上沉积无流动的底部填充材料。 将半导体管芯或部件压缩成无流动底部填充材料以与导电层电接触。 无流动底部填充材料和第一焊料凸块的表面被平坦化。 第一互连结构形成在无流动底部填充材料的第一表面上。 第一互连结构电连接到焊料凸块。 第二牺牲载体安装在第一互连结构上。 第二互连结构形成在无流动底部填充材料的第二侧上。 第二互连结构电连接到第一焊料凸块。 半导体器件可以通过焊料凸块堆叠和电连接。

公开(公告)号：US08803330B2

公开(公告)日：2014-08-12

申请号：US12239774

申请日：2008-09-27

申请人： Rui Huang ,  Seng Guan Chow ,  Heap Hoe Kuan

发明人： Rui Huang ,  Seng Guan Chow ,  Heap Hoe Kuan

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/81 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/81365 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/37001 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

摘要： An integrated circuit package system includes: providing a mountable structure having a contact pad and an inner pad; mounting an integrated circuit device having a linear through channel over the mountable structure with the linear through channel traversing between an integrated circuit device first side and an integrated circuit device second side; and connecting the linear through channel exposed on the integrated circuit device second side to the inner pad.

摘要翻译： 集成电路封装系统包括：提供具有接触焊盘和内部焊盘的可安装结构; 在集成电路器件第一侧和集成电路器件第二侧之间穿过线性通道，将具有线性通道的集成电路器件安装在可安装结构上; 并将暴露在集成电路器件第二侧的线性通道连接到内部焊盘。

公开(公告)号：US08624364B2

公开(公告)日：2014-01-07

申请号：US12714431

申请日：2010-02-26

申请人： Seng Guan Chow ,  Hin Hwa Goh ,  Rui Huang ,  Heap Hoe Kuan

发明人： Seng Guan Chow ,  Hin Hwa Goh ,  Rui Huang ,  Heap Hoe Kuan

IPC分类号： H01L23/495

CPC分类号： H01L25/105 ,  H01L21/563 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit packaging system includes: a base integrated circuit package having a base integrated circuit on a base substrate thereof; a base barrier on the base substrate adjacent a base perimeter of the base substrate; a stack substrate over the base substrate, the stack substrate having a stack substrate aperture with the stack substrate having an inter-substrate connector thereon; a connector underfill through the stack substrate aperture encapsulating the inter-substrate connector, overflow of the connector underfill prevented by the base barrier; and a cavity formed of the stack substrate, the base integrated circuit package, and the connector underfill, the cavity horizontally offset from the base barrier.

摘要翻译： 一种集成电路封装系统，包括：基底集成电路封装，在其基底上具有基底集成电路; 在所述基底基板上邻近所述基底基底的周边的基底屏障; 所述堆叠衬底具有堆叠衬底孔，所述堆叠衬底在其上具有衬底间连接器; 通过封装衬底间连接器的堆叠衬底孔径的底部填充剂的底部填充物，由基底屏障阻止的连接器底部填充物溢出; 以及由堆叠衬底，基底集成电路封装和连接器底部填充物形成的空腔，空腔与基底屏障水平偏移。

公开(公告)号：US08536692B2

公开(公告)日：2013-09-17

申请号：US11954601

申请日：2007-12-12

申请人： Heap Hoe Kuan ,  Seng Guan Chow ,  Linda Pei Ee Chua ,  Dioscoro A. Merilo

发明人： Heap Hoe Kuan ,  Seng Guan Chow ,  Linda Pei Ee Chua ,  Dioscoro A. Merilo

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015

摘要： A mountable integrated circuit package system includes: mounting an integrated circuit die over a package carrier; connecting a first internal interconnect between the integrated circuit die and the package carrier; and forming a package encapsulation over the package carrier and the first internal interconnect, with the integrated circuit die partially exposed within a recess of the package encapsulation.

摘要翻译： 一种可安装的集成电路封装系统，包括：将集成电路管芯安装在封装载体上; 连接集成电路管芯和封装载体之间的第一内部互连; 以及在所述封装载体和所述第一内部互连件上形成封装封装，所述集成电路管芯部分地暴露在所述封装封装的凹部内。

公开(公告)号：US08492204B2

公开(公告)日：2013-07-23

申请号：US13081011

申请日：2011-04-06

申请人： Byung Tai Do ,  Seng Guan Chow ,  Heap Hoe Kuan ,  Linda Pei Ee Chua ,  Rui Huang

发明人： Byung Tai Do ,  Seng Guan Chow ,  Heap Hoe Kuan ,  Linda Pei Ee Chua ,  Rui Huang

IPC分类号： H01L21/44

CPC分类号： H01L23/49548 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for manufacturing a multiple encapsulation integrated circuit package-in-package system includes: dicing a top integrated circuit wafer having a bottom encapsulant thereon to form a top integrated circuit die with the bottom encapsulant; positioning internal leadfingers adjacent and connected to a bottom integrated circuit die; pressing the bottom encapsulant on to the bottom integrated circuit die; connecting the top integrated circuit die to external leadfingers adjacent the internal leadfingers; and forming a top encapsulant over the top integrated circuit die.

摘要翻译： 一种用于制造多封装集成电路封装包装系统的方法，包括：在其上划分具有底部密封剂的顶部集成电路晶片，以形成具有底部密封剂的顶部集成电路裸片; 将内部引线定位在相邻并连接到底部集成电路管芯上; 将底部密封剂压在底部集成电路模具上; 将顶部集成电路管芯连接到与内部引线管相邻的外部引线管; 以及在顶部集成电路管芯上形成顶部密封剂。