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    Integrated package assembly for switching regulator
    1.
    发明授权
    Integrated package assembly for switching regulator 有权

    公开(公告)号：US10741481B2

    公开(公告)日：2020-08-11

    申请号：US15996774

    申请日：2018-06-04

    申请人： Silergy Semiconductor Technology (Hangzhou) LTD

    发明人： Jiaming Ye ,  Xiaochun Tan

    IPC分类号： H01L23/495 ,  H01L23/00

    摘要： In one embodiment, an IC package assembly for a switching regulator, can include: a power switch chip including a control electrode and a first electrode on an obverse side and a second electrode on a reverse side, where the second electrode is configured as a switching terminal of a switching regulator; a control chip including a driving electrode and a plurality of input and output electrodes on the obverse side; and a leadframe including an extension pin, a substrate, and a plurality of discrete pins, where the extension pin is formed integrally with the substrate, and where the reverse side of the power switch chip is arranged on the substrate of the leadframe by a conductive material to electrically connect the second electrode to the substrate.

    Package structure and method therof
    2.
    发明授权
    Package structure and method therof 有权

    公开(公告)号：US10319608B2

    公开(公告)日：2019-06-11

    申请号：US15176384

    申请日：2016-06-08

    申请人： Silergy Semiconductor Technology (Hangzhou) LTD

    发明人： Xiaochun Tan

    IPC分类号： H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538

    摘要： A package structure can include: (i) a substrate having opposite first and second surfaces; (ii) a die having opposite active and back surfaces, where the die is arranged above the first surface of the substrate, the back surface of the die is adjacent to the first surface of the substrate; (iii) pads arranged on the active surface of the die; (iv) a first encapsulator configured to encapsulate the die; (v) an interconnection structure configured to electrically connect to the pads through the first encapsulator; (vi) a second encapsulator configured to encapsulate the interconnection structure; and (vii) a redistribution structure configured to electrically connect to the interconnection structure and to provide external electrical connectivity.

    Chip packaging structure of a plurality of assemblies
    5.
    发明授权
    Chip packaging structure of a plurality of assemblies 有权
    多个组件的芯片封装结构

    公开(公告)号：US09136207B2

    公开(公告)日：2015-09-15

    申请号：US14077376

    申请日：2013-11-12

    申请人： Silergy Semiconductor Technology (Hangzhou) LTD

    发明人： Xiaochun Tan

    IPC分类号： H01L23/498 ,  H01L23/495

    CPC分类号： H01L23/495 ,  H01L23/4951 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

    摘要： Disclosed herein are chip packaging structures for packaging multiple assemblies therein. In one embodiment, a chip packaging structure can include: (i) a first assembly located at a bottom layer of the chip packaging structure; (ii) at least one second assembly located above the first assembly, where the second assembly is electrically connected to the first assembly by a plurality of first protruding structures located under the second assembly; (iii) at least one third assembly located above the second assembly, where the third assembly is electrically connected to the first assembly by a plurality of second protruding structures located outside of the second assembly; and (iv) where a first portion of the third assembly and the plurality of second protruding structures form a bent structure substantially perpendicular to a second portion of the third assembly.

    摘要翻译： 这里公开了用于在其中包装多个组件的芯片封装结构。 在一个实施例中，芯片封装结构可以包括：（i）位于芯片封装结构的底层的第一组件; （ii）位于第一组件上方的至少一个第二组件，其中第二组件通过位于第二组件下方的多个第一突出结构电连接到第一组件; （iii）位于第二组件上方的至少一个第三组件，其中第三组件通过位于第二组件外部的多个第二突出结构电连接到第一组件; 和（iv）第三组件的第一部分和多个第二突出结构形成基本上垂直于第三组件的第二部分的弯曲结构。

    INTEGRATED PACKAGE ASSEMBLY FOR SWITCHING REGULATOR
    6.
    发明申请
    INTEGRATED PACKAGE ASSEMBLY FOR SWITCHING REGULATOR 审中-公开
    用于开关稳压器的集成封装组件

    公开(公告)号：US20150214141A1

    公开(公告)日：2015-07-30

    申请号：US14601098

    申请日：2015-01-20

    申请人： Silergy Semiconductor Technology (Hangzhou) LTD

    发明人： Jiaming Ye ,  Xiaochun Tan

    IPC分类号： H01L23/495 ,  H01L29/78

    CPC分类号： H01L23/49575 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/0002 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

    摘要： In one embodiment, an IC package assembly for a switching regulator, can include: a power switch chip including a control electrode and a first electrode on an obverse side and a second electrode on a reverse side, where the second electrode is configured as a switching terminal of a switching regulator; a control chip including a driving electrode and a plurality of input and output electrodes on the obverse side; and a leadframe including an extension pin, a substrate, and a plurality of discrete pins, where the extension pin is formed integrally with the substrate, and where the reverse side of the power switch chip is arranged on the substrate of the leadframe by a conductive material to electrically connect the second electrode to the substrate.

    摘要翻译： 在一个实施例中，用于开关调节器的IC封装组件可以包括：功率开关芯片，其包括控制电极和正面上的第一电极和反面上的第二电极，其中第二电极被配置为开关 开关调节器的端子; 控制芯片，其包括驱动电极和在正面上的多个输入和输出电极; 以及引线框架，其包括延伸销，基板和多个分立的销，其中所述延伸销与所述基板一体形成，并且所述功率开关芯片的反面通过导电性布置在所述引线框架的所述基板上 用于将第二电极电连接到基板的材料。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    7.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20150115439A1

    公开(公告)日：2015-04-30

    申请号：US14529543

    申请日：2014-10-31

    申请人： Silergy Semiconductor Technology (Hangzhou) Ltd.

    发明人： Xiaochun Tan

    IPC分类号： H01L23/00 ,  H01L23/31

    CPC分类号： H01L24/17 ,  H01L23/31 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/49572 ,  H01L24/81 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/14154 ,  H01L2224/16245 ,  H01L2224/1703 ,  H01L2224/81193 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/181 ,  H01L2924/182 ,  H01L2924/00 ,  H01L2224/818

    摘要： The present disclosure relates to a chip package and a method for forming the same. The chip package comprises a carrier pad, a chip, and a plurality of second conductive bumps, and a molding compound. The carrier pad has a first surface with a plurality of first conductive bumps formed thereon. The chip has an active surface. One end of each of the plurality of second conductive bumps is electrically coupled to the active surface, and the other end of each of the plurality of second conductive bumps is electrically coupled to the first conductive bumps. The molding compound encapsulates the chip and completely fills space between the carrier pad and the chip. In the chip package and the method for forming the same according to the present disclosure, the first conductive bumps are formed on the first surface of the carrier pad by etching, which provides an electrical connection between the first conductive bumps and the active surface of the chip, and broadens a flow channel of the molding compound between the chip and the carrier pad so that the molding compound can completely fill the space between the chip and the carrier pad. Underfill before encapsulation is not needed and the package cost is thus lowered.

    摘要翻译： 本公开涉及芯片封装及其形成方法。 芯片封装包括载体焊盘，芯片和多个第二导电凸块，以及模塑料。 载体垫具有在其上形成有多个第一导电凸块的第一表面。 该芯片具有活性表面。 多个第二导电凸块中的每一个的一端电耦合到有源表面，并且多个第二导电凸块中的每一个的另一端电耦合到第一导电凸块。 模塑料封装芯片，并完全填充载体垫片和芯片之间的空间。 在根据本公开的芯片封装及其形成方法中，通过蚀刻在载体焊盘的第一表面上形成第一导电凸块，其提供第一导电凸块与第一导电凸块的有源表面之间的电连接 并且在芯片和载体垫之间扩大模塑料的流动通道，使得模塑料可以完全填充芯片和载体垫之间的空间。 在封装之前不需要底部填充，因此降低了封装成本。

    Lead frame and flip packaging device thereof
    8.
    发明授权
    Lead frame and flip packaging device thereof 有权
    引线框架及其翻盖封装装置

    公开(公告)号：US08853838B2

    公开(公告)日：2014-10-07

    申请号：US14022877

    申请日：2013-09-10

    申请人： Silergy Semiconductor Technology (Hangzhou) Ltd

    发明人： Xiaochun Tan

    IPC分类号： H01L23/498

    CPC分类号： H01L23/49811 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49572 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Disclosed are various lead frame and flip chip package structures. In one embodiment, a method can include: (i) a plurality of pins, wherein each of the plurality of pins includes an intermediate portion and an extension portion that are connected to each other; (ii) where the intermediate portion is located at an interior region of the lead frame, the intermediate portion extending to a first side edge of the lead frame; and (iii) where the extension portion is located at a peripheral region of the lead frame, the peripheral region being different than the first side edge.

    摘要翻译： 公开了各种引线框和倒装芯片封装结构。 在一个实施例中，一种方法可以包括：（i）多个销，其中多个销中的每一个包括彼此连接的中间部分和延伸部分; （ii）中间部分位于引线框架的内部区域，中间部分延伸到引线框架的第一侧边缘; 和（iii）其中所述延伸部分位于所述引线框架的周边区域处，所述周边区域不同于所述第一侧边缘。

    Lead frame and flip chip package device thereof
    9.
    发明授权
    Lead frame and flip chip package device thereof 有权
    引线框和倒装芯片封装器件

    公开(公告)号：US08836093B2

    公开(公告)日：2014-09-16

    申请号：US13672957

    申请日：2012-11-09

    申请人： Silergy Semiconductor Technology (Hangzhou) Ltd

    发明人： Xiaochun Tan

    IPC分类号： H01L23/495 ,  H05K7/10 ,  H05K7/02 ,  H01L23/31

    CPC分类号： H01L23/495 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/17 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2924/14 ,  H05K7/02 ,  H05K7/1061 ,  H01L2924/00

    摘要： The present invention relates to the field of semiconductor chip packages, and more specifically to a lead frame and flip chip package device thereof. In one embodiment, a lead frame for electrically connecting a chip to outside leads, can include a plurality of lead fingers, where each of the plurality of lead fingers comprises a plurality of outburst regions extending from an edge thereof. In one embodiment, a flip chip package device can include: a chip and a plurality of solder bumps, where one surface of the chip is connected to a first surface of each of the plurality of solder bumps; and the lead frame, where second surfaces of each of the plurality solder bumps are connected with corresponding outburst regions of the lead frame to connect the chip to the lead frame through the solder bumps.

    摘要翻译： 本发明涉及半导体芯片封装的领域，更具体地涉及引线框和倒装芯片封装器件。 在一个实施例中，用于将芯片电连接到外部引线的引线框可以包括多个引线指，其中多个引线指中的每一个包括从其边缘延伸的多个突出区域。 在一个实施例中，倒装芯片封装器件可以包括：芯片和多个焊料凸块，其中芯片的一个表面连接到多个焊料凸块中的每一个的第一表面; 以及引线框架，其中每个多个焊料凸块的第二表面与引线框架的相应的突出区域连接，以通过焊料凸块将芯片连接到引线框架。